From nobody Tue Oct 28 01:55:53 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1515489952905963.0773408812496; Tue, 9 Jan 2018 01:25:52 -0800 (PST) Received: from localhost ([::1]:40749 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eYqAA-0000qP-SR for importer@patchew.org; Tue, 09 Jan 2018 04:25:42 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48212) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eYq67-0006Ty-TY for qemu-devel@nongnu.org; Tue, 09 Jan 2018 04:21:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eYq60-0001DU-8v for qemu-devel@nongnu.org; Tue, 09 Jan 2018 04:21:31 -0500 Received: from mail-pf0-x236.google.com ([2607:f8b0:400e:c00::236]:35393) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eYq5s-0000yy-QJ; Tue, 09 Jan 2018 04:21:17 -0500 Received: by mail-pf0-x236.google.com with SMTP id t12so5307148pfg.2; Tue, 09 Jan 2018 01:21:16 -0800 (PST) Received: from surajjs1.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id e79sm2611867pfl.61.2018.01.09.01.21.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Jan 2018 01:21:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mWleHVYAo+viqPBfe/OCdWF1FXEbFHVo1zHmzWBphKA=; b=QlG8Ep72SrjOodD3hQEBcj9mSHMc+JxGgqw2sl03/jNjsTMLQQqd/6Q6trqgjSElPl LPXUO5WF0VQrDyRbhPlWSga3rTSSF1lekwCn/u4lSkjyOQTGOKgVQxhT11Xf8E+TxO0H 6pzhpRQRtILwoEzGqFBXztYvPv7IOuLuo87u/IWAsiZ9Detus3oL/hSwyXvhzAPEqlb4 XaZGFPGvPJZ2YIG+MOkM/8N/2LkYb7qBM2C5AqEGrovjNkHavme+D2FFyBQv6ZGtP1Na t4e5x5kyUhAtWefaopFZlTFZh4cU+9eXxYNsepds4igEW0Sktjwe3mkH15YlGgkOxQji a0sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mWleHVYAo+viqPBfe/OCdWF1FXEbFHVo1zHmzWBphKA=; b=KWwrqabjHzMAB0LI5WbzqgykcIPtiSb8vnruOcHyOxFBrbfNDg0KLERfsZ3+krJQv2 /Shtv5ps5Ms4bVBQBmv3FZD0XwTYuD1oaf6pkTFNXUMs9bZoVTVfKESJkJ/zxKJgIVBR CKKMEN0d1K15XbAkLygYrUdY9f3l6QkSaFzR6cjo3QzsaF0hbshycuZ3Yq3B3xY7+luQ wW+Y3JkU+LeXJZHyzq3Q9SNq8wVFSejcA+0dDX4BCF69RJZPTHwDmM4MqGNU1Q5KDfTh h3mzdSkbIyWXUImUilg1iUv+WCF8Ql9bOtHks+ecBVBAzqH9oIzJGhCGhH/HUfzvDaYf +PZQ== X-Gm-Message-State: AKGB3mIyNh0PAnVAMTBAewCq3Cy8IbB1DcCDnu8TN3ltqkp8qRTPqORB GwcMFpWkXhv3cmRnEesstc1WPeom X-Google-Smtp-Source: ACJfBotJRvu97wzfQYaIxRVUwF3yy3eitQs9NNiKBCsjnhdH0Uk67HvaLfRnaZ+BULknKs8RDBB4Og== X-Received: by 10.98.24.22 with SMTP id 22mr3343921pfy.65.1515489675570; Tue, 09 Jan 2018 01:21:15 -0800 (PST) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Tue, 9 Jan 2018 20:21:01 +1100 Message-Id: <20180109092103.18458-2-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180109092103.18458-1-sjitindarsingh@gmail.com> References: <20180109092103.18458-1-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::236 Subject: [Qemu-devel] [QEMU-PPC] [RFC 1/3] hw/ppc/spapr_caps: Rework spapr_caps to use uint8 internal representation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, qemu-devel@nongnu.org, Suraj Jitindar Singh , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Currently spapr_caps are tied to boolean values (on or off). This patch reworks the caps so that they can have any value between 0 and 127, inclusive. This allows more capabilities with various values to be represented in the same way internally. Capabilities are numbered in ascending order. The internal representation of capability values is an array of uint8s in the sPAPRMachineState, indexed by capability number. Note: The MSB (0x80) of a capability is reserved to track whether the capability was set from the command line. Capabilities can have their own name, description, options, getter and setter functions, type and allow functions. They also each have their own section in the migration stream. Capabilities are only migrated if they were explictly set on the command line, with the assumption that otherwise the default will match. On migration we ensure that the capability value on the destination is greater than or equal to the capability value from the source. So long at this remains the case then the migration is considered compatible and allowed to continue. This patch implements generic getter and setter functions for boolean capabilities. It also converts the existings cap-htm, cap-vsx and cap-dfp capabilities to this new format. --- hw/ppc/spapr.c | 19 +-- hw/ppc/spapr_caps.c | 335 ++++++++++++++++++++++++++++-----------------= ---- include/hw/ppc/spapr.h | 41 +++--- 3 files changed, 222 insertions(+), 173 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index d1acfe8858..7fa45729ba 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -320,7 +320,7 @@ static void spapr_populate_pa_features(sPAPRMachineStat= e *spapr, */ pa_features[3] |=3D 0x20; } - if (spapr_has_cap(spapr, SPAPR_CAP_HTM) && pa_size > 24) { + if (spapr_get_cap(spapr, SPAPR_CAP_HTM) && pa_size > 24) { pa_features[24] |=3D 0x80; /* Transactional memory support */ } if (legacy_guest && pa_size > 40) { @@ -563,7 +563,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, * * Only CPUs for which we create core types in spapr_cpu_core.c * are possible, and all of those have VMX */ - if (spapr_has_cap(spapr, SPAPR_CAP_VSX)) { + if (spapr_get_cap(spapr, SPAPR_CAP_VSX)) { _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2))); } else { _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1))); @@ -572,7 +572,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, /* Advertise DFP (Decimal Floating Point) if available * 0 / no property =3D=3D no DFP * 1 =3D=3D DFP available */ - if (spapr_has_cap(spapr, SPAPR_CAP_DFP)) { + if (spapr_get_cap(spapr, SPAPR_CAP_DFP)) { _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1))); } =20 @@ -1762,7 +1762,9 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_ov5_cas, &vmstate_spapr_patb_entry, &vmstate_spapr_pending_events, - &vmstate_spapr_caps, + &vmstate_spapr_cap_htm, + &vmstate_spapr_cap_vsx, + &vmstate_spapr_cap_dfp, NULL } }; @@ -2323,8 +2325,6 @@ static void spapr_machine_init(MachineState *machine) char *filename; Error *resize_hpt_err =3D NULL; =20 - spapr_caps_validate(spapr, &error_fatal); - msi_nonbroken =3D true; =20 QLIST_INIT(&spapr->phbs); @@ -3834,7 +3834,9 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; =20 - smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX | SPAPR_CAP_DFP); + smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; + smc->default_caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_ON; + smc->default_caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_ON; spapr_caps_add_properties(smc, &error_abort); } =20 @@ -3916,8 +3918,7 @@ static void spapr_machine_2_11_class_options(MachineC= lass *mc) sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); =20 spapr_machine_2_12_class_options(mc); - smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX - | SPAPR_CAP_DFP); + smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_ON; SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 9d070a306c..af40f2e469 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -35,33 +35,71 @@ typedef struct sPAPRCapabilityInfo { const char *name; const char *description; - uint64_t flag; + const char *options; + int index; =20 + /* Getter and Setter Function Pointers */ + ObjectPropertyAccessor *get; + ObjectPropertyAccessor *set; + const char *type; /* Make sure the virtual hardware can support this capability */ - void (*allow)(sPAPRMachineState *spapr, Error **errp); - - /* If possible, tell the virtual hardware not to allow the cap to - * be used at all */ - void (*disallow)(sPAPRMachineState *spapr, Error **errp); + void (*allow)(sPAPRMachineState *spapr, uint8_t val, Error **errp); } sPAPRCapabilityInfo; =20 -static void cap_htm_allow(sPAPRMachineState *spapr, Error **errp) +static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value =3D spapr_get_cap(spapr, cap->index) =3D=3D SPAPR_CAP_ON; + + visit_type_bool(v, name, &value, errp); +} + +static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) { + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value; + Error *local_err =3D NULL; + + visit_type_bool(v, name, &value, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + spapr->cmd_line_caps.caps[cap->index] =3D (value ? SPAPR_CAP_ON : + SPAPR_CAP_OFF) | + SPAPR_CAP_CMD_LINE; +} + +static void cap_htm_allow(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) +{ + if (!val) { + /* TODO: We don't support disabling htm yet */ + return; + } if (tcg_enabled()) { error_setg(errp, - "No Transactional Memory support in TCG, try cap-htm=3D= off"); + "No Transactional Memory support in TCG, try cap-htm=3D= 0"); } else if (kvm_enabled() && !kvmppc_has_cap_htm()) { error_setg(errp, -"KVM implementation does not support Transactional Memory, try cap-htm=3Do= ff" +"KVM implementation does not support Transactional Memory, try cap-htm=3D0" ); } } =20 -static void cap_vsx_allow(sPAPRMachineState *spapr, Error **errp) +static void cap_vsx_allow(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) { PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); CPUPPCState *env =3D &cpu->env; =20 + if (!val) { + /* TODO: We don't support disabling vsx yet */ + return; + } /* Allowable CPUs in spapr_cpu_core.c should already have gotten * rid of anything that doesn't do VMX */ g_assert(env->insns_flags & PPC_ALTIVEC); @@ -70,37 +108,51 @@ static void cap_vsx_allow(sPAPRMachineState *spapr, Er= ror **errp) } } =20 -static void cap_dfp_allow(sPAPRMachineState *spapr, Error **errp) +static void cap_dfp_allow(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) { PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); CPUPPCState *env =3D &cpu->env; =20 + if (!val) { + /* TODO: We don't support disabling dfp yet */ + return; + } if (!(env->insns_flags2 & PPC2_DFP)) { error_setg(errp, "DFP support not available, try cap-dfp=3Doff"); } } =20 -static sPAPRCapabilityInfo capability_table[] =3D { - { + +sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] =3D { + [SPAPR_CAP_HTM] =3D { .name =3D "htm", .description =3D "Allow Hardware Transactional Memory (HTM)", - .flag =3D SPAPR_CAP_HTM, + .options =3D "", + .index =3D SPAPR_CAP_HTM, + .get =3D spapr_cap_get_bool, + .set =3D spapr_cap_set_bool, + .type =3D "bool", .allow =3D cap_htm_allow, - /* TODO: add cap_htm_disallow */ }, - { + [SPAPR_CAP_VSX] =3D { .name =3D "vsx", .description =3D "Allow Vector Scalar Extensions (VSX)", - .flag =3D SPAPR_CAP_VSX, + .options =3D "", + .index =3D SPAPR_CAP_VSX, + .get =3D spapr_cap_get_bool, + .set =3D spapr_cap_set_bool, + .type =3D "bool", .allow =3D cap_vsx_allow, - /* TODO: add cap_vsx_disallow */ }, - { + [SPAPR_CAP_DFP] =3D { .name =3D "dfp", .description =3D "Allow Decimal Floating Point (DFP)", - .flag =3D SPAPR_CAP_DFP, + .options =3D "", + .index =3D SPAPR_CAP_DFP, + .get =3D spapr_cap_get_bool, + .set =3D spapr_cap_set_bool, + .type =3D "bool", .allow =3D cap_dfp_allow, - /* TODO: add cap_dfp_disallow */ }, }; =20 @@ -115,201 +167,192 @@ static sPAPRCapabilities default_caps_with_cpu(sPAP= RMachineState *spapr, =20 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_07, 0, spapr->max_compat_pvr)) { - caps.mask &=3D ~SPAPR_CAP_HTM; + caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; } =20 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, 0, spapr->max_compat_pvr)) { - caps.mask &=3D ~SPAPR_CAP_VSX; - caps.mask &=3D ~SPAPR_CAP_DFP; + caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_OFF; + caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_OFF; } =20 return caps; } =20 -static bool spapr_caps_needed(void *opaque) -{ - sPAPRMachineState *spapr =3D opaque; - - return (spapr->forced_caps.mask !=3D 0) || (spapr->forbidden_caps.mask= !=3D 0); -} - /* This has to be called from the top-level spapr post_load, not the * caps specific one. Otherwise it wouldn't be called when the source * caps are all defaults, which could still conflict with overridden * caps on the destination */ int spapr_caps_post_migration(sPAPRMachineState *spapr) { - uint64_t allcaps =3D 0; int i; bool ok =3D true; sPAPRCapabilities dstcaps =3D spapr->effective_caps; sPAPRCapabilities srccaps; =20 srccaps =3D default_caps_with_cpu(spapr, first_cpu); - srccaps.mask |=3D spapr->mig_forced_caps.mask; - srccaps.mask &=3D ~spapr->mig_forbidden_caps.mask; + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { + if (spapr->mig_caps.caps[i] & SPAPR_CAP_CMD_LINE) { + srccaps.caps[i] =3D spapr->mig_caps.caps[i] & ~SPAPR_CAP_CMD_L= INE; + } + } =20 - for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { sPAPRCapabilityInfo *info =3D &capability_table[i]; =20 - allcaps |=3D info->flag; - - if ((srccaps.mask & info->flag) && !(dstcaps.mask & info->flag)) { - error_report("cap-%s=3Don in incoming stream, but off in desti= nation", - info->name); + if (srccaps.caps[i] > dstcaps.caps[i]) { + error_report("cap-%s higher level (%d) in incoming stream than= on destination (%d)", + info->name, srccaps.caps[i], dstcaps.caps[i]); ok =3D false; } =20 - if (!(srccaps.mask & info->flag) && (dstcaps.mask & info->flag)) { - warn_report("cap-%s=3Doff in incoming stream, but on in destin= ation", - info->name); + if (srccaps.caps[i] < dstcaps.caps[i]) { + warn_report("cap-%s lower level (%d) in incoming stream than o= n destination (%d)", + info->name, srccaps.caps[i], dstcaps.caps[i]); } } =20 - if (spapr->mig_forced_caps.mask & ~allcaps) { - error_report( - "Unknown capabilities 0x%"PRIx64" enabled in incoming stream", - spapr->mig_forced_caps.mask & ~allcaps); - ok =3D false; - } - if (spapr->mig_forbidden_caps.mask & ~allcaps) { - warn_report( - "Unknown capabilities 0x%"PRIx64" disabled in incoming stream", - spapr->mig_forbidden_caps.mask & ~allcaps); - } - return ok ? 0 : -EINVAL; } =20 -static int spapr_caps_pre_save(void *opaque) +static bool spapr_cap_htm_needed(void *opaque) { sPAPRMachineState *spapr =3D opaque; =20 - spapr->mig_forced_caps =3D spapr->forced_caps; - spapr->mig_forbidden_caps =3D spapr->forbidden_caps; + return !!(spapr->cmd_line_caps.caps[SPAPR_CAP_HTM] & SPAPR_CAP_CMD_LIN= E); +} + +static int spapr_cap_htm_pre_save(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_caps.caps[SPAPR_CAP_HTM] =3D + spapr->cmd_line_caps.caps[SPAPR_CAP_HTM]; return 0; } =20 -static int spapr_caps_pre_load(void *opaque) +static int spapr_cap_htm_pre_load(void *opaque) { sPAPRMachineState *spapr =3D opaque; =20 - spapr->mig_forced_caps =3D spapr_caps(0); - spapr->mig_forbidden_caps =3D spapr_caps(0); + spapr->mig_caps.caps[SPAPR_CAP_HTM] =3D 0; return 0; } =20 -const VMStateDescription vmstate_spapr_caps =3D { - .name =3D "spapr/caps", +const VMStateDescription vmstate_spapr_cap_htm =3D { + .name =3D "spapr/cap_htm", .version_id =3D 1, .minimum_version_id =3D 1, - .needed =3D spapr_caps_needed, - .pre_save =3D spapr_caps_pre_save, - .pre_load =3D spapr_caps_pre_load, + .needed =3D spapr_cap_htm_needed, + .pre_save =3D spapr_cap_htm_pre_save, + .pre_load =3D spapr_cap_htm_pre_load, .fields =3D (VMStateField[]) { - VMSTATE_UINT64(mig_forced_caps.mask, sPAPRMachineState), - VMSTATE_UINT64(mig_forbidden_caps.mask, sPAPRMachineState), + VMSTATE_UINT8(mig_caps.caps[SPAPR_CAP_HTM], sPAPRMachineState), VMSTATE_END_OF_LIST() }, }; =20 -void spapr_caps_reset(sPAPRMachineState *spapr) +static bool spapr_cap_vsx_needed(void *opaque) { - Error *local_err =3D NULL; - sPAPRCapabilities caps; - int i; + sPAPRMachineState *spapr =3D opaque; =20 - /* First compute the actual set of caps we're running with.. */ - caps =3D default_caps_with_cpu(spapr, first_cpu); + return !!(spapr->cmd_line_caps.caps[SPAPR_CAP_VSX] & SPAPR_CAP_CMD_LIN= E); +} =20 - /* Remove unnecessary forced/forbidden bits (this will help us - * with migration) */ - spapr->forced_caps.mask &=3D ~caps.mask; - spapr->forbidden_caps.mask &=3D caps.mask; +static int spapr_cap_vsx_pre_save(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_caps.caps[SPAPR_CAP_VSX] =3D + spapr->cmd_line_caps.caps[SPAPR_CAP_VSX]; + return 0; +} =20 - caps.mask |=3D spapr->forced_caps.mask; - caps.mask &=3D ~spapr->forbidden_caps.mask; +static int spapr_cap_vsx_pre_load(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; =20 - spapr->effective_caps =3D caps; + spapr->mig_caps.caps[SPAPR_CAP_VSX] =3D 0; + return 0; +} =20 - /* .. then apply those caps to the virtual hardware */ +const VMStateDescription vmstate_spapr_cap_vsx =3D { + .name =3D "spapr/cap_vsx", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_vsx_needed, + .pre_save =3D spapr_cap_vsx_pre_save, + .pre_load =3D spapr_cap_vsx_pre_load, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig_caps.caps[SPAPR_CAP_VSX], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; =20 - for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { - sPAPRCapabilityInfo *info =3D &capability_table[i]; +static bool spapr_cap_dfp_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; =20 - if (spapr->effective_caps.mask & info->flag) { - /* Failure to allow a cap is fatal - if the guest doesn't - * have it, we'll be supplying an incorrect environment */ - if (info->allow) { - info->allow(spapr, &error_fatal); - } - } else { - /* Failure to enforce a cap is only a warning. The guest - * shouldn't be using it, since it's not advertised, so it - * doesn't get to complain about weird behaviour if it - * goes ahead anyway */ - if (info->disallow) { - info->disallow(spapr, &local_err); - } - if (local_err) { - warn_report_err(local_err); - local_err =3D NULL; - } - } - } + return !!(spapr->cmd_line_caps.caps[SPAPR_CAP_DFP] & SPAPR_CAP_CMD_LIN= E); } =20 -static void spapr_cap_get(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static int spapr_cap_dfp_pre_save(void *opaque) { - sPAPRCapabilityInfo *cap =3D opaque; - sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); - bool value =3D spapr_has_cap(spapr, cap->flag); - - /* TODO: Could this get called before effective_caps is finalized - * in spapr_caps_reset()? */ + sPAPRMachineState *spapr =3D opaque; =20 - visit_type_bool(v, name, &value, errp); + spapr->mig_caps.caps[SPAPR_CAP_DFP] =3D + spapr->cmd_line_caps.caps[SPAPR_CAP_DFP]; + return 0; } =20 -static void spapr_cap_set(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static int spapr_cap_dfp_pre_load(void *opaque) { - sPAPRCapabilityInfo *cap =3D opaque; - sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); - bool value; - Error *local_err =3D NULL; - - visit_type_bool(v, name, &value, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + sPAPRMachineState *spapr =3D opaque; =20 - if (value) { - spapr->forced_caps.mask |=3D cap->flag; - } else { - spapr->forbidden_caps.mask |=3D cap->flag; - } + spapr->mig_caps.caps[SPAPR_CAP_DFP] =3D 0; + return 0; } =20 -void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp) +const VMStateDescription vmstate_spapr_cap_dfp =3D { + .name =3D "spapr/cap_dfp", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_dfp_needed, + .pre_save =3D spapr_cap_dfp_pre_save, + .pre_load =3D spapr_cap_dfp_pre_load, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig_caps.caps[SPAPR_CAP_DFP], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + +void spapr_caps_reset(sPAPRMachineState *spapr) { - uint64_t allcaps =3D 0; + sPAPRCapabilities caps; int i; =20 - for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { - g_assert((allcaps & capability_table[i].flag) =3D=3D 0); - allcaps |=3D capability_table[i].flag; + /* First compute the actual set of caps we're running with.. */ + caps =3D default_caps_with_cpu(spapr, first_cpu); + + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { + /* Check if set from command line and override default if so */ + if (spapr->cmd_line_caps.caps[i] & SPAPR_CAP_CMD_LINE) { + caps.caps[i] =3D spapr->cmd_line_caps.caps[i] & ~SPAPR_CAP_CMD= _LINE; + } } =20 - g_assert((spapr->forced_caps.mask & ~allcaps) =3D=3D 0); - g_assert((spapr->forbidden_caps.mask & ~allcaps) =3D=3D 0); + spapr->effective_caps =3D caps; =20 - if (spapr->forced_caps.mask & spapr->forbidden_caps.mask) { - error_setg(errp, "Some sPAPR capabilities set both on and off"); - return; + /* .. then apply those caps to the virtual hardware */ + + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { + sPAPRCapabilityInfo *info =3D &capability_table[i]; + + /* + * If the allow function can't set the desired level and think's i= t's + * fatal, it should cause that. + */ + info->allow(spapr, spapr->effective_caps.caps[i], &error_fatal); } } =20 @@ -322,17 +365,19 @@ void spapr_caps_add_properties(sPAPRMachineClass *smc= , Error **errp) for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { sPAPRCapabilityInfo *cap =3D &capability_table[i]; const char *name =3D g_strdup_printf("cap-%s", cap->name); + char *desc; =20 - object_class_property_add(klass, name, "bool", - spapr_cap_get, spapr_cap_set, NULL, - cap, &local_err); + object_class_property_add(klass, name, cap->type, + cap->get, cap->set, + NULL, cap, &local_err); if (local_err) { error_propagate(errp, local_err); return; } =20 - object_class_property_set_description(klass, name, cap->descriptio= n, - &local_err); + desc =3D g_strdup_printf("%s%s", cap->description, cap->options); + object_class_property_set_description(klass, name, desc, &local_er= r); + g_free(desc); if (local_err) { error_propagate(errp, local_err); return; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 26ac17e641..2804fbbf12 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -57,17 +57,26 @@ typedef enum { /* These bits go in the migration stream, so they can't be reassigned */ =20 /* Hardware Transactional Memory */ -#define SPAPR_CAP_HTM 0x0000000000000001ULL - +#define SPAPR_CAP_HTM 0x00 /* Vector Scalar Extensions */ -#define SPAPR_CAP_VSX 0x0000000000000002ULL - +#define SPAPR_CAP_VSX 0x01 /* Decimal Floating Point */ -#define SPAPR_CAP_DFP 0x0000000000000004ULL +#define SPAPR_CAP_DFP 0x02 +/* Num Caps */ +#define SPAPR_CAP_NUM (SPAPR_CAP_DFP + 1) + +/* + * Capability Values + * NOTE: All execpt the immediately following MUST be less than 128 (0x80) + */ +#define SPAPR_CAP_CMD_LINE 0x80 +/* Bool Caps */ +#define SPAPR_CAP_OFF 0x00 +#define SPAPR_CAP_ON 0x01 =20 typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { - uint64_t mask; + uint8_t caps[SPAPR_CAP_NUM]; }; =20 /** @@ -149,9 +158,8 @@ struct sPAPRMachineState { =20 const char *icp_type; =20 - sPAPRCapabilities forced_caps, forbidden_caps; - sPAPRCapabilities mig_forced_caps, mig_forbidden_caps; - sPAPRCapabilities effective_caps; + sPAPRCapabilities cmd_line_caps, effective_caps; + sPAPRCapabilities mig_caps; }; =20 #define H_SUCCESS 0 @@ -752,21 +760,16 @@ qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq= ); /* * Handling of optional capabilities */ -extern const VMStateDescription vmstate_spapr_caps; - -static inline sPAPRCapabilities spapr_caps(uint64_t mask) -{ - sPAPRCapabilities caps =3D { mask }; - return caps; -} +extern const VMStateDescription vmstate_spapr_cap_htm; +extern const VMStateDescription vmstate_spapr_cap_vsx; +extern const VMStateDescription vmstate_spapr_cap_dfp; =20 -static inline bool spapr_has_cap(sPAPRMachineState *spapr, uint64_t cap) +static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap) { - return !!(spapr->effective_caps.mask & cap); + return spapr->effective_caps.caps[cap]; } =20 void spapr_caps_reset(sPAPRMachineState *spapr); -void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp); void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp); int spapr_caps_post_migration(sPAPRMachineState *spapr); =20 --=20 2.13.6 From nobody Tue Oct 28 01:55:53 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151548982320429.567575672232692; Tue, 9 Jan 2018 01:23:43 -0800 (PST) Received: from localhost ([::1]:40688 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eYq8E-0007sT-9t for importer@patchew.org; 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Tue, 09 Jan 2018 01:21:18 -0800 (PST) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Tue, 9 Jan 2018 20:21:02 +1100 Message-Id: <20180109092103.18458-3-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180109092103.18458-1-sjitindarsingh@gmail.com> References: <20180109092103.18458-1-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [QEMU-PPC] [RFC 2/3] hw/spapr/spapr_caps: Add new caps safe_[cache/bounds_check/indirect_branch] X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, qemu-devel@nongnu.org, Suraj Jitindar Singh , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch adds three new capabilities: cap-cfpc -> safe_cache cap-sbbc -> safe_bounds_check cap-ibs -> safe_indirect_branch Each capability is tristate with the possible values "broken", "workaround" or "fixed". Add generic getter and setter functions for this new capability type. Add these new capabilities to the capabilities list. The maximum value for the capabilities is queried from kvm through new kvm capabilities. The requested values are considered to be compatible if kvm can support an equal or higher value for each capability. Discussion: Currently these new capabilities default to broken to allow for backwards compatibility, is this the best option? --- hw/ppc/spapr.c | 6 ++ hw/ppc/spapr_caps.c | 224 ++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/spapr.h | 15 +++- linux-headers/linux/kvm.h | 3 + target/ppc/kvm.c | 28 ++++++ target/ppc/kvm_ppc.h | 18 ++++ 6 files changed, 293 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 7fa45729ba..d9700b0254 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1765,6 +1765,9 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_cap_htm, &vmstate_spapr_cap_vsx, &vmstate_spapr_cap_dfp, + &vmstate_spapr_cap_cfpc, + &vmstate_spapr_cap_sbbc, + &vmstate_spapr_cap_ibs, NULL } }; @@ -3837,6 +3840,9 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; smc->default_caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_ON; smc->default_caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_ON; + smc->default_caps.caps[SPAPR_CAP_CFPC] =3D SPAPR_CAP_BROKEN; + smc->default_caps.caps[SPAPR_CAP_SBBC] =3D SPAPR_CAP_BROKEN; + smc->default_caps.caps[SPAPR_CAP_IBS] =3D SPAPR_CAP_BROKEN; spapr_caps_add_properties(smc, &error_abort); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index af40f2e469..e6910aa191 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -75,6 +75,64 @@ static void spapr_cap_set_bool(Object *obj, Visitor *v, = const char *name, SPAPR_CAP_CMD_LINE; } =20 +static void spapr_cap_get_tristate(Object *obj, Visitor *v, const char *na= me, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + char *val =3D NULL; + uint8_t value =3D spapr_get_cap(spapr, cap->index); + + switch (value) { + case SPAPR_CAP_BROKEN: + val =3D g_strdup("broken"); + break; + case SPAPR_CAP_WORKAROUND: + val =3D g_strdup("workaround"); + break; + case SPAPR_CAP_FIXED: + val =3D g_strdup("fixed"); + break; + default: + break; + } + + visit_type_str(v, name, &val, errp); + g_free(val); +} + +static void spapr_cap_set_tristate(Object *obj, Visitor *v, const char *na= me, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + char *val; + Error *local_err =3D NULL; + uint8_t value; + + visit_type_str(v, name, &val, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + if (!strcasecmp(val, "broken")) { + value =3D SPAPR_CAP_BROKEN; + } else if (!strcasecmp(val, "workaround")) { + value =3D SPAPR_CAP_WORKAROUND; + } else if (!strcasecmp(val, "fixed")) { + value =3D SPAPR_CAP_FIXED; + } else { + error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val, + cap->name); + goto out; + } + + spapr->cmd_line_caps.caps[cap->index] =3D value | SPAPR_CAP_CMD_LINE; +out: + g_free(val); +} + static void cap_htm_allow(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) { if (!val) { @@ -122,6 +180,31 @@ static void cap_dfp_allow(sPAPRMachineState *spapr, ui= nt8_t val, Error **errp) } } =20 +static void cap_safe_cache_allow(sPAPRMachineState *spapr, uint8_t val, + Error **errp) +{ + if (kvm_enabled() && (val > kvmppc_get_cap_safe_cache())) { + error_setg(errp, "Requested safe cache capability level not suppor= ted by kvm, try a different value for cap-cfpc"); + } +} + +static void cap_safe_bounds_check_allow(sPAPRMachineState *spapr, uint8_t = val, + Error **errp) +{ + if (kvm_enabled() && (val > kvmppc_get_cap_safe_bounds_check())) { + error_setg(errp, "Requested safe bounds check capability level not= supported by kvm, try a different value for cap-sbbc"); + } +} + +static void cap_safe_indirect_branch_allow(sPAPRMachineState *spapr, + uint8_t val, Error **errp) +{ + if (kvm_enabled() && (val > kvmppc_get_cap_safe_indirect_branch())) { + error_setg(errp, "Requested safe indirect branch capability level = not supported by kvm, try a different value for cap-ibs"); + } +} + +#define VALUE_DESC_TRISTATE " (broken, workaround, fixed)" =20 sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] =3D { [SPAPR_CAP_HTM] =3D { @@ -154,6 +237,36 @@ sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = =3D { .type =3D "bool", .allow =3D cap_dfp_allow, }, + [SPAPR_CAP_CFPC] =3D { + .name =3D "cfpc", + .description =3D "Cache Flush on Privilege Change", + .options =3D VALUE_DESC_TRISTATE, + .index =3D SPAPR_CAP_CFPC, + .get =3D spapr_cap_get_tristate, + .set =3D spapr_cap_set_tristate, + .type =3D "string", + .allow =3D cap_safe_cache_allow, + }, + [SPAPR_CAP_SBBC] =3D { + .name =3D "sbbc", + .description =3D "Speculation Barrier Bounds Checking", + .options =3D VALUE_DESC_TRISTATE, + .index =3D SPAPR_CAP_SBBC, + .get =3D spapr_cap_get_tristate, + .set =3D spapr_cap_set_tristate, + .type =3D "string", + .allow =3D cap_safe_bounds_check_allow, + }, + [SPAPR_CAP_IBS] =3D { + .name =3D "ibs", + .description =3D "Indirect Branch Serialisation", + .options =3D VALUE_DESC_TRISTATE, + .index =3D SPAPR_CAP_IBS, + .get =3D spapr_cap_get_tristate, + .set =3D spapr_cap_set_tristate, + .type =3D "string", + .allow =3D cap_safe_indirect_branch_allow, + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -326,6 +439,117 @@ const VMStateDescription vmstate_spapr_cap_dfp =3D { }, }; =20 +static bool spapr_cap_safe_cache_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + return !!(spapr->cmd_line_caps.caps[SPAPR_CAP_CFPC] & SPAPR_CAP_CMD_LI= NE); +} + +static int spapr_cap_safe_cache_pre_save(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_caps.caps[SPAPR_CAP_CFPC] =3D + spapr->cmd_line_caps.caps[SPAPR_CAP_CFPC]; + return 0; +} + +static int spapr_cap_safe_cache_pre_load(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_caps.caps[SPAPR_CAP_CFPC] =3D 0; + return 0; +} + +const VMStateDescription vmstate_spapr_cap_cfpc =3D { + .name =3D "spapr/cap_cfpc", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_safe_cache_needed, + .pre_save =3D spapr_cap_safe_cache_pre_save, + .pre_load =3D spapr_cap_safe_cache_pre_load, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig_caps.caps[SPAPR_CAP_CFPC], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + +static bool spapr_cap_safe_bounds_check_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + return !!(spapr->cmd_line_caps.caps[SPAPR_CAP_SBBC] & SPAPR_CAP_CMD_LI= NE); +} + +static int spapr_cap_safe_bounds_check_pre_save(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_caps.caps[SPAPR_CAP_SBBC] =3D + spapr->cmd_line_caps.caps[SPAPR_CAP_SBBC]; + return 0; +} + +static int spapr_cap_safe_bounds_check_pre_load(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_caps.caps[SPAPR_CAP_SBBC] =3D 0; + return 0; +} + +const VMStateDescription vmstate_spapr_cap_sbbc =3D { + .name =3D "spapr/cap_sbbc", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_safe_bounds_check_needed, + .pre_save =3D spapr_cap_safe_bounds_check_pre_save, + .pre_load =3D spapr_cap_safe_bounds_check_pre_load, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig_caps.caps[SPAPR_CAP_SBBC], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + +static bool spapr_cap_safe_indirect_branch_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + return !!(spapr->cmd_line_caps.caps[SPAPR_CAP_IBS] & SPAPR_CAP_CMD_LIN= E); +} + +static int spapr_cap_safe_indirect_branch_pre_save(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_caps.caps[SPAPR_CAP_IBS] =3D + spapr->cmd_line_caps.caps[SPAPR_CAP_IBS]; + return 0; +} + +static int spapr_cap_safe_indirect_branch_pre_load(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_caps.caps[SPAPR_CAP_IBS] =3D 0; + return 0; +} + +const VMStateDescription vmstate_spapr_cap_ibs =3D { + .name =3D "spapr/cap_ibs", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_safe_indirect_branch_needed, + .pre_save =3D spapr_cap_safe_indirect_branch_pre_save, + .pre_load =3D spapr_cap_safe_indirect_branch_pre_load, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig_caps.caps[SPAPR_CAP_IBS], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + void spapr_caps_reset(sPAPRMachineState *spapr) { sPAPRCapabilities caps; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 2804fbbf12..2db2f3e2e2 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -62,8 +62,14 @@ typedef enum { #define SPAPR_CAP_VSX 0x01 /* Decimal Floating Point */ #define SPAPR_CAP_DFP 0x02 +/* Cache Flush on Privilege Change */ +#define SPAPR_CAP_CFPC 0x03 +/* Speculation Barrier Bounds Checking */ +#define SPAPR_CAP_SBBC 0x04 +/* Indirect Branch Serialisation */ +#define SPAPR_CAP_IBS 0x05 /* Num Caps */ -#define SPAPR_CAP_NUM (SPAPR_CAP_DFP + 1) +#define SPAPR_CAP_NUM (SPAPR_CAP_IBS + 1) =20 /* * Capability Values @@ -73,6 +79,10 @@ typedef enum { /* Bool Caps */ #define SPAPR_CAP_OFF 0x00 #define SPAPR_CAP_ON 0x01 +/* Broken | Workaround | Fixed Caps */ +#define SPAPR_CAP_BROKEN 0x00 +#define SPAPR_CAP_WORKAROUND 0x01 +#define SPAPR_CAP_FIXED 0x02 =20 typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { @@ -763,6 +773,9 @@ qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq); extern const VMStateDescription vmstate_spapr_cap_htm; extern const VMStateDescription vmstate_spapr_cap_vsx; extern const VMStateDescription vmstate_spapr_cap_dfp; +extern const VMStateDescription vmstate_spapr_cap_cfpc; +extern const VMStateDescription vmstate_spapr_cap_sbbc; +extern const VMStateDescription vmstate_spapr_cap_ibs; =20 static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap) { diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index ce6c2f11f4..0abe0a0abb 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -932,6 +932,9 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_HYPERV_SYNIC2 148 #define KVM_CAP_HYPERV_VP_INDEX 149 #define KVM_CAP_S390_AIS_MIGRATION 150 +#define KVM_CAP_PPC_SAFE_CACHE 151 +#define KVM_CAP_PPC_SAFE_BOUNDS_CHECK 152 +#define KVM_CAP_PPC_SAFE_INDIRECT_BRANCH 153 =20 #ifdef KVM_CAP_IRQ_ROUTING =20 diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 518dd06e98..818499237c 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -89,6 +89,9 @@ static int cap_mmu_radix; static int cap_mmu_hash_v3; static int cap_resize_hpt; static int cap_ppc_pvr_compat; +static int cap_ppc_safe_cache; +static int cap_ppc_safe_bounds_check; +static int cap_ppc_safe_indirect_branch; =20 static uint32_t debug_inst_opcode; =20 @@ -147,6 +150,16 @@ int kvm_arch_init(MachineState *ms, KVMState *s) cap_mmu_radix =3D kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX); cap_mmu_hash_v3 =3D kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3); cap_resize_hpt =3D kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT); + cap_ppc_safe_cache =3D kvm_vm_check_extension(s, KVM_CAP_PPC_SAFE_CACH= E); + cap_ppc_safe_cache =3D cap_ppc_safe_cache > 0 ? cap_ppc_safe_cache : 0; + cap_ppc_safe_bounds_check =3D kvm_vm_check_extension(s, + KVM_CAP_PPC_SAFE_BOUNDS_CHECK); + cap_ppc_safe_bounds_check =3D cap_ppc_safe_bounds_check > 0 ? + cap_ppc_safe_bounds_check : 0; + cap_ppc_safe_indirect_branch =3D kvm_vm_check_extension(s, + KVM_CAP_PPC_SAFE_INDIRECT_BRANCH); + cap_ppc_safe_indirect_branch =3D cap_ppc_safe_indirect_branch > 0 ? + cap_ppc_safe_indirect_branch : 0; /* * Note: setting it to false because there is not such capability * in KVM at this moment. @@ -2456,6 +2469,21 @@ bool kvmppc_has_cap_mmu_hash_v3(void) return cap_mmu_hash_v3; } =20 +int kvmppc_get_cap_safe_cache(void) +{ + return cap_ppc_safe_cache; +} + +int kvmppc_get_cap_safe_bounds_check(void) +{ + return cap_ppc_safe_bounds_check; +} + +int kvmppc_get_cap_safe_indirect_branch(void) +{ + return cap_ppc_safe_indirect_branch; +} + PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) { uint32_t host_pvr =3D mfpvr(); diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index ecb55493cc..39830baa77 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -59,6 +59,9 @@ bool kvmppc_has_cap_fixup_hcalls(void); bool kvmppc_has_cap_htm(void); bool kvmppc_has_cap_mmu_radix(void); bool kvmppc_has_cap_mmu_hash_v3(void); +int kvmppc_get_cap_safe_cache(void); +int kvmppc_get_cap_safe_bounds_check(void); +int kvmppc_get_cap_safe_indirect_branch(void); int kvmppc_enable_hwrng(void); int kvmppc_put_books_sregs(PowerPCCPU *cpu); PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); @@ -290,6 +293,21 @@ static inline bool kvmppc_has_cap_mmu_hash_v3(void) return false; } =20 +static inline int kvmppc_get_cap_safe_cache(void) +{ + return 0; +} + +static inline int kvmppc_get_cap_safe_bounds_check(void) +{ + return 0; +} + +static inline int kvmppc_get_cap_safe_indirect_branch(void) +{ + return 0; +} + static inline int kvmppc_enable_hwrng(void) { return -1; --=20 2.13.6 From nobody Tue Oct 28 01:55:53 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1515489939568562.6361011943542; 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Tue, 09 Jan 2018 01:21:21 -0800 (PST) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Tue, 9 Jan 2018 20:21:03 +1100 Message-Id: <20180109092103.18458-4-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180109092103.18458-1-sjitindarsingh@gmail.com> References: <20180109092103.18458-1-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [QEMU-PPC] [RFC 3/3] target/ppc: Add H-Call H_GET_CPU_CHARACTERISTICS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: paulus@ozlabs.org, qemu-devel@nongnu.org, Suraj Jitindar Singh , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The new H-Call H_GET_CPU_CHARACTERISTICS is used by the guest to query behaviours and available characteristics of the cpu. Implement the handler for this new H-Call which formulates its response based on the setting of the new capabilities added in the previous patch. Note: Currently we return H_FUNCTION under TCG which will direct the guest to fall back to doing a displacement flush Discussion: Is TCG affected? Is there any point in telling the guest to do these workarounds on TCG given they're unlikely to translate to host instructions which have the desired effect? --- hw/ppc/spapr_hcall.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/spapr.h | 1 + 2 files changed, 82 insertions(+) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index 51eba52e86..b62b47c8d9 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1654,6 +1654,84 @@ static target_ulong h_client_architecture_support(Po= werPCCPU *cpu, return H_SUCCESS; } =20 +#define CPU_CHARACTERISTIC_SPEC_BARRIER (1ULL << (63 - 0)) +#define CPU_CHARACTERISTIC_BCCTR_SERIAL (1ULL << (63 - 1)) +#define CPU_CHARACTERISTIC_ORI_L1_CACHE (1ULL << (63 - 2)) +#define CPU_CHARACTERISTIC_MTTRIG_L1_CACHE (1ULL << (63 - 3)) +#define CPU_CHARACTERISTIC_L1_CACHE_PRIV (1ULL << (63 - 4)) +#define CPU_CHARACTERISTIC_BRANCH_HINTS (1ULL << (63 - 5)) +#define CPU_CHARACTERISTIC_MTTRIG_THR_RECONF (1ULL << (63 - 6)) +#define CPU_BEHAVIOUR_FAVOUR_SECURITY (1ULL << (63 - 0)) +#define CPU_BEHAVIOUR_L1_CACHE_FLUSH (1ULL << (63 - 1)) +#define CPU_BEHAVIOUR_SPEC_BARRIER (1ULL << (63 - 2)) + +static target_ulong h_get_cpu_characteristics(PowerPCCPU *cpu, + sPAPRMachineState *spapr, + target_ulong opcode, + target_ulong *args) +{ + uint64_t characteristics =3D CPU_CHARACTERISTIC_BRANCH_HINTS; + uint64_t behaviour =3D CPU_BEHAVIOUR_FAVOUR_SECURITY; + uint8_t safe_cache =3D spapr_get_cap(spapr, SPAPR_CAP_CFPC); + uint8_t safe_bounds_check =3D spapr_get_cap(spapr, SPAPR_CAP_SBBC); + uint8_t safe_indirect_branch =3D spapr_get_cap(spapr, SPAPR_CAP_IBS); + + /* TODO: Is TCG vulnerable? */ + if (!kvm_enabled()) { + return H_FUNCTION; + } + + switch (safe_cache) { + case SPAPR_CAP_WORKAROUND: + characteristics |=3D CPU_CHARACTERISTIC_ORI_L1_CACHE; + characteristics |=3D CPU_CHARACTERISTIC_MTTRIG_L1_CACHE; + characteristics |=3D CPU_CHARACTERISTIC_L1_CACHE_PRIV; + behaviour |=3D CPU_BEHAVIOUR_L1_CACHE_FLUSH; + break; + case SPAPR_CAP_FIXED: + break; + default: /* broken */ + if (safe_cache !=3D SPAPR_CAP_BROKEN) { + error_report("Invalid value for KVM_CAP_PPC_SAFE_CACHE (%d), a= ssuming broken", + safe_cache); + } + behaviour |=3D CPU_BEHAVIOUR_L1_CACHE_FLUSH; + break; + } + + switch (safe_bounds_check) { + case SPAPR_CAP_WORKAROUND: + characteristics |=3D CPU_CHARACTERISTIC_SPEC_BARRIER; + behaviour |=3D CPU_BEHAVIOUR_SPEC_BARRIER; + break; + case SPAPR_CAP_FIXED: + break; + default: /* broken */ + if (safe_bounds_check !=3D SPAPR_CAP_BROKEN) { + error_report("Invalid value for KVM_CAP_PPC_SAFE_BOUNDS_CHECK = (%d), assuming broken", + safe_bounds_check); + } + behaviour |=3D CPU_BEHAVIOUR_SPEC_BARRIER; + break; + } + + switch (safe_indirect_branch) { + case SPAPR_CAP_FIXED: + characteristics |=3D CPU_CHARACTERISTIC_BCCTR_SERIAL; + default: /* broken */ + if (safe_indirect_branch !=3D SPAPR_CAP_BROKEN) { + error_report("Invalid value for KVM_CAP_PPC_SAFE_INDIRECT_BRAN= CH (%d), assuming broken", + safe_indirect_branch); + } + break; + } + + args[0] =3D characteristics; + args[1] =3D behaviour; + + return H_SUCCESS; +} + static spapr_hcall_fn papr_hypercall_table[(MAX_HCALL_OPCODE / 4) + 1]; static spapr_hcall_fn kvmppc_hypercall_table[KVMPPC_HCALL_MAX - KVMPPC_HCA= LL_BASE + 1]; =20 @@ -1733,6 +1811,9 @@ static void hypercall_register_types(void) spapr_register_hypercall(H_INVALIDATE_PID, h_invalidate_pid); spapr_register_hypercall(H_REGISTER_PROC_TBL, h_register_process_table= ); =20 + /* hcall-get-cpu-characteristics */ + spapr_register_hypercall(H_GET_CPU_CHARACTERISTICS, h_get_cpu_characte= ristics); + /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenci= ate * here between the "CI" and the "CACHE" variants, they will use whate= ver * mapping attributes qemu is using. When using KVM, the kernel will diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 2db2f3e2e2..5677c38d2a 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -396,6 +396,7 @@ struct sPAPRMachineState { #define H_GET_HCA_INFO 0x1B8 #define H_GET_PERF_COUNT 0x1BC #define H_MANAGE_TRACE 0x1C0 +#define H_GET_CPU_CHARACTERISTICS 0x1C8 #define H_FREE_LOGICAL_LAN_BUFFER 0x1D4 #define H_QUERY_INT_STATE 0x1E4 #define H_POLL_PENDING 0x1D8 --=20 2.13.6