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Iglesias" , Peter Maydell , Andrey Smirnov Date: Wed, 3 Jan 2018 15:33:56 -0300 Message-Id: <20180103183418.23730-4-f4bug@amsat.org> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180103183418.23730-1-f4bug@amsat.org> References: <20180103183418.23730-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::244 Subject: [Qemu-devel] [PATCH v4 03/25] sdhci: add max-block-length capability (Spec v1) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Crosthwaite , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/sd/sdhci-internal.h | 1 - include/hw/sd/sdhci.h | 1 + hw/sd/sdhci.c | 38 +++++++++++++------------------------- 3 files changed, 14 insertions(+), 26 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index 6944fcaf00..0561e6eaf7 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -188,7 +188,6 @@ FIELD(SDHC_ACMD12ERRSTS, INDEX_ERR, 4, 1); #define SDHC_CAN_DO_ADMA2 0x00080000 #define SDHC_CAN_DO_ADMA1 0x00100000 #define SDHC_64_BIT_BUS_SUPPORT (1 << 28) -#define SDHC_CAPAB_BLOCKSIZE(x) (((x) >> 16) & 0x3) FIELD(SDHC_CAPAB, TOCLKFREQ, 0, 6); FIELD(SDHC_CAPAB, TOUNIT, 7, 1); FIELD(SDHC_CAPAB, BASECLKFREQ, 8, 8); diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 266030dc8d..2703da1d5a 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -103,6 +103,7 @@ typedef struct SDHCIState { bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */ uint8_t spec_version; struct { + uint16_t max_blk_len; bool suspend; bool high_speed; bool sdma; diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 5e08949b37..e192f1e653 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -46,9 +46,6 @@ #define SDHC_CAPAB_64BITBUS 0ul /* 64-bit System Bus Support = */ #define SDHC_CAPAB_ADMA1 1ul /* ADMA1 support */ #define SDHC_CAPAB_ADMA2 1ul /* ADMA2 support */ -/* Maximum host controller R/W buffers size - * Possible values: 512, 1024, 2048 bytes */ -#define SDHC_CAPAB_MAXBLOCKLENGTH 512ul /* Maximum clock frequency for SDclock in MHz * value in range 10-63 MHz, 0 - not defined */ #define SDHC_CAPAB_BASECLKFREQ 52ul @@ -62,16 +59,6 @@ #error Capabilities features can have value 0 or 1 only! #endif =20 -#if SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 512 -#define MAX_BLOCK_LENGTH 0ul -#elif SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 1024 -#define MAX_BLOCK_LENGTH 1ul -#elif SDHC_CAPAB_MAXBLOCKLENGTH =3D=3D 2048 -#define MAX_BLOCK_LENGTH 2ul -#else -#error Max host controller block size can have value 512, 1024 or 2048 onl= y! -#endif - #if (SDHC_CAPAB_BASECLKFREQ > 0 && SDHC_CAPAB_BASECLKFREQ < 10) || \ SDHC_CAPAB_BASECLKFREQ > 63 #error SDclock frequency can have value in range 0, 10-63 only! @@ -83,7 +70,7 @@ =20 #define SDHC_CAPAB_REG_DEFAULT \ ((SDHC_CAPAB_64BITBUS << 28) | (SDHC_CAPAB_ADMA1 << 20) | \ - (SDHC_CAPAB_ADMA2 << 19) | (MAX_BLOCK_LENGTH << 16) | \ + (SDHC_CAPAB_ADMA2 << 19) | \ (SDHC_CAPAB_BASECLKFREQ << 8) | (SDHC_CAPAB_TOUNIT << 7) | \ (SDHC_CAPAB_TOCLKFREQ)) =20 @@ -92,9 +79,17 @@ static void sdhci_init_capareg(SDHCIState *s, Error **errp) { uint64_t capareg =3D 0; + uint32_t val; =20 switch (s->spec_version) { case 1: + val =3D ctz32(s->cap.max_blk_len >> 9); + if (val >=3D 0b11) { + error_setg(errp, "block size can be 512, 1024 or 2048 only"); + return; + } + capareg =3D FIELD_DP64(capareg, SDHC_CAPAB, MAXBLOCKLENGTH, val); + capareg =3D FIELD_DP64(capareg, SDHC_CAPAB, HIGHSPEED, s->cap.high= _speed); capareg =3D FIELD_DP64(capareg, SDHC_CAPAB, SDMA, s->cap.sdma); capareg =3D FIELD_DP64(capareg, SDHC_CAPAB, SUSPRESUME, s->cap.sus= pend); @@ -1175,17 +1170,7 @@ static const MemoryRegionOps sdhci_mmio_ops =3D { =20 static inline unsigned int sdhci_get_fifolen(SDHCIState *s) { - switch (SDHC_CAPAB_BLOCKSIZE(s->capareg)) { - case 0: - return 512; - case 1: - return 1024; - case 2: - return 2048; - default: - hw_error("SDHC: unsupported value for maximum block size\n"); - return 0; - } + return 1 << (9 + FIELD_EX32(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH)); } =20 static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp) @@ -1319,6 +1304,9 @@ const VMStateDescription sdhci_vmstate =3D { static Property sdhci_properties[] =3D { DEFINE_PROP_UINT8("sd-spec-version", SDHCIState, spec_version, 1), =20 + /* Maximum host controller R/W buffers size + * Possible values: 512, 1024, 2048 bytes */ + DEFINE_PROP_UINT16("max-block-length", SDHCIState, cap.max_blk_len, 51= 2), /* DMA */ DEFINE_PROP_BOOL("sdma", SDHCIState, cap.sdma, true), /* Suspend/resume support */ --=20 2.15.1