From nobody Tue Oct 28 04:13:16 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1514937314565812.1150380921318; Tue, 2 Jan 2018 15:55:14 -0800 (PST) Received: from localhost ([::1]:59790 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWWOn-0001JJ-NA for importer@patchew.org; Tue, 02 Jan 2018 18:55:13 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52433) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWWBU-00079q-Cc for qemu-devel@nongnu.org; Tue, 02 Jan 2018 18:41:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eWWBT-0003As-EG for qemu-devel@nongnu.org; Tue, 02 Jan 2018 18:41:28 -0500 Received: from mout.kundenserver.de ([212.227.126.134]:61964) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eWWBT-0003AS-3H for qemu-devel@nongnu.org; Tue, 02 Jan 2018 18:41:27 -0500 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue005 [212.227.15.167]) with ESMTPSA (Nemesis) id 0Mcj5x-1eFGRp2eVl-00HwrE; Wed, 03 Jan 2018 00:41:25 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 3 Jan 2018 00:41:05 +0100 Message-Id: <20180102234108.32713-15-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180102234108.32713-1-laurent@vivier.eu> References: <20180102234108.32713-1-laurent@vivier.eu> X-Provags-ID: V03:K0:Rxe26Cp6/t8My5pbeyU650Wzfp3dU79byqagG1SDnmaabje7Y9S nSczj1rrVZtJUc5kraZK/2BxM6npUmK+0nDcZW6EKj6ACEZZ9VLvLmj415md2Oz0siMdYM6 LL55AnwIPmNohQh3+TM3wPURugvOuaxnRQrPFq1hNsNxr+ztClHJsSFzobyjr1WevLXgu53 a41+hILg4OJQ/ap+Ewwag== X-UI-Out-Filterresults: notjunk:1;V01:K0:LORBa1VcmVg=:NIzZWhPM5ptflDOEGYragy 3FjDqBwBWsOv4HmbLD2uxu8PSKJ3yOYgFolbo3iuqjwzgJdE73rOnpmf4D/15qE3jHCINoj98 4i6jj3Aqt5XQkGLnS2TJkcBjUp/f4nP+kl8LLoEjbWNeuqiX0u00MeHbVKKAWFn37nFec6H6b JQtqqv1scmyEc9NN/24GzudbBIU47QwzAvaeHMzrPsNT2U9x58RA9NiKdmk4dfIZG/2E1Wh16 eZnuCLfPnUHm013UF6ClNZzNy0rka/4Zk4To9xZB8U7ENEcQe59fK+jEoLZ+H6Djq40XrINQc nNGs730hXdyKNnLvfh4LzHG9mKYJxHyU4UYeJRk6mSfcIO0KbD2CFixp5/0xyCkVaT6vDMOmw nxcw8zjQceZA53+wGA9aWTi9AX8C/b+in2uyM5EJsE/wd0BwSiNELAaG1JOCO838459kZH+Jq y3YIaR6/4gVefiznfbBqTIhz9Ck1FlWG42rxsXF35xcluDnz1wU6K4Ve2sztHszFtWMPF9obE d9+EB5nadrVGXH/NEueN7KhlOr4EsOVWMDeLn0mRJh0r6myp/pnVXWX6Aq6mdsrd3xekDV6OH ofj+CRvzWwbDUeRixkwIHH/80wpIvAnV/b7titrUqBAivaRP5fclsGp8msYMZoELZGsl6h2wl rtdMAelmd70amXblFxFByZcRyoKILjAyK7j6H3pBEYJ+D9g9+a0vdg5MP+y8VNXg/+mWxzXRS MRjEzJSURtot4JKMVBhvwvQVUhthT/On/7hjTQ== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.134 Subject: [Qemu-devel] [PATCH v6 14/17] target/m68k: add 680x0 "move to SR" instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Richard Henderson , Laurent Vivier Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Some cleanup, and allows SR to be moved from any addressing mode. Previous code was wrong for coldfire: coldfire also allows to use addressing mode to set SR/CCR. It only supports Data register to get SR/CCR (move from) Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/translate.c | 38 ++++++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index d879574c1a..d007943d93 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -2162,27 +2162,34 @@ static void gen_set_sr_im(DisasContext *s, uint16_t= val, int ccr_only) tcg_gen_movi_i32(QREG_CC_N, val & CCF_N ? -1 : 0); tcg_gen_movi_i32(QREG_CC_X, val & CCF_X ? 1 : 0); } else { - gen_helper_set_sr(cpu_env, tcg_const_i32(val)); + TCGv sr =3D tcg_const_i32(val); + gen_helper_set_sr(cpu_env, sr); + tcg_temp_free(sr); } set_cc_op(s, CC_OP_FLAGS); } =20 -static void gen_set_sr(CPUM68KState *env, DisasContext *s, uint16_t insn, - int ccr_only) +static void gen_set_sr(DisasContext *s, TCGv val, int ccr_only) { - if ((insn & 0x38) =3D=3D 0) { - if (ccr_only) { - gen_helper_set_ccr(cpu_env, DREG(insn, 0)); - } else { - gen_helper_set_sr(cpu_env, DREG(insn, 0)); - } - set_cc_op(s, CC_OP_FLAGS); - } else if ((insn & 0x3f) =3D=3D 0x3c) { + if (ccr_only) { + gen_helper_set_ccr(cpu_env, val); + } else { + gen_helper_set_sr(cpu_env, val); + } + set_cc_op(s, CC_OP_FLAGS); +} + +static void gen_move_to_sr(CPUM68KState *env, DisasContext *s, uint16_t in= sn, + bool ccr_only) +{ + if ((insn & 0x3f) =3D=3D 0x3c) { uint16_t val; val =3D read_im16(env, s); gen_set_sr_im(s, val, ccr_only); } else { - disas_undef(env, s, insn); + TCGv src; + SRC_EA(env, src, OS_WORD, 0, NULL); + gen_set_sr(s, src, ccr_only); } } =20 @@ -2557,7 +2564,7 @@ DISAS_INSN(neg) =20 DISAS_INSN(move_to_ccr) { - gen_set_sr(env, s, insn, 1); + gen_move_to_sr(env, s, insn, true); } =20 DISAS_INSN(not) @@ -4410,7 +4417,7 @@ DISAS_INSN(move_to_sr) gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } - gen_set_sr(env, s, insn, 0); + gen_move_to_sr(env, s, insn, false); gen_lookup_tb(s); } =20 @@ -5557,9 +5564,8 @@ void register_m68k_insns (CPUM68KState *env) BASE(move_to_ccr, 44c0, ffc0); INSN(not, 4680, fff8, CF_ISA_A); INSN(not, 4600, ff00, M68000); - INSN(undef, 46c0, ffc0, M68000); #if defined(CONFIG_SOFTMMU) - INSN(move_to_sr, 46c0, ffc0, CF_ISA_A); + BASE(move_to_sr, 46c0, ffc0); #endif INSN(nbcd, 4800, ffc0, M68000); INSN(linkl, 4808, fff8, M68000); --=20 2.14.3