From nobody Tue Oct 28 12:15:23 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15148561366411011.7573191459078; Mon, 1 Jan 2018 17:22:16 -0800 (PST) Received: from localhost ([::1]:50929 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWBHT-0002AO-Sv for importer@patchew.org; Mon, 01 Jan 2018 20:22:15 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36102) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eWB6L-0001XT-3I for qemu-devel@nongnu.org; Mon, 01 Jan 2018 20:10:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eWB6J-00058B-F7 for qemu-devel@nongnu.org; Mon, 01 Jan 2018 20:10:45 -0500 Received: from mout.kundenserver.de ([212.227.126.133]:55187) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eWB6J-00056g-24 for qemu-devel@nongnu.org; Mon, 01 Jan 2018 20:10:43 -0500 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue001 [212.227.15.167]) with ESMTPSA (Nemesis) id 0MNyjT-1eY52g0TyV-007Xzs; Tue, 02 Jan 2018 02:10:41 +0100 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 2 Jan 2018 02:10:29 +0100 Message-Id: <20180102011032.30056-15-laurent@vivier.eu> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180102011032.30056-1-laurent@vivier.eu> References: <20180102011032.30056-1-laurent@vivier.eu> X-Provags-ID: V03:K0:zWxwhLwV/T0h1f1y5Ye7W5fi/XkNa6SaAo74eLm63UM3xMy6rPP 1yJFzGLtUvIPkpohhM7yPxc29cIVcToQsODZzPfNzzhiiGs2NQkxmebTeIaHb0VKWs1XfKe mNbdFiOio6OnkGYXP5YE6b/Iuiip6AW2uDocFKuNsWl6undjFNrWwqbh7itbpxpN4lvi+kN 5vspFegqFZ+f+HBCe+yZQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:XMsfFQQB4pc=:eco40HwCIokDgNusoGmxdJ N4We2S/X93W6t3jr5Ul2MSmeI6Echab26c3rlVUvzqdAp3i1PjxySy0EigI2cbnKh8YQfagg+ ajwRSpaJTqY4+IBkUOJXJH5H1Gf4rCyDg4N5DQqx7pH9kwhyM9IhRg4mAnYfDIXCA9eXmsaur hx7NcTtl3jLNybZ4MuLCpIwkdMJ3ui83WCYgHcYC2qzvgz5EkmlikFyolUgs2iHha33OEFR0k JQYp9GjA2292whQv7rImb9GX1lGSMWMPSIV39pxAsePUFijaQ3x7aBri3FdDsLRitVOoJ+WWb eDFkhh4TNGiynsCZaiu+r3IE0icROudn5euD7Jbp4G2RolI4bV8OKAdnbipNvWHuuwzZSDKGR dsH4OJntnzwSqbprWpOddTM1NRRkVVKG4GARqc53j73ic8L22H/TFnoIu3RH7NkC+Xyi+mKpB wA5QVOWUATMM6UtRKCSKKMjNHj8Ce2QGxKn+rzOXjUMiYxYRfzl2UFqoLX3d5+gIPALXuY7PK 2b2O7sPtqA3stc3p9fUGYTSb3hBh8iXqRadVu7kV8wZ8ieY+EToxnVFrhBqg7l/30IBvWF6s5 pdXKqbybjgKV7g3O1ANcBd8DswirL770HPBYmvOQUSTK4GSyzyW4dAQNjnCvFk6TxttP6We8v 7lhQ/rxIR4gOyujihCJqiyVhk3CKebpVeUkHeI2J6RROXw97xinTIvr/imsUC4fU2cKqnIrc2 VMeVXFSIipXdqGXpBnEP//JnkfihmX9Dt150aw== X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.126.133 Subject: [Qemu-devel] [PATCH v5 14/17] target/m68k: add 680x0 "move to SR" instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Laurent Vivier Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Some cleanup, and allows SR to be moved from any addressing mode. Previous code was wrong for coldfire: coldfire also allows to use addressing mode to set SR/CCR. It only supports Data register to get SR/CCR (move from) Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/translate.c | 38 ++++++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index cfe9fd34df..1a462064be 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -2162,27 +2162,34 @@ static void gen_set_sr_im(DisasContext *s, uint16_t= val, int ccr_only) tcg_gen_movi_i32(QREG_CC_N, val & CCF_N ? -1 : 0); tcg_gen_movi_i32(QREG_CC_X, val & CCF_X ? 1 : 0); } else { - gen_helper_set_sr(cpu_env, tcg_const_i32(val)); + TCGv sr =3D tcg_const_i32(val); + gen_helper_set_sr(cpu_env, sr); + tcg_temp_free(sr); } set_cc_op(s, CC_OP_FLAGS); } =20 -static void gen_set_sr(CPUM68KState *env, DisasContext *s, uint16_t insn, - int ccr_only) +static void gen_set_sr(DisasContext *s, TCGv val, int ccr_only) { - if ((insn & 0x38) =3D=3D 0) { - if (ccr_only) { - gen_helper_set_ccr(cpu_env, DREG(insn, 0)); - } else { - gen_helper_set_sr(cpu_env, DREG(insn, 0)); - } - set_cc_op(s, CC_OP_FLAGS); - } else if ((insn & 0x3f) =3D=3D 0x3c) { + if (ccr_only) { + gen_helper_set_ccr(cpu_env, val); + } else { + gen_helper_set_sr(cpu_env, val); + } + set_cc_op(s, CC_OP_FLAGS); +} + +static void gen_move_to_sr(CPUM68KState *env, DisasContext *s, uint16_t in= sn, + bool ccr_only) +{ + if ((insn & 0x3f) =3D=3D 0x3c) { uint16_t val; val =3D read_im16(env, s); gen_set_sr_im(s, val, ccr_only); } else { - disas_undef(env, s, insn); + TCGv src; + SRC_EA(env, src, OS_WORD, 0, NULL); + gen_set_sr(s, src, ccr_only); } } =20 @@ -2557,7 +2564,7 @@ DISAS_INSN(neg) =20 DISAS_INSN(move_to_ccr) { - gen_set_sr(env, s, insn, 1); + gen_move_to_sr(env, s, insn, true); } =20 DISAS_INSN(not) @@ -4471,7 +4478,7 @@ DISAS_INSN(move_to_sr) gen_exception(s, s->insn_pc, EXCP_PRIVILEGE); return; } - gen_set_sr(env, s, insn, 0); + gen_move_to_sr(env, s, insn, false); gen_lookup_tb(s); } =20 @@ -5618,9 +5625,8 @@ void register_m68k_insns (CPUM68KState *env) BASE(move_to_ccr, 44c0, ffc0); INSN(not, 4680, fff8, CF_ISA_A); INSN(not, 4600, ff00, M68000); - INSN(undef, 46c0, ffc0, M68000); #if defined(CONFIG_SOFTMMU) - INSN(move_to_sr, 46c0, ffc0, CF_ISA_A); + BASE(move_to_sr, 46c0, ffc0); #endif INSN(nbcd, 4800, ffc0, M68000); INSN(linkl, 4808, fff8, M68000); --=20 2.14.3