From nobody Tue Feb 10 10:59:30 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513658130323576.720668251433; Mon, 18 Dec 2017 20:35:30 -0800 (PST) Received: from localhost ([::1]:45868 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eR9cj-00055z-6E for importer@patchew.org; Mon, 18 Dec 2017 23:35:25 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34549) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eR9XP-00018D-Nt for qemu-devel@nongnu.org; Mon, 18 Dec 2017 23:29:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eR9XN-0007n6-1g for qemu-devel@nongnu.org; Mon, 18 Dec 2017 23:29:55 -0500 Received: from ozlabs.org ([103.22.144.67]:45735) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eR9XM-0007jC-Iu; Mon, 18 Dec 2017 23:29:52 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3z14gb68bDz9t2W; Tue, 19 Dec 2017 15:29:47 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1513657787; bh=LqbDFPkCaFaNE6ULDt8mAYDpo6NwMXOWdcE43pEr3vY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GhkTWocYdiThF7jNBlvbM4JKXOl4Qw/tG9RD4ek70E3Nmt/2RjzRBfsQU+tBmO8JO cuGr0048/i2c0C4XvToO65HH5ShT/LHb3P0MgcIUuAUqaC0YyuvC2Oidsp2IXlOrwN YBmaGhloNDcmsh9gojr4vMjSzNTL/0OYSDc4tWZg= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 19 Dec 2017 15:29:29 +1100 Message-Id: <20171219042942.29297-2-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171219042942.29297-1-david@gibson.dropbear.id.au> References: <20171219042942.29297-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 01/14] target-ppc: optimize cmp translation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, groug@kaod.org, qemu-ppc@nongnu.org, "pbonzini@redhat.com" , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "pbonzini@redhat.com" We know that only one bit (in addition to SO) is going to be set in the condition register, so do two movconds instead of three setconds, three shifts and two ORs. For ppc64-linux-user, the code size reduction is around 5% and the performance improvement slightly less than 10%. For softmmu, the improvement is around 5%. Signed-off-by: Paolo Bonzini Signed-off-by: David Gibson --- target/ppc/translate.c | 29 ++++++++++++----------------- 1 file changed, 12 insertions(+), 17 deletions(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 4075fc8589..8a6bd329d0 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -605,27 +605,22 @@ static opc_handler_t invalid_handler =3D { static inline void gen_op_cmp(TCGv arg0, TCGv arg1, int s, int crf) { TCGv t0 =3D tcg_temp_new(); - TCGv_i32 t1 =3D tcg_temp_new_i32(); - - tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so); - - tcg_gen_setcond_tl((s ? TCG_COND_LT: TCG_COND_LTU), t0, arg0, arg1); - tcg_gen_trunc_tl_i32(t1, t0); - tcg_gen_shli_i32(t1, t1, CRF_LT_BIT); - tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t1); + TCGv t1 =3D tcg_temp_new(); + TCGv_i32 t =3D tcg_temp_new_i32(); =20 - tcg_gen_setcond_tl((s ? TCG_COND_GT: TCG_COND_GTU), t0, arg0, arg1); - tcg_gen_trunc_tl_i32(t1, t0); - tcg_gen_shli_i32(t1, t1, CRF_GT_BIT); - tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t1); + tcg_gen_movi_tl(t0, CRF_EQ); + tcg_gen_movi_tl(t1, CRF_LT); + tcg_gen_movcond_tl((s ? TCG_COND_LT : TCG_COND_LTU), t0, arg0, arg1, t= 1, t0); + tcg_gen_movi_tl(t1, CRF_GT); + tcg_gen_movcond_tl((s ? TCG_COND_GT : TCG_COND_GTU), t0, arg0, arg1, t= 1, t0); =20 - tcg_gen_setcond_tl(TCG_COND_EQ, t0, arg0, arg1); - tcg_gen_trunc_tl_i32(t1, t0); - tcg_gen_shli_i32(t1, t1, CRF_EQ_BIT); - tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t1); + tcg_gen_trunc_tl_i32(t, t0); + tcg_gen_trunc_tl_i32(cpu_crf[crf], cpu_so); + tcg_gen_or_i32(cpu_crf[crf], cpu_crf[crf], t); =20 tcg_temp_free(t0); - tcg_temp_free_i32(t1); + tcg_temp_free(t1); + tcg_temp_free_i32(t); } =20 static inline void gen_op_cmpi(TCGv arg0, target_ulong arg1, int s, int cr= f) --=20 2.14.3