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[174.21.7.63]) by smtp.gmail.com with ESMTPSA id h69sm26553411pfe.107.2017.12.18.09.30.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Dec 2017 09:30:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=w97zHg5wUthGNuq+jeq9m01tyUZWy6RWue7I9jUXJeY=; b=brS4wGpInY67iIfHqFY4TgtdQY02Ugw6ZeQdRm8wRIl3Cxwf3SP5h7RuZvN38MJtEF DD47op3Sqyg07R7uN1ANE9ZJVYJgfI/YJsPw2E16VtzzMLuKmaPpK+r+ry5IqeGhxaDe jCpdq1M9SxeK6CiTFVOJbx6lUznJzPbQxTamg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=w97zHg5wUthGNuq+jeq9m01tyUZWy6RWue7I9jUXJeY=; b=s3cuT4dPOmmi+mCzDjdIDGX/wbeq6EwZvZvQ9aI31hDkJJYA5Ml/GErqxc9eQZ20ib I4MOX1gbWgFabCmUZtcM1BXZ3ozDXqBAKigaztGND4ffi4MQuJVEhK+3Mqz8sscZozCb 053EDlva3soupf/Rl8MXvE2ceBjVwlGYWQ+XmcZmcTEpBGXVxudA9b4WtOBP+csCK4fM zIgbpzVrqokdjjvgxTdM7uLG5R4KNMKnGR9q6GmfYKBSUDbKQTcK8gZpYCR98FtTlxjg l/B7hZz5YSTjIhJ4chuAQVbY8srk0fJhGJgA2JsSDRJtyaVV+3GP0wrz+0evO4FP6dGT yE1Q== X-Gm-Message-State: AKGB3mI0XwzkQTt8osg/Hmonv6mYDqjpgJfChUNJ268asW/A3Kq7JKo/ ZzdYGj4repODAO7IiS0Xa8UYzJMPVy8= X-Google-Smtp-Source: ACJfBotgWb2b3dTfZDhHdyM0YrZ/1kBlh0W28G5H6HJq8HCcK8dNYF1ntZgGiULX89Nos1A0ImPb8Q== X-Received: by 10.101.85.3 with SMTP id f3mr384392pgr.45.1513618231159; Mon, 18 Dec 2017 09:30:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 18 Dec 2017 09:30:17 -0800 Message-Id: <20171218173022.18418-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218173022.18418-1-richard.henderson@linaro.org> References: <20171218173022.18418-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [PATCH 4/9] target/arm: Use pointers in neon tbl helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Rather than passing a regno to the helper, pass pointers to the vector register directly. This eliminates the need to pass in the environment pointer and reduces the number of places that directly access env->vfp.regs[]. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/helper.h | 2 +- target/arm/op_helper.c | 17 +++++++---------- target/arm/translate.c | 8 ++++---- 3 files changed, 12 insertions(+), 15 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index d39ca11cbd..206e39a207 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -201,7 +201,7 @@ DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f3= 2, ptr) DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr) DEF_HELPER_2(recpe_u32, i32, i32, ptr) DEF_HELPER_FLAGS_2(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32, ptr) -DEF_HELPER_5(neon_tbl, i32, env, i32, i32, i32, i32) +DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32) =20 DEF_HELPER_3(shl_cc, i32, env, i32, i32) DEF_HELPER_3(shr_cc, i32, env, i32, i32) diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index c2bb4f3a43..df3aab170b 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -54,20 +54,17 @@ static int exception_target_el(CPUARMState *env) return target_el; } =20 -uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def, - uint32_t rn, uint32_t maxindex) +uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn, + uint32_t maxindex) { - uint32_t val; - uint32_t tmp; - int index; - int shift; - uint64_t *table; - table =3D (uint64_t *)&env->vfp.regs[rn]; + uint32_t val, shift; + uint64_t *table =3D vn; + val =3D 0; for (shift =3D 0; shift < 32; shift +=3D 8) { - index =3D (ireg >> shift) & 0xff; + uint32_t index =3D (ireg >> shift) & 0xff; if (index < maxindex) { - tmp =3D (table[index >> 3] >> ((index & 7) << 3)) & 0xff; + uint32_t tmp =3D (table[index >> 3] >> ((index & 7) << 3)) & 0= xff; val |=3D tmp << shift; } else { val |=3D def & (0xff << shift); diff --git a/target/arm/translate.c b/target/arm/translate.c index 68e928640f..55afd29b21 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7623,9 +7623,9 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) tcg_gen_movi_i32(tmp, 0); } tmp2 =3D neon_load_reg(rm, 0); - tmp4 =3D tcg_const_i32(rn); + ptr1 =3D vfp_reg_ptr(true, rn); tmp5 =3D tcg_const_i32(n); - gen_helper_neon_tbl(tmp2, cpu_env, tmp2, tmp, tmp4, tmp5); + gen_helper_neon_tbl(tmp2, tmp2, tmp, ptr1, tmp5); tcg_temp_free_i32(tmp); if (insn & (1 << 6)) { tmp =3D neon_load_reg(rd, 1); @@ -7634,9 +7634,9 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) tcg_gen_movi_i32(tmp, 0); } tmp3 =3D neon_load_reg(rm, 1); - gen_helper_neon_tbl(tmp3, cpu_env, tmp3, tmp, tmp4, tmp5); + gen_helper_neon_tbl(tmp3, tmp3, tmp, ptr1, tmp5); tcg_temp_free_i32(tmp5); - tcg_temp_free_i32(tmp4); + tcg_temp_free_ptr(ptr1); neon_store_reg(rd, 0, tmp2); neon_store_reg(rd, 1, tmp3); tcg_temp_free_i32(tmp); --=20 2.14.3