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[174.21.7.63]) by smtp.gmail.com with ESMTPSA id h69sm26553411pfe.107.2017.12.18.09.30.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Dec 2017 09:30:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Z9slflrqdu44S5FcR6VciGdSdyJ4Puo4CACj/wvVVL4=; b=PdTTqyIKwqMAuAUK/Wfs9zaEfyrBaBeIGCzX7m1W4O1kp0DhHY1DQV2SmUy8z9GdVz XrRQ0UoygvvOgb7A2JXmLHN/g1zCfmPIm7wqX6ZejR+AISMRFmO93El5ilDN8OA2rzTy dikyoVMen7TQO3DOlwD2+rYwZ0freosWNSoEU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Z9slflrqdu44S5FcR6VciGdSdyJ4Puo4CACj/wvVVL4=; b=MJ+Gsua72Jxy60J4zaw6/Aftlh/KLsmVRaY8QME+SmbRGz+heU0ay7CATzDXskGFgW TmTg1P1cH/IVzcyXQ3aHFhMJpf0CNSk3044+My15vSKr7jr6oGaDbv9pnB19vpczaWmK gWDP1vNltQ4cExXOuqffDEvVFbLuKE3zur/aH8CnFzFtZTkL7DWlzBCYTCI+fPTyCJCe 3VCZ0hnpgkFFsxj/2MkGeljTGvACRd+JRwMvpJshwJOSTpaDwmBv2c8jENiN71+G2nbw 20sq6/8PVz9FWS3dGvt9C/ICTkSxUnsIjq/jwR6s/toxg0lTf5s+EjAnm9g1ENBtud55 BAPQ== X-Gm-Message-State: AKGB3mIEW2hmvuuBidTU2XPWAnX9bCB08n0qw+QTqEkjvdCx4/SHKA0b okb9YhFK4pU6nqLHx+iGoGD8zCnN0Yg= X-Google-Smtp-Source: ACJfBouoX8p0HmFUZ9FRPX66yxIIR1EApM0o4yZ0Rg41vbC5jgCsSxfcFx4+NsvkShgEZrKSzxlAdg== X-Received: by 10.101.68.129 with SMTP id l1mr383764pgq.53.1513618229507; Mon, 18 Dec 2017 09:30:29 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 18 Dec 2017 09:30:16 -0800 Message-Id: <20171218173022.18418-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218173022.18418-1-richard.henderson@linaro.org> References: <20171218173022.18418-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PATCH 3/9] target/arm: Use pointers in neon zip/uzp helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Rather than passing regnos to the helpers, pass pointers to the vector registers directly. This eliminates the need to pass in the environment pointer and reduces the number of places that directly access env->vfp.regs[]. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/helper.h | 20 +++--- target/arm/neon_helper.c | 162 +++++++++++++++++++++++++------------------= ---- target/arm/translate.c | 42 ++++++------ 3 files changed, 120 insertions(+), 104 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index f9dd7432c1..d39ca11cbd 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -528,16 +528,16 @@ DEF_HELPER_3(iwmmxt_muladdsl, i64, i64, i32, i32) DEF_HELPER_3(iwmmxt_muladdsw, i64, i64, i32, i32) DEF_HELPER_3(iwmmxt_muladdswl, i64, i64, i32, i32) =20 -DEF_HELPER_3(neon_unzip8, void, env, i32, i32) -DEF_HELPER_3(neon_unzip16, void, env, i32, i32) -DEF_HELPER_3(neon_qunzip8, void, env, i32, i32) -DEF_HELPER_3(neon_qunzip16, void, env, i32, i32) -DEF_HELPER_3(neon_qunzip32, void, env, i32, i32) -DEF_HELPER_3(neon_zip8, void, env, i32, i32) -DEF_HELPER_3(neon_zip16, void, env, i32, i32) -DEF_HELPER_3(neon_qzip8, void, env, i32, i32) -DEF_HELPER_3(neon_qzip16, void, env, i32, i32) -DEF_HELPER_3(neon_qzip32, void, env, i32, i32) +DEF_HELPER_FLAGS_2(neon_unzip8, TCG_CALL_NO_RWG, void, ptr, ptr) +DEF_HELPER_FLAGS_2(neon_unzip16, TCG_CALL_NO_RWG, void, ptr, ptr) +DEF_HELPER_FLAGS_2(neon_qunzip8, TCG_CALL_NO_RWG, void, ptr, ptr) +DEF_HELPER_FLAGS_2(neon_qunzip16, TCG_CALL_NO_RWG, void, ptr, ptr) +DEF_HELPER_FLAGS_2(neon_qunzip32, TCG_CALL_NO_RWG, void, ptr, ptr) +DEF_HELPER_FLAGS_2(neon_zip8, TCG_CALL_NO_RWG, void, ptr, ptr) +DEF_HELPER_FLAGS_2(neon_zip16, TCG_CALL_NO_RWG, void, ptr, ptr) +DEF_HELPER_FLAGS_2(neon_qzip8, TCG_CALL_NO_RWG, void, ptr, ptr) +DEF_HELPER_FLAGS_2(neon_qzip16, TCG_CALL_NO_RWG, void, ptr, ptr) +DEF_HELPER_FLAGS_2(neon_qzip32, TCG_CALL_NO_RWG, void, ptr, ptr) =20 DEF_HELPER_FLAGS_3(crypto_aese, TCG_CALL_NO_RWG, void, ptr, ptr, i32) DEF_HELPER_FLAGS_3(crypto_aesmc, TCG_CALL_NO_RWG, void, ptr, ptr, i32) diff --git a/target/arm/neon_helper.c b/target/arm/neon_helper.c index ebdf7c9b10..689491cad3 100644 --- a/target/arm/neon_helper.c +++ b/target/arm/neon_helper.c @@ -2027,12 +2027,12 @@ uint64_t HELPER(neon_acgt_f64)(uint64_t a, uint64_t= b, void *fpstp) =20 #define ELEM(V, N, SIZE) (((V) >> ((N) * (SIZE))) & ((1ull << (SIZE)) - 1)) =20 -void HELPER(neon_qunzip8)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_qunzip8)(void *vd, void *vm) { - uint64_t zm0 =3D float64_val(env->vfp.regs[rm]); - uint64_t zm1 =3D float64_val(env->vfp.regs[rm + 1]); - uint64_t zd0 =3D float64_val(env->vfp.regs[rd]); - uint64_t zd1 =3D float64_val(env->vfp.regs[rd + 1]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd0 =3D rd[0], zd1 =3D rd[1]; + uint64_t zm0 =3D rm[0], zm1 =3D rm[1]; + uint64_t d0 =3D ELEM(zd0, 0, 8) | (ELEM(zd0, 2, 8) << 8) | (ELEM(zd0, 4, 8) << 16) | (ELEM(zd0, 6, 8) << 24) | (ELEM(zd1, 0, 8) << 32) | (ELEM(zd1, 2, 8) << 40) @@ -2049,18 +2049,19 @@ void HELPER(neon_qunzip8)(CPUARMState *env, uint32_= t rd, uint32_t rm) | (ELEM(zm0, 5, 8) << 16) | (ELEM(zm0, 7, 8) << 24) | (ELEM(zm1, 1, 8) << 32) | (ELEM(zm1, 3, 8) << 40) | (ELEM(zm1, 5, 8) << 48) | (ELEM(zm1, 7, 8) << 56); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rm + 1] =3D make_float64(m1); - env->vfp.regs[rd] =3D make_float64(d0); - env->vfp.regs[rd + 1] =3D make_float64(d1); + + rm[0] =3D m0; + rm[1] =3D m1; + rd[0] =3D d0; + rd[1] =3D d1; } =20 -void HELPER(neon_qunzip16)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_qunzip16)(void *vd, void *vm) { - uint64_t zm0 =3D float64_val(env->vfp.regs[rm]); - uint64_t zm1 =3D float64_val(env->vfp.regs[rm + 1]); - uint64_t zd0 =3D float64_val(env->vfp.regs[rd]); - uint64_t zd1 =3D float64_val(env->vfp.regs[rd + 1]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd0 =3D rd[0], zd1 =3D rd[1]; + uint64_t zm0 =3D rm[0], zm1 =3D rm[1]; + uint64_t d0 =3D ELEM(zd0, 0, 16) | (ELEM(zd0, 2, 16) << 16) | (ELEM(zd1, 0, 16) << 32) | (ELEM(zd1, 2, 16) << 48); uint64_t d1 =3D ELEM(zm0, 0, 16) | (ELEM(zm0, 2, 16) << 16) @@ -2069,32 +2070,35 @@ void HELPER(neon_qunzip16)(CPUARMState *env, uint32= _t rd, uint32_t rm) | (ELEM(zd1, 1, 16) << 32) | (ELEM(zd1, 3, 16) << 48); uint64_t m1 =3D ELEM(zm0, 1, 16) | (ELEM(zm0, 3, 16) << 16) | (ELEM(zm1, 1, 16) << 32) | (ELEM(zm1, 3, 16) << 48); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rm + 1] =3D make_float64(m1); - env->vfp.regs[rd] =3D make_float64(d0); - env->vfp.regs[rd + 1] =3D make_float64(d1); + + rm[0] =3D m0; + rm[1] =3D m1; + rd[0] =3D d0; + rd[1] =3D d1; } =20 -void HELPER(neon_qunzip32)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_qunzip32)(void *vd, void *vm) { - uint64_t zm0 =3D float64_val(env->vfp.regs[rm]); - uint64_t zm1 =3D float64_val(env->vfp.regs[rm + 1]); - uint64_t zd0 =3D float64_val(env->vfp.regs[rd]); - uint64_t zd1 =3D float64_val(env->vfp.regs[rd + 1]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd0 =3D rd[0], zd1 =3D rd[1]; + uint64_t zm0 =3D rm[0], zm1 =3D rm[1]; + uint64_t d0 =3D ELEM(zd0, 0, 32) | (ELEM(zd1, 0, 32) << 32); uint64_t d1 =3D ELEM(zm0, 0, 32) | (ELEM(zm1, 0, 32) << 32); uint64_t m0 =3D ELEM(zd0, 1, 32) | (ELEM(zd1, 1, 32) << 32); uint64_t m1 =3D ELEM(zm0, 1, 32) | (ELEM(zm1, 1, 32) << 32); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rm + 1] =3D make_float64(m1); - env->vfp.regs[rd] =3D make_float64(d0); - env->vfp.regs[rd + 1] =3D make_float64(d1); + + rm[0] =3D m0; + rm[1] =3D m1; + rd[0] =3D d0; + rd[1] =3D d1; } =20 -void HELPER(neon_unzip8)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_unzip8)(void *vd, void *vm) { - uint64_t zm =3D float64_val(env->vfp.regs[rm]); - uint64_t zd =3D float64_val(env->vfp.regs[rd]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd =3D rd[0], zm =3D rm[0]; + uint64_t d0 =3D ELEM(zd, 0, 8) | (ELEM(zd, 2, 8) << 8) | (ELEM(zd, 4, 8) << 16) | (ELEM(zd, 6, 8) << 24) | (ELEM(zm, 0, 8) << 32) | (ELEM(zm, 2, 8) << 40) @@ -2103,28 +2107,31 @@ void HELPER(neon_unzip8)(CPUARMState *env, uint32_t= rd, uint32_t rm) | (ELEM(zd, 5, 8) << 16) | (ELEM(zd, 7, 8) << 24) | (ELEM(zm, 1, 8) << 32) | (ELEM(zm, 3, 8) << 40) | (ELEM(zm, 5, 8) << 48) | (ELEM(zm, 7, 8) << 56); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rd] =3D make_float64(d0); + + rm[0] =3D m0; + rd[0] =3D d0; } =20 -void HELPER(neon_unzip16)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_unzip16)(void *vd, void *vm) { - uint64_t zm =3D float64_val(env->vfp.regs[rm]); - uint64_t zd =3D float64_val(env->vfp.regs[rd]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd =3D rd[0], zm =3D rm[0]; + uint64_t d0 =3D ELEM(zd, 0, 16) | (ELEM(zd, 2, 16) << 16) | (ELEM(zm, 0, 16) << 32) | (ELEM(zm, 2, 16) << 48); uint64_t m0 =3D ELEM(zd, 1, 16) | (ELEM(zd, 3, 16) << 16) | (ELEM(zm, 1, 16) << 32) | (ELEM(zm, 3, 16) << 48); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rd] =3D make_float64(d0); + + rm[0] =3D m0; + rd[0] =3D d0; } =20 -void HELPER(neon_qzip8)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_qzip8)(void *vd, void *vm) { - uint64_t zm0 =3D float64_val(env->vfp.regs[rm]); - uint64_t zm1 =3D float64_val(env->vfp.regs[rm + 1]); - uint64_t zd0 =3D float64_val(env->vfp.regs[rd]); - uint64_t zd1 =3D float64_val(env->vfp.regs[rd + 1]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd0 =3D rd[0], zd1 =3D rd[1]; + uint64_t zm0 =3D rm[0], zm1 =3D rm[1]; + uint64_t d0 =3D ELEM(zd0, 0, 8) | (ELEM(zm0, 0, 8) << 8) | (ELEM(zd0, 1, 8) << 16) | (ELEM(zm0, 1, 8) << 24) | (ELEM(zd0, 2, 8) << 32) | (ELEM(zm0, 2, 8) << 40) @@ -2141,18 +2148,19 @@ void HELPER(neon_qzip8)(CPUARMState *env, uint32_t = rd, uint32_t rm) | (ELEM(zd1, 5, 8) << 16) | (ELEM(zm1, 5, 8) << 24) | (ELEM(zd1, 6, 8) << 32) | (ELEM(zm1, 6, 8) << 40) | (ELEM(zd1, 7, 8) << 48) | (ELEM(zm1, 7, 8) << 56); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rm + 1] =3D make_float64(m1); - env->vfp.regs[rd] =3D make_float64(d0); - env->vfp.regs[rd + 1] =3D make_float64(d1); + + rm[0] =3D m0; + rm[1] =3D m1; + rd[0] =3D d0; + rd[1] =3D d1; } =20 -void HELPER(neon_qzip16)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_qzip16)(void *vd, void *vm) { - uint64_t zm0 =3D float64_val(env->vfp.regs[rm]); - uint64_t zm1 =3D float64_val(env->vfp.regs[rm + 1]); - uint64_t zd0 =3D float64_val(env->vfp.regs[rd]); - uint64_t zd1 =3D float64_val(env->vfp.regs[rd + 1]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd0 =3D rd[0], zd1 =3D rd[1]; + uint64_t zm0 =3D rm[0], zm1 =3D rm[1]; + uint64_t d0 =3D ELEM(zd0, 0, 16) | (ELEM(zm0, 0, 16) << 16) | (ELEM(zd0, 1, 16) << 32) | (ELEM(zm0, 1, 16) << 48); uint64_t d1 =3D ELEM(zd0, 2, 16) | (ELEM(zm0, 2, 16) << 16) @@ -2161,32 +2169,35 @@ void HELPER(neon_qzip16)(CPUARMState *env, uint32_t= rd, uint32_t rm) | (ELEM(zd1, 1, 16) << 32) | (ELEM(zm1, 1, 16) << 48); uint64_t m1 =3D ELEM(zd1, 2, 16) | (ELEM(zm1, 2, 16) << 16) | (ELEM(zd1, 3, 16) << 32) | (ELEM(zm1, 3, 16) << 48); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rm + 1] =3D make_float64(m1); - env->vfp.regs[rd] =3D make_float64(d0); - env->vfp.regs[rd + 1] =3D make_float64(d1); + + rm[0] =3D m0; + rm[1] =3D m1; + rd[0] =3D d0; + rd[1] =3D d1; } =20 -void HELPER(neon_qzip32)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_qzip32)(void *vd, void *vm) { - uint64_t zm0 =3D float64_val(env->vfp.regs[rm]); - uint64_t zm1 =3D float64_val(env->vfp.regs[rm + 1]); - uint64_t zd0 =3D float64_val(env->vfp.regs[rd]); - uint64_t zd1 =3D float64_val(env->vfp.regs[rd + 1]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd0 =3D rd[0], zd1 =3D rd[1]; + uint64_t zm0 =3D rm[0], zm1 =3D rm[1]; + uint64_t d0 =3D ELEM(zd0, 0, 32) | (ELEM(zm0, 0, 32) << 32); uint64_t d1 =3D ELEM(zd0, 1, 32) | (ELEM(zm0, 1, 32) << 32); uint64_t m0 =3D ELEM(zd1, 0, 32) | (ELEM(zm1, 0, 32) << 32); uint64_t m1 =3D ELEM(zd1, 1, 32) | (ELEM(zm1, 1, 32) << 32); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rm + 1] =3D make_float64(m1); - env->vfp.regs[rd] =3D make_float64(d0); - env->vfp.regs[rd + 1] =3D make_float64(d1); + + rm[0] =3D m0; + rm[1] =3D m1; + rd[0] =3D d0; + rd[1] =3D d1; } =20 -void HELPER(neon_zip8)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_zip8)(void *vd, void *vm) { - uint64_t zm =3D float64_val(env->vfp.regs[rm]); - uint64_t zd =3D float64_val(env->vfp.regs[rd]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd =3D rd[0], zm =3D rm[0]; + uint64_t d0 =3D ELEM(zd, 0, 8) | (ELEM(zm, 0, 8) << 8) | (ELEM(zd, 1, 8) << 16) | (ELEM(zm, 1, 8) << 24) | (ELEM(zd, 2, 8) << 32) | (ELEM(zm, 2, 8) << 40) @@ -2195,20 +2206,23 @@ void HELPER(neon_zip8)(CPUARMState *env, uint32_t r= d, uint32_t rm) | (ELEM(zd, 5, 8) << 16) | (ELEM(zm, 5, 8) << 24) | (ELEM(zd, 6, 8) << 32) | (ELEM(zm, 6, 8) << 40) | (ELEM(zd, 7, 8) << 48) | (ELEM(zm, 7, 8) << 56); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rd] =3D make_float64(d0); + + rm[0] =3D m0; + rd[0] =3D d0; } =20 -void HELPER(neon_zip16)(CPUARMState *env, uint32_t rd, uint32_t rm) +void HELPER(neon_zip16)(void *vd, void *vm) { - uint64_t zm =3D float64_val(env->vfp.regs[rm]); - uint64_t zd =3D float64_val(env->vfp.regs[rd]); + uint64_t *rd =3D vd, *rm =3D vm; + uint64_t zd =3D rd[0], zm =3D rm[0]; + uint64_t d0 =3D ELEM(zd, 0, 16) | (ELEM(zm, 0, 16) << 16) | (ELEM(zd, 1, 16) << 32) | (ELEM(zm, 1, 16) << 48); uint64_t m0 =3D ELEM(zd, 2, 16) | (ELEM(zm, 2, 16) << 16) | (ELEM(zd, 3, 16) << 32) | (ELEM(zm, 3, 16) << 48); - env->vfp.regs[rm] =3D make_float64(m0); - env->vfp.regs[rd] =3D make_float64(d0); + + rm[0] =3D m0; + rd[0] =3D d0; } =20 /* Helper function for 64 bit polynomial multiply case: diff --git a/target/arm/translate.c b/target/arm/translate.c index 0c35c39069..68e928640f 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4688,22 +4688,23 @@ static inline TCGv_i32 neon_get_scalar(int size, in= t reg) =20 static int gen_neon_unzip(int rd, int rm, int size, int q) { - TCGv_i32 tmp, tmp2; + TCGv_ptr pd, pm; + =20 if (!q && size =3D=3D 2) { return 1; } - tmp =3D tcg_const_i32(rd); - tmp2 =3D tcg_const_i32(rm); + pd =3D vfp_reg_ptr(true, rd); + pm =3D vfp_reg_ptr(true, rm); if (q) { switch (size) { case 0: - gen_helper_neon_qunzip8(cpu_env, tmp, tmp2); + gen_helper_neon_qunzip8(pd, pm); break; case 1: - gen_helper_neon_qunzip16(cpu_env, tmp, tmp2); + gen_helper_neon_qunzip16(pd, pm); break; case 2: - gen_helper_neon_qunzip32(cpu_env, tmp, tmp2); + gen_helper_neon_qunzip32(pd, pm); break; default: abort(); @@ -4711,38 +4712,39 @@ static int gen_neon_unzip(int rd, int rm, int size,= int q) } else { switch (size) { case 0: - gen_helper_neon_unzip8(cpu_env, tmp, tmp2); + gen_helper_neon_unzip8(pd, pm); break; case 1: - gen_helper_neon_unzip16(cpu_env, tmp, tmp2); + gen_helper_neon_unzip16(pd, pm); break; default: abort(); } } - tcg_temp_free_i32(tmp); - tcg_temp_free_i32(tmp2); + tcg_temp_free_ptr(pd); + tcg_temp_free_ptr(pm); return 0; } =20 static int gen_neon_zip(int rd, int rm, int size, int q) { - TCGv_i32 tmp, tmp2; + TCGv_ptr pd, pm; + if (!q && size =3D=3D 2) { return 1; } - tmp =3D tcg_const_i32(rd); - tmp2 =3D tcg_const_i32(rm); + pd =3D vfp_reg_ptr(true, rd); + pm =3D vfp_reg_ptr(true, rm); if (q) { switch (size) { case 0: - gen_helper_neon_qzip8(cpu_env, tmp, tmp2); + gen_helper_neon_qzip8(pd, pm); break; case 1: - gen_helper_neon_qzip16(cpu_env, tmp, tmp2); + gen_helper_neon_qzip16(pd, pm); break; case 2: - gen_helper_neon_qzip32(cpu_env, tmp, tmp2); + gen_helper_neon_qzip32(pd, pm); break; default: abort(); @@ -4750,17 +4752,17 @@ static int gen_neon_zip(int rd, int rm, int size, i= nt q) } else { switch (size) { case 0: - gen_helper_neon_zip8(cpu_env, tmp, tmp2); + gen_helper_neon_zip8(pd, pm); break; case 1: - gen_helper_neon_zip16(cpu_env, tmp, tmp2); + gen_helper_neon_zip16(pd, pm); break; default: abort(); } } - tcg_temp_free_i32(tmp); - tcg_temp_free_i32(tmp2); + tcg_temp_free_ptr(pd); + tcg_temp_free_ptr(pm); return 0; } =20 --=20 2.14.3