From nobody Tue Oct 28 21:11:13 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513589292769578.7892158312462; Mon, 18 Dec 2017 01:28:12 -0800 (PST) Received: from localhost ([::1]:57441 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQriO-000418-BO for importer@patchew.org; Mon, 18 Dec 2017 04:28:04 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46724) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrbC-0006bx-MF for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eQrb7-0001nr-Ss for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:38 -0500 Received: from ozlabs.org ([103.22.144.67]:48399) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eQrb7-0001lB-6l; Mon, 18 Dec 2017 04:20:33 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3z0b9S44gnz9s84; Mon, 18 Dec 2017 20:20:28 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1513588828; bh=COz6fxQ+ITmG+yKiPIYt8x8/DDUB1FNtGMzIJvpBhyo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cC+GlmD7FF+uIr5QPVoX8QnJDX7pCcCAYX4DuHWQBuNgUUn3seECK6xcB1T4as4W9 /LG9NO7zBtAmIYEulmctWFuG2Kq/SG53q0UTgd+hGNUEcuOkMHsd7L5fxH8kcsmp2e nbGxxEtYEwuc8N7lg0Os5MLJ2AovKp+5z9AiIZio= From: David Gibson To: surajjs@au1.ibm.com, groug@kaod.org, lvivier@redhat.com Date: Mon, 18 Dec 2017 20:20:19 +1100 Message-Id: <20171218092024.21645-2-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218092024.21645-1-david@gibson.dropbear.id.au> References: <20171218092024.21645-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PATCH 1/6] spapr: Capabilities infrastructure X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, abologna@redhat.com, mdroth@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Because PAPR is a paravirtual environment access to certain CPU (or other) facilities can be blocked by the hypervisor. PAPR provides ways to advertise in the device tree whether or not those features are available to the guest. In some places we automatically determine whether to make a feature available based on whether our host can support it, in most cases this is based on limitations in the available KVM implementation. Although we correctly advertise this to the guest, it means that host factors might make changes to the guest visible environment which is bad: as well as generaly reducing reproducibility, it means that a migration between different host environments can easily go bad. We've mostly gotten away with it because the environments considered mature enough to be well supported (basically, KVM on POWER8) have had consistent feature availability. But, it's still not right and some limitations on POWER9 is going to make it more of an issue in future. This introduces an infrastructure for defining "sPAPR capabilities". These are set by default based on the machine version, masked by the capabilities of the chosen cpu, but can be overriden with machine properties. The intention is at reset time we verify that the requested capabilities can be supported on the host (considering TCG, KVM and/or host cpu limitations). If not we simply fail, rather than silently modifying the advertised featureset to the guest. This does mean that certain configurations that "worked" may now fail, but such configurations were already more subtly broken. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/Makefile.objs | 2 +- hw/ppc/spapr.c | 7 ++ hw/ppc/spapr_caps.c | 182 +++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/spapr.h | 31 +++++++++ 4 files changed, 221 insertions(+), 1 deletion(-) create mode 100644 hw/ppc/spapr_caps.c diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 7efc686748..1faff853b7 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -1,7 +1,7 @@ # shared objects obj-y +=3D ppc.o ppc_booke.o fdt.o # IBM pSeries (sPAPR) -obj-$(CONFIG_PSERIES) +=3D spapr.o spapr_vio.o spapr_events.o +obj-$(CONFIG_PSERIES) +=3D spapr.o spapr_caps.o spapr_vio.o spapr_events.o obj-$(CONFIG_PSERIES) +=3D spapr_hcall.o spapr_iommu.o spapr_rtas.o obj-$(CONFIG_PSERIES) +=3D spapr_pci.o spapr_rtc.o spapr_drc.o spapr_rng.o obj-$(CONFIG_PSERIES) +=3D spapr_cpu_core.o spapr_ovec.o diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 6785a90c60..d472baef8d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1466,6 +1466,8 @@ static void spapr_machine_reset(void) /* Check for unknown sysbus devices */ foreach_dynamic_sysbus_device(find_unknown_sysbus_device, NULL); =20 + spapr_caps_reset(spapr); + first_ppc_cpu =3D POWERPC_CPU(first_cpu); if (kvm_enabled() && kvmppc_has_cap_mmu_radix() && ppc_check_compat(first_ppc_cpu, CPU_POWERPC_LOGICAL_3_00, 0, @@ -2311,6 +2313,8 @@ static void spapr_machine_init(MachineState *machine) char *filename; Error *resize_hpt_err =3D NULL; =20 + spapr_caps_validate(spapr, &error_fatal); + msi_nonbroken =3D true; =20 QLIST_INIT(&spapr->phbs); @@ -3819,6 +3823,9 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) * in which LMBs are represented and hot-added */ mc->numa_mem_align_shift =3D 28; + + smc->default_caps =3D spapr_caps(0); + spapr_caps_add_properties(smc, &error_abort); } =20 static const TypeInfo spapr_machine_info =3D { diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c new file mode 100644 index 0000000000..828ac69b36 --- /dev/null +++ b/hw/ppc/spapr_caps.c @@ -0,0 +1,182 @@ +/* + * QEMU PowerPC pSeries Logical Partition capabilities handling + * + * Copyright (c) 2017 David Gibson, Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qapi/visitor.h" + +#include "hw/ppc/spapr.h" + +typedef struct sPAPRCapabilityInfo { + const char *name; + const char *description; + uint64_t flag; + + /* Make sure the virtual hardware can support this capability */ + void (*allow)(sPAPRMachineState *spapr, Error **errp); + + /* If possible, tell the virtual hardware not to allow the cap to + * be used at all */ + void (*disallow)(sPAPRMachineState *spapr, Error **errp); +} sPAPRCapabilityInfo; + +static sPAPRCapabilityInfo capability_table[] =3D { +}; + +static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, + CPUState *cs) +{ + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); + sPAPRCapabilities caps; + + caps =3D smc->default_caps; + + /* TODO: clamp according to cpu model */ + + return caps; +} + +void spapr_caps_reset(sPAPRMachineState *spapr) +{ + Error *local_err =3D NULL; + sPAPRCapabilities caps; + int i; + + /* First compute the actual set of caps we're running with.. */ + caps =3D default_caps_with_cpu(spapr, first_cpu); + + caps.mask |=3D spapr->forced_caps.mask; + caps.mask &=3D ~spapr->forbidden_caps.mask; + + spapr->effective_caps =3D caps; + + /* .. then apply those caps to the virtual hardware */ + + for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + sPAPRCapabilityInfo *info =3D &capability_table[i]; + + if (spapr->effective_caps.mask & info->flag) { + /* Failure to allow a cap is fatal - if the guest doesn't + * have it, we'll be supplying an incorrect environment */ + if (info->allow) { + info->allow(spapr, &error_fatal); + } + } else { + /* Failure to enforce a cap is only a warning. The guest + * shouldn't be using it, since it's not advertised, so it + * doesn't get to complain about weird behaviour if it + * goes ahead anyway */ + if (info->disallow) { + info->disallow(spapr, &local_err); + } + if (local_err) { + warn_report_err(local_err); + error_free(local_err); + local_err =3D NULL; + } + } + } +} + +static void spapr_cap_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value =3D spapr_has_cap(spapr, cap->flag); + + /* TODO: Could this get called before effective_caps is finalized + * in spapr_caps_reset()? */ + + visit_type_bool(v, name, &value, errp); +} + +static void spapr_cap_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value; + Error *local_err =3D NULL; + + visit_type_bool(v, name, &value, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + if (value) { + spapr->forced_caps.mask |=3D cap->flag; + } else { + spapr->forbidden_caps.mask |=3D cap->flag; + } +} + +void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp) +{ + uint64_t allcaps =3D 0; + int i; + + for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + g_assert((allcaps & capability_table[i].flag) =3D=3D 0); + allcaps |=3D capability_table[i].flag; + } + + g_assert((spapr->forced_caps.mask & ~allcaps) =3D=3D 0); + g_assert((spapr->forbidden_caps.mask & ~allcaps) =3D=3D 0); + + if (spapr->forced_caps.mask & spapr->forbidden_caps.mask) { + error_setg(errp, "Some sPAPR capabilities set both on and off"); + return; + } + + /* Check for any caps incompatible with other caps. Nothing to do + * yet */ +} + +void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp) +{ + Error *local_err =3D NULL; + ObjectClass *klass =3D OBJECT_CLASS(smc); + int i; + + for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + sPAPRCapabilityInfo *cap =3D &capability_table[i]; + const char *name =3D g_strdup_printf("cap-%s", cap->name); + + object_class_property_add(klass, name, "bool", + spapr_cap_get, spapr_cap_set, NULL, + cap, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + object_class_property_set_description(klass, name, cap->descriptio= n, + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + } +} diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 14757b805e..5569caf1d4 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -50,6 +50,15 @@ typedef enum { SPAPR_RESIZE_HPT_REQUIRED, } sPAPRResizeHPT; =20 +/** + * Capabilities + */ + +typedef struct sPAPRCapabilities sPAPRCapabilities; +struct sPAPRCapabilities { + uint64_t mask; +}; + /** * sPAPRMachineClass: */ @@ -66,6 +75,7 @@ struct sPAPRMachineClass { hwaddr *mmio32, hwaddr *mmio64, unsigned n_dma, uint32_t *liobns, Error **errp); sPAPRResizeHPT resize_hpt_default; + sPAPRCapabilities default_caps; }; =20 /** @@ -127,6 +137,9 @@ struct sPAPRMachineState { MemoryHotplugState hotplug_memory; =20 const char *icp_type; + + sPAPRCapabilities forced_caps, forbidden_caps; + sPAPRCapabilities effective_caps; }; =20 #define H_SUCCESS 0 @@ -724,4 +737,22 @@ int spapr_irq_alloc_block(sPAPRMachineState *spapr, in= t num, bool lsi, void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num); qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq); =20 +/* + * Handling of optional capabilities + */ +static inline sPAPRCapabilities spapr_caps(uint64_t mask) +{ + sPAPRCapabilities caps =3D { mask }; + return caps; +} + +static inline bool spapr_has_cap(sPAPRMachineState *spapr, uint64_t cap) +{ + return !!(spapr->effective_caps.mask & cap); +} + +void spapr_caps_reset(sPAPRMachineState *spapr); +void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp); +void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp); + #endif /* HW_SPAPR_H */ --=20 2.14.3 From nobody Tue Oct 28 21:11:13 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513588979757710.2278652694105; Mon, 18 Dec 2017 01:22:59 -0800 (PST) Received: from localhost ([::1]:57402 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrdA-0007oW-CB for importer@patchew.org; Mon, 18 Dec 2017 04:22:40 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46638) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrb9-0006ZN-BM for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eQrb7-0001nf-S9 for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:35 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:37577) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eQrb7-0001l9-5x; Mon, 18 Dec 2017 04:20:33 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3z0b9S1yQHz9sCZ; Mon, 18 Dec 2017 20:20:28 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1513588828; bh=r4X4Dx6PAb8VU7jvjv3ECmPvMC7kPPPNKXwVo7xg8Ew=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SlpjyzkgqVhtoBlIVRv3kR5TEyBkI+yyHcNlCImyIYi1Qf2MDaWfWtgSXNStjYMqu lAMmskZ/uEfhGfIJxfxgXGWbZ4T2ZZZWheISlX1YHgIfXvm/E2U56gRWPvQONKr/k/ /Kqf6Llg0WIzluBY6i/o3j8o0I7CtPItXlik9MVM= From: David Gibson To: surajjs@au1.ibm.com, groug@kaod.org, lvivier@redhat.com Date: Mon, 18 Dec 2017 20:20:20 +1100 Message-Id: <20171218092024.21645-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218092024.21645-1-david@gibson.dropbear.id.au> References: <20171218092024.21645-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH 2/6] spapr: Treat Hardware Transactional Memory (HTM) as an optional capability X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, abologna@redhat.com, mdroth@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This adds an spapr capability bit for Hardware Transactional Memory. It is enabled by default for pseries-2.11 and earlier machine types. with POWER8 or later CPUs (as it must be, since earlier qemu versions would implicitly allow it). However it is disabled by default for the latest pseries-2.12 machine type. This means that with the latest machine type, HTM will not be available, regardless of CPU, unless it is explicitly enabled on the command line. That change is made on the basis that: * This way running with -M pseries,accel=3Dtcg will start with whatever cpu and will provide the same guest visible model as with accel=3Dkvm. - More specifically, this means existing make check tests don't have to be modified to use cap-htm=3Doff in order to run with TCG * We hope to add a new "HTM without suspend" feature in the not too distant future which could work on both POWER8 and POWER9 cpus, and could be enabled by default. * Best guesses suggest that future POWER cpus may well only support the HTM-without-suspend model, not the (frankly, horribly overcomplicated) POWER8 style HTM with suspend. * Anecdotal evidence suggests problems with HTM being enabled when it wasn't wanted are more common than being missing when it was. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr.c | 15 ++++++++++----- hw/ppc/spapr_caps.c | 29 ++++++++++++++++++++++++++++- include/hw/ppc/spapr.h | 3 +++ 3 files changed, 41 insertions(+), 6 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index d472baef8d..f8fee8ebcf 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -253,7 +253,9 @@ static int spapr_fixup_cpu_numa_dt(void *fdt, int offse= t, PowerPCCPU *cpu) } =20 /* Populate the "ibm,pa-features" property */ -static void spapr_populate_pa_features(PowerPCCPU *cpu, void *fdt, int off= set, +static void spapr_populate_pa_features(sPAPRMachineState *spapr, + PowerPCCPU *cpu, + void *fdt, int offset, bool legacy_guest) { CPUPPCState *env =3D &cpu->env; @@ -318,7 +320,7 @@ static void spapr_populate_pa_features(PowerPCCPU *cpu,= void *fdt, int offset, */ pa_features[3] |=3D 0x20; } - if (kvmppc_has_cap_htm() && pa_size > 24) { + if (spapr_has_cap(spapr, SPAPR_CAP_HTM) && pa_size > 24) { pa_features[24] |=3D 0x80; /* Transactional memory support */ } if (legacy_guest && pa_size > 40) { @@ -384,8 +386,8 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineSt= ate *spapr) return ret; } =20 - spapr_populate_pa_features(cpu, fdt, offset, - spapr->cas_legacy_guest_workaroun= d); + spapr_populate_pa_features(spapr, cpu, fdt, offset, + spapr->cas_legacy_guest_workaround); } return ret; } @@ -579,7 +581,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, page_sizes_prop, page_sizes_prop_size))); } =20 - spapr_populate_pa_features(cpu, fdt, offset, false); + spapr_populate_pa_features(spapr, cpu, fdt, offset, false); =20 _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id", cs->cpu_index / vcpus_per_socket))); @@ -3903,7 +3905,10 @@ static void spapr_machine_2_11_instance_options(Mach= ineState *machine) =20 static void spapr_machine_2_11_class_options(MachineClass *mc) { + sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); + spapr_machine_2_12_class_options(mc); + smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 828ac69b36..2f0ef98670 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -24,6 +24,10 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qapi/visitor.h" +#include "sysemu/hw_accel.h" +#include "target/ppc/cpu.h" +#include "cpu-models.h" +#include "kvm_ppc.h" =20 #include "hw/ppc/spapr.h" =20 @@ -40,18 +44,41 @@ typedef struct sPAPRCapabilityInfo { void (*disallow)(sPAPRMachineState *spapr, Error **errp); } sPAPRCapabilityInfo; =20 +static void cap_htm_allow(sPAPRMachineState *spapr, Error **errp) +{ + if (tcg_enabled()) { + error_setg(errp, + "No Transactional Memory support in TCG, try cap-htm=3D= off"); + } else if (kvm_enabled() && !kvmppc_has_cap_htm()) { + error_setg(errp, +"KVM implementation does not support Transactional Memory, try cap-htm=3Do= ff" + ); + } +} + static sPAPRCapabilityInfo capability_table[] =3D { + { + .name =3D "htm", + .description =3D "Allow Hardware Transactional Memory (HTM)", + .flag =3D SPAPR_CAP_HTM, + .allow =3D cap_htm_allow, + /* TODO: add cap_htm_disallow */ + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, CPUState *cs) { sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); + PowerPCCPU *cpu =3D POWERPC_CPU(cs); sPAPRCapabilities caps; =20 caps =3D smc->default_caps; =20 - /* TODO: clamp according to cpu model */ + if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_07, + 0, spapr->max_compat_pvr)) { + caps.mask &=3D ~SPAPR_CAP_HTM; + } =20 return caps; } diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 5569caf1d4..dc64f4ebcb 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -54,6 +54,9 @@ typedef enum { * Capabilities */ =20 +/* Hardware Transactional Memory */ +#define SPAPR_CAP_HTM 0x0000000000000001ULL + typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { uint64_t mask; --=20 2.14.3 From nobody Tue Oct 28 21:11:13 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151358914306247.765507434186475; Mon, 18 Dec 2017 01:25:43 -0800 (PST) Received: from localhost ([::1]:57422 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrfy-0001pH-QW for importer@patchew.org; Mon, 18 Dec 2017 04:25:34 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46644) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrb9-0006Za-KY for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eQrb7-0001nh-SG for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:35 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:51469) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eQrb7-0001l7-5t; Mon, 18 Dec 2017 04:20:33 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3z0b9S5vqdz9sNV; Mon, 18 Dec 2017 20:20:28 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1513588828; bh=iYoAWx/p0EdKJL7EzL8LnecETlIN1bE8Ov07s3XJUF4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=S0caOFu2B57bGiP26zxL+fRitGyKG05LaRCl6V6ZDdUiEtK4A13vAcbFEk+k/5LIz 2GMf8XjmJ20tyBuTK2ydemPtGEBH81Ti37FyeJtWBiOZ7BYJIh8dtvqXBLY5kPDrXg 7KoUKLFJWAah8Cfplwi0+vB/fq4ciIAwwTZ62VqE= From: David Gibson To: surajjs@au1.ibm.com, groug@kaod.org, lvivier@redhat.com Date: Mon, 18 Dec 2017 20:20:21 +1100 Message-Id: <20171218092024.21645-4-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218092024.21645-1-david@gibson.dropbear.id.au> References: <20171218092024.21645-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH 3/6] spapr: Validate capabilities on migration X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, abologna@redhat.com, mdroth@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Now that the "pseries" machine type implements optional capabilities (well, one so far) there's the possibility of having different capabilities available at either end of a migration. Although arguably a user error, it would be nice to catch this situation and fail as gracefully as we can. This adds code to migrate the capabilities flags. These aren't pulled directly into the destination's configuration since what the user has specified on the destination command line should take precedence. However, they are checked against the destination capabilities. If the source was using a capability which is absent on the destination, we fail the migration, since that could easily cause a guest crash or other bad behaviour. If the source lacked a capability which is present on the destination we warn, but allow the migration to proceed. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr.c | 6 ++++ hw/ppc/spapr_caps.c | 96 ++++++++++++++++++++++++++++++++++++++++++++++= ++-- include/hw/ppc/spapr.h | 6 ++++ 3 files changed, 105 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index f8fee8ebcf..86fc83f9c2 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1589,6 +1589,11 @@ static int spapr_post_load(void *opaque, int version= _id) sPAPRMachineState *spapr =3D (sPAPRMachineState *)opaque; int err =3D 0; =20 + err =3D spapr_caps_post_migration(spapr); + if (err) { + return err; + } + if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) { CPUState *cs; CPU_FOREACH(cs) { @@ -1755,6 +1760,7 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_ov5_cas, &vmstate_spapr_patb_entry, &vmstate_spapr_pending_events, + &vmstate_spapr_caps, NULL } }; diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 2f0ef98670..a8c726a88b 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ #include "qemu/osdep.h" +#include "qemu/error-report.h" #include "qapi/error.h" #include "qapi/visitor.h" #include "sysemu/hw_accel.h" @@ -83,6 +84,93 @@ static sPAPRCapabilities default_caps_with_cpu(sPAPRMach= ineState *spapr, return caps; } =20 +static bool spapr_caps_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + return (spapr->forced_caps.mask !=3D 0) || (spapr->forbidden_caps.mask= !=3D 0); +} + +/* This has to be called from the top-level spapr post_load, not the + * caps specific one. Otherwise it wouldn't be called when the source + * caps are all defaults, which could still conflict with overridden + * caps on the destination */ +int spapr_caps_post_migration(sPAPRMachineState *spapr) +{ + uint64_t allcaps =3D 0; + int i; + bool ok =3D true; + sPAPRCapabilities dstcaps =3D spapr->effective_caps; + sPAPRCapabilities srccaps; + + srccaps =3D default_caps_with_cpu(spapr, first_cpu); + srccaps.mask |=3D spapr->mig_forced_caps.mask; + srccaps.mask &=3D ~spapr->mig_forbidden_caps.mask; + + for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + sPAPRCapabilityInfo *info =3D &capability_table[i]; + + allcaps |=3D info->flag; + + if ((srccaps.mask & info->flag) && !(dstcaps.mask & info->flag)) { + error_report("cap-%s=3Don in incoming stream, but off in desti= nation", + info->name); + ok =3D false; + } + + if (!(srccaps.mask & info->flag) && (dstcaps.mask & info->flag)) { + warn_report("cap-%s=3Doff in incoming stream, but on in destin= ation", + info->name); + } + } + + if (spapr->mig_forced_caps.mask & ~allcaps) { + error_report( + "Unknown capabilities 0x%"PRIx64" enabled in incoming stream", + spapr->mig_forced_caps.mask & ~allcaps); + ok =3D false; + } + if (spapr->mig_forbidden_caps.mask & ~allcaps) { + warn_report( + "Unknown capabilities 0x%"PRIx64" disabled in incoming stream", + spapr->mig_forbidden_caps.mask & ~allcaps); + } + + return ok ? 0 : -EINVAL; +} + +static int spapr_caps_pre_save(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_forced_caps =3D spapr->forced_caps; + spapr->mig_forbidden_caps =3D spapr->forbidden_caps; + return 0; +} + +static int spapr_caps_pre_load(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_forced_caps =3D spapr_caps(0); + spapr->mig_forbidden_caps =3D spapr_caps(0); + return 0; +} + +const VMStateDescription vmstate_spapr_caps =3D { + .name =3D "spapr/caps", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_caps_needed, + .pre_save =3D spapr_caps_pre_save, + .pre_load =3D spapr_caps_pre_load, + .fields =3D (VMStateField[]) { + VMSTATE_UINT64(mig_forced_caps.mask, sPAPRMachineState), + VMSTATE_UINT64(mig_forbidden_caps.mask, sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + void spapr_caps_reset(sPAPRMachineState *spapr) { Error *local_err =3D NULL; @@ -92,6 +180,11 @@ void spapr_caps_reset(sPAPRMachineState *spapr) /* First compute the actual set of caps we're running with.. */ caps =3D default_caps_with_cpu(spapr, first_cpu); =20 + /* Remove unnecessary forced/forbidden bits (this will help us + * with migration) */ + spapr->forced_caps.mask &=3D ~caps.mask; + spapr->forbidden_caps.mask &=3D caps.mask; + caps.mask |=3D spapr->forced_caps.mask; caps.mask &=3D ~spapr->forbidden_caps.mask; =20 @@ -176,9 +269,6 @@ void spapr_caps_validate(sPAPRMachineState *spapr, Erro= r **errp) error_setg(errp, "Some sPAPR capabilities set both on and off"); return; } - - /* Check for any caps incompatible with other caps. Nothing to do - * yet */ } =20 void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index dc64f4ebcb..5c85f39c3b 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -54,6 +54,8 @@ typedef enum { * Capabilities */ =20 +/* These bits go in the migration stream, so they can't be reassigned */ + /* Hardware Transactional Memory */ #define SPAPR_CAP_HTM 0x0000000000000001ULL =20 @@ -142,6 +144,7 @@ struct sPAPRMachineState { const char *icp_type; =20 sPAPRCapabilities forced_caps, forbidden_caps; + sPAPRCapabilities mig_forced_caps, mig_forbidden_caps; sPAPRCapabilities effective_caps; }; =20 @@ -743,6 +746,8 @@ qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq); /* * Handling of optional capabilities */ +extern const VMStateDescription vmstate_spapr_caps; + static inline sPAPRCapabilities spapr_caps(uint64_t mask) { sPAPRCapabilities caps =3D { mask }; @@ -757,5 +762,6 @@ static inline bool spapr_has_cap(sPAPRMachineState *spa= pr, uint64_t cap) void spapr_caps_reset(sPAPRMachineState *spapr); void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp); void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp); +int spapr_caps_post_migration(sPAPRMachineState *spapr); =20 #endif /* HW_SPAPR_H */ --=20 2.14.3 From nobody Tue Oct 28 21:11:13 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513588979879613.268690344746; Mon, 18 Dec 2017 01:22:59 -0800 (PST) Received: from localhost ([::1]:57403 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrdC-0007pl-C8 for importer@patchew.org; Mon, 18 Dec 2017 04:22:42 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46641) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrb9-0006ZP-CW for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eQrb8-0001nx-1N for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:35 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:36597) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eQrb7-0001lA-5q; Mon, 18 Dec 2017 04:20:33 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3z0b9T0kQCz9sR8; Mon, 18 Dec 2017 20:20:28 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1513588829; bh=Cv9SEDi1Fc7miidnRZbyGJ4fRmin0zSn0W+NX9RkCnc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=V85V0SnOi0muPMDeuJagA1Tb9yXu4j67PrAVuqJMBz7yFWewoYwf+7YPXJ3AfNASY 0ftefYlRNFJhsDMTOYDSDC9qKbP+3qdGqfHpyPvkbVCuiWI7JYKG8cP1p7ft1MGYXW JxNJUx8v+DPh3Gm/k1QkcF+6O/1NKWALShYtKEC0= From: David Gibson To: surajjs@au1.ibm.com, groug@kaod.org, lvivier@redhat.com Date: Mon, 18 Dec 2017 20:20:22 +1100 Message-Id: <20171218092024.21645-5-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218092024.21645-1-david@gibson.dropbear.id.au> References: <20171218092024.21645-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH 4/6] target/ppc: Clean up probing of VMX, VSX and DFP availability on KVM X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, abologna@redhat.com, mdroth@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" When constructing the "host" cpu class we modify whether the VMX and VSX vector extensions and DFP (Decimal Floating Point) are available based on whether KVM can support those instructions. This can depend on policy in the host kernel as well as on the actual host cpu capabilities. However, the way we probe for this is not very nice: we explicitly check the host's device tree. That works in practice, but it's not really correct, since the device tree is a property of the host kernel's platform which we don't really know about. We get away with it because the only modern POWER platforms happen to encode VMX, VSX and DFP availability in the device tree in the same way. Arguably we should have an explicit KVM capability for this, but we haven't needed one so far. Barring specific KVM policies which don't yet exist, each of these instruction classes will be available in the guest if and only if they're available in the qemu userspace process. We can determine that from the ELF AUX vector we're supplied with. Once reworked like this, there are no more callers for kvmppc_get_vmx() and kvmppc_get_dfp() so remove them. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- target/ppc/kvm.c | 27 ++++++--------------------- target/ppc/kvm_ppc.h | 2 -- 2 files changed, 6 insertions(+), 23 deletions(-) diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 9d57debf0e..81d9bd56c7 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2014,16 +2014,6 @@ uint64_t kvmppc_get_clockfreq(void) return kvmppc_read_int_cpu_dt("clock-frequency"); } =20 -uint32_t kvmppc_get_vmx(void) -{ - return kvmppc_read_int_cpu_dt("ibm,vmx"); -} - -uint32_t kvmppc_get_dfp(void) -{ - return kvmppc_read_int_cpu_dt("ibm,dfp"); -} - static int kvmppc_get_pvinfo(CPUPPCState *env, struct kvm_ppc_pvinfo *pvin= fo) { PowerPCCPU *cpu =3D ppc_env_get_cpu(env); @@ -2407,23 +2397,18 @@ static void alter_insns(uint64_t *word, uint64_t fl= ags, bool on) static void kvmppc_host_cpu_class_init(ObjectClass *oc, void *data) { PowerPCCPUClass *pcc =3D POWERPC_CPU_CLASS(oc); - uint32_t vmx =3D kvmppc_get_vmx(); - uint32_t dfp =3D kvmppc_get_dfp(); uint32_t dcache_size =3D kvmppc_read_int_cpu_dt("d-cache-size"); uint32_t icache_size =3D kvmppc_read_int_cpu_dt("i-cache-size"); =20 /* Now fix up the class with information we can query from the host */ pcc->pvr =3D mfpvr(); =20 - if (vmx !=3D -1) { - /* Only override when we know what the host supports */ - alter_insns(&pcc->insns_flags, PPC_ALTIVEC, vmx > 0); - alter_insns(&pcc->insns_flags2, PPC2_VSX, vmx > 1); - } - if (dfp !=3D -1) { - /* Only override when we know what the host supports */ - alter_insns(&pcc->insns_flags2, PPC2_DFP, dfp); - } + alter_insns(&pcc->insns_flags, PPC_ALTIVEC, + qemu_getauxval(AT_HWCAP) & PPC_FEATURE_HAS_ALTIVEC); + alter_insns(&pcc->insns_flags2, PPC2_VSX, + qemu_getauxval(AT_HWCAP) & PPC_FEATURE_HAS_VSX); + alter_insns(&pcc->insns_flags2, PPC2_DFP, + qemu_getauxval(AT_HWCAP) & PPC_FEATURE_HAS_DFP); =20 if (dcache_size !=3D -1) { pcc->l1_dcache_size =3D dcache_size; diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index d6be38ecaf..ecb55493cc 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -15,8 +15,6 @@ =20 uint32_t kvmppc_get_tbfreq(void); uint64_t kvmppc_get_clockfreq(void); -uint32_t kvmppc_get_vmx(void); -uint32_t kvmppc_get_dfp(void); bool kvmppc_get_host_model(char **buf); bool kvmppc_get_host_serial(char **buf); int kvmppc_get_hasidle(CPUPPCState *env); --=20 2.14.3 From nobody Tue Oct 28 21:11:13 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513589130921977.6937534403129; Mon, 18 Dec 2017 01:25:30 -0800 (PST) Received: from localhost ([::1]:57419 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrfm-0001gC-PN for importer@patchew.org; Mon, 18 Dec 2017 04:25:22 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46729) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrbD-0006cC-0e for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eQrbA-0001qV-Hn for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:38 -0500 Received: from ozlabs.org ([103.22.144.67]:36855) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eQrbA-0001oC-3h; Mon, 18 Dec 2017 04:20:36 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3z0b9T3GCxz9t2M; Mon, 18 Dec 2017 20:20:28 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1513588829; bh=wNd2/6oYnLJFDmCUH5KjHSCQ1Pha23FLYZ7NGjrp1nM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CEBwCKfWP2bqS9cgDHsu0lpppqaktYJMjRJegh6uP8NYfudjw3WDFatjWq9yAOMki j9A+6SnkzEr11qC0vPN7k03s2/EfYe88AIV3N5wkEdP+fFm05aDcL2VTXzNFAXUxPK TL1YQzxPS+F0i1/DDy2H1B2hqf30uexpkLfRh7ns= From: David Gibson To: surajjs@au1.ibm.com, groug@kaod.org, lvivier@redhat.com Date: Mon, 18 Dec 2017 20:20:23 +1100 Message-Id: <20171218092024.21645-6-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218092024.21645-1-david@gibson.dropbear.id.au> References: <20171218092024.21645-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PATCH 5/6] spapr: Handle VMX/VSX presence as an spapr capability flag X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, abologna@redhat.com, mdroth@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We currently have some conditionals in the spapr device tree code to decide whether or not to advertise the availability of the VMX (aka Altivec) and VSX vector extensions to the guest, based on whether the guest cpu has those features. This can lead to confusion and subtle failures on migration, since it makes a guest visible change based only on host capabilities. We now have a better mechanism for this, in spapr capabilities flags, which explicitly depend on user options rather than host capabilities. Rework the advertisement of VSX and VMX based on a new VSX capability. We no longer bother with a conditional for VMX support, because every CPU that's ever been supported by the pseries machine type supports VMX. NOTE: Some userspace distributions (e.g. RHEL7.4) already rely on availability of VSX in libc, so using cap-vsx=3Doff may lead to a fatal SIGILL in init. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr.c | 20 +++++++++++--------- hw/ppc/spapr_caps.c | 25 +++++++++++++++++++++++++ include/hw/ppc/spapr.h | 3 +++ 3 files changed, 39 insertions(+), 9 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 86fc83f9c2..693dd6f7b3 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -557,14 +557,16 @@ static void spapr_populate_cpu_dt(CPUState *cs, void = *fdt, int offset, segs, sizeof(segs)))); } =20 - /* Advertise VMX/VSX (vector extensions) if available - * 0 / no property =3D=3D no vector extensions + /* Advertise VSX (vector extensions) if available * 1 =3D=3D VMX / Altivec available - * 2 =3D=3D VSX available */ - if (env->insns_flags & PPC_ALTIVEC) { - uint32_t vmx =3D (env->insns_flags2 & PPC2_VSX) ? 2 : 1; - - _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx))); + * 2 =3D=3D VSX available + * + * Only CPUs for which we create core types in spapr_cpu_core.c + * are possible, and all of those have VMX */ + if (spapr_has_cap(spapr, SPAPR_CAP_VSX)) { + _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2))); + } else { + _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1))); } =20 /* Advertise DFP (Decimal Floating Point) if available @@ -3832,7 +3834,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; =20 - smc->default_caps =3D spapr_caps(0); + smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX); spapr_caps_add_properties(smc, &error_abort); } =20 @@ -3914,7 +3916,7 @@ static void spapr_machine_2_11_class_options(MachineC= lass *mc) sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); =20 spapr_machine_2_12_class_options(mc); - smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM); + smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index a8c726a88b..da066aec8f 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -57,6 +57,19 @@ static void cap_htm_allow(sPAPRMachineState *spapr, Erro= r **errp) } } =20 +static void cap_vsx_allow(sPAPRMachineState *spapr, Error **errp) +{ + PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); + CPUPPCState *env =3D &cpu->env; + + /* Allowable CPUs in spapr_cpu_core.c should already have gotten + * rid of anything that doesn't do VMX */ + g_assert(env->insns_flags & PPC_ALTIVEC); + if (!(env->insns_flags2 & PPC2_VSX)) { + error_setg(errp, "VSX support not available, try cap-vsx=3Doff"); + } +} + static sPAPRCapabilityInfo capability_table[] =3D { { .name =3D "htm", @@ -65,6 +78,13 @@ static sPAPRCapabilityInfo capability_table[] =3D { .allow =3D cap_htm_allow, /* TODO: add cap_htm_disallow */ }, + { + .name =3D "vsx", + .description =3D "Allow Vector Scalar Extensions (VSX)", + .flag =3D SPAPR_CAP_VSX, + .allow =3D cap_vsx_allow, + /* TODO: add cap_vsx_disallow */ + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -81,6 +101,11 @@ static sPAPRCapabilities default_caps_with_cpu(sPAPRMac= hineState *spapr, caps.mask &=3D ~SPAPR_CAP_HTM; } =20 + if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, + 0, spapr->max_compat_pvr)) { + caps.mask &=3D ~SPAPR_CAP_VSX; + } + return caps; } =20 diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 5c85f39c3b..148a03d189 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -59,6 +59,9 @@ typedef enum { /* Hardware Transactional Memory */ #define SPAPR_CAP_HTM 0x0000000000000001ULL =20 +/* Vector Scalar Extensions */ +#define SPAPR_CAP_VSX 0x0000000000000002ULL + typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { uint64_t mask; --=20 2.14.3 From nobody Tue Oct 28 21:11:13 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513589140911878.0421495472287; Mon, 18 Dec 2017 01:25:40 -0800 (PST) Received: from localhost ([::1]:57420 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrfv-0001mi-Bn for importer@patchew.org; Mon, 18 Dec 2017 04:25:31 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46693) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eQrbB-0006b2-KU for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eQrbA-0001qK-H0 for qemu-devel@nongnu.org; Mon, 18 Dec 2017 04:20:37 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:44375) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eQrbA-0001oA-4Q; Mon, 18 Dec 2017 04:20:36 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3z0b9T2c83z9sNr; Mon, 18 Dec 2017 20:20:29 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1513588829; bh=cWevtbCiYk26RlqphwOsrUsAMVodQqVJvN2d/i5N0G0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k87ZmPWyq87AKeES2lQ8lGzcgejY7DKLW90DtjjFDo5SrJ8THQ0LbOm98aPd9T2O2 YkYEH2rt0I5cfG9tWrBRjjd8Y423+HX+AnCV2iprpFIr9+g5PxEhP2ZrPByBXs0Qeo 8CIEgXqc4tbyonVPyQr6bi/KbC31z8xnl9OWkdVA= From: David Gibson To: surajjs@au1.ibm.com, groug@kaod.org, lvivier@redhat.com Date: Mon, 18 Dec 2017 20:20:24 +1100 Message-Id: <20171218092024.21645-7-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171218092024.21645-1-david@gibson.dropbear.id.au> References: <20171218092024.21645-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH 6/6] spapr: Handle Decimal Floating Point (DFP) as an optional capability X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, abologna@redhat.com, mdroth@linux.vnet.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Decimal Floating Point has been available on POWER7 and later (server) cpus. However, it can be disabled on the hypervisor, meaning that it's not available to guests. We currently handle this by conditionally advertising DFP support in the device tree depending on whether the guest CPU model supports it - which can also depend on what's allowed in the host for -cpu host. That can lead to confusion on migration, since host properties are silently affecting guest visible properties. This patch handles it by treating it as an optional capability for the pseries machine type. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr.c | 7 ++++--- hw/ppc/spapr_caps.c | 18 ++++++++++++++++++ include/hw/ppc/spapr.h | 3 +++ 3 files changed, 25 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 693dd6f7b3..e22888ba06 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -572,7 +572,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, /* Advertise DFP (Decimal Floating Point) if available * 0 / no property =3D=3D no DFP * 1 =3D=3D DFP available */ - if (env->insns_flags2 & PPC2_DFP) { + if (spapr_has_cap(spapr, SPAPR_CAP_DFP)) { _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1))); } =20 @@ -3834,7 +3834,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; =20 - smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX); + smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX | SPAPR_CAP_DFP); spapr_caps_add_properties(smc, &error_abort); } =20 @@ -3916,7 +3916,8 @@ static void spapr_machine_2_11_class_options(MachineC= lass *mc) sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); =20 spapr_machine_2_12_class_options(mc); - smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX); + smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX + | SPAPR_CAP_DFP); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index da066aec8f..61745f0b32 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -70,6 +70,16 @@ static void cap_vsx_allow(sPAPRMachineState *spapr, Erro= r **errp) } } =20 +static void cap_dfp_allow(sPAPRMachineState *spapr, Error **errp) +{ + PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); + CPUPPCState *env =3D &cpu->env; + + if (!(env->insns_flags2 & PPC2_DFP)) { + error_setg(errp, "DFP support not available, try cap-dfp=3Doff"); + } +} + static sPAPRCapabilityInfo capability_table[] =3D { { .name =3D "htm", @@ -85,6 +95,13 @@ static sPAPRCapabilityInfo capability_table[] =3D { .allow =3D cap_vsx_allow, /* TODO: add cap_vsx_disallow */ }, + { + .name =3D "dfp", + .description =3D "Allow Decimal Floating Point (DFP)", + .flag =3D SPAPR_CAP_DFP, + .allow =3D cap_dfp_allow, + /* TODO: add cap_dfp_disallow */ + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -104,6 +121,7 @@ static sPAPRCapabilities default_caps_with_cpu(sPAPRMac= hineState *spapr, if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, 0, spapr->max_compat_pvr)) { caps.mask &=3D ~SPAPR_CAP_VSX; + caps.mask &=3D ~SPAPR_CAP_DFP; } =20 return caps; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 148a03d189..26ac17e641 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -62,6 +62,9 @@ typedef enum { /* Vector Scalar Extensions */ #define SPAPR_CAP_VSX 0x0000000000000002ULL =20 +/* Decimal Floating Point */ +#define SPAPR_CAP_DFP 0x0000000000000004ULL + typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { uint64_t mask; --=20 2.14.3