From nobody Mon Feb 9 21:12:12 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513317407504479.73188075087273; Thu, 14 Dec 2017 21:56:47 -0800 (PST) Received: from localhost ([::1]:44583 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ePizF-0005BX-R0 for importer@patchew.org; Fri, 15 Dec 2017 00:56:45 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53349) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ePixQ-0003i2-8E for qemu-devel@nongnu.org; Fri, 15 Dec 2017 00:54:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ePixO-0004k3-9W for qemu-devel@nongnu.org; Fri, 15 Dec 2017 00:54:52 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:32813) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ePixN-0004gE-QL; Fri, 15 Dec 2017 00:54:50 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3yyflQ6sq6z9tBx; Fri, 15 Dec 2017 16:54:40 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1513317282; bh=PS5tOMUmSdenobIiUpP5X4ecJ4NboZP5X9BpZNrOxEE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Htfs9tyftEcZH9bpP4AeLnKqpZRrbpIMkLOQXERejwN96Y4DykVM7HRxAJ3tCSHAD ovVdrUxIWtdkVYbH0SWHRmr99agGkzsIoekcoKNEL+ekiBzqXgh/UjGazVVmNt/plb fsTCw3TaR6u3UVpCahvHGSMn/ArvCquDxNkJzep4= From: David Gibson To: peter.maydell@linaro.org Date: Fri, 15 Dec 2017 16:54:23 +1100 Message-Id: <20171215055435.24204-13-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171215055435.24204-1-david@gibson.dropbear.id.au> References: <20171215055435.24204-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 12/24] spapr/rtas: do not reset the MSR in stop-self command X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, agraf@suse.de, mdroth@linux.vnet.ibm.com, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: C=C3=A9dric Le Goater When a CPU is stopped with the 'stop-self' RTAS call, its state 'halted' is switched to 1 and, in this case, the MSR is not taken into account anymore in the cpu_has_work() routine. Only the pending hardware interrupts are checked with their LPCR:PECE* enablement bit. The CPU is now also protected from the decrementer interrupt by the LPCR:PECE* bits which are disabled in the 'stop-self' RTAS call. Reseting the MSR is pointless. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: David Gibson Signed-off-by: David Gibson --- hw/ppc/spapr_rtas.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 858adb1bf3..4bb939d3d1 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -206,16 +206,6 @@ static void rtas_stop_self(PowerPCCPU *cpu, sPAPRMachi= neState *spapr, =20 cs->halted =3D 1; qemu_cpu_kick(cs); - /* - * While stopping a CPU, the guest calls H_CPPR which - * effectively disables interrupts on XICS level. - * However decrementer interrupts in TCG can still - * wake the CPU up so here we disable interrupts in MSR - * as well. - * As rtas_start_cpu() resets the whole MSR anyway, there is - * no need to bother with specific bits, we just clear it. - */ - env->msr =3D 0; =20 /* Disable Power-saving mode Exit Cause exceptions for the CPU. * This could deliver an interrupt on a dying CPU and crash the --=20 2.14.3