From nobody Tue Feb 10 09:25:00 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151288819271851.320510642988324; Sat, 9 Dec 2017 22:43:12 -0800 (PST) Received: from localhost ([::1]:43644 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eNvKO-0007Ik-DE for importer@patchew.org; Sun, 10 Dec 2017 01:43:08 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60298) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eNvG6-0002CS-IZ for qemu-devel@nongnu.org; Sun, 10 Dec 2017 01:38:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eNvG3-00065D-DO for qemu-devel@nongnu.org; Sun, 10 Dec 2017 01:38:42 -0500 Received: from mx1.redhat.com ([209.132.183.28]:41876) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eNvG3-00064w-4X for qemu-devel@nongnu.org; Sun, 10 Dec 2017 01:38:39 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 48BA781DE7 for ; Sun, 10 Dec 2017 06:38:38 +0000 (UTC) Received: from xz-mi.redhat.com (ovpn-12-22.pek2.redhat.com [10.72.12.22]) by smtp.corp.redhat.com (Postfix) with ESMTP id 41DCE68B23; Sun, 10 Dec 2017 06:38:33 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Sun, 10 Dec 2017 14:38:17 +0800 Message-Id: <20171210063819.14892-4-peterx@redhat.com> In-Reply-To: <20171210063819.14892-1-peterx@redhat.com> References: <20171210063819.14892-1-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Sun, 10 Dec 2017 06:38:38 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 3/5] i8259: generalize statistics into common code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , peterx@redhat.com, "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" It was only for userspace i8259. Move it to general code so that kvm-i8259 can also use it in the future. Signed-off-by: Peter Xu --- hw/intc/i8259.c | 37 +------------------------------------ hw/intc/i8259_common.c | 41 +++++++++++++++++++++++++++++++++++++= ++++ include/hw/isa/i8259_internal.h | 7 +++++-- 3 files changed, 47 insertions(+), 38 deletions(-) diff --git a/hw/intc/i8259.c b/hw/intc/i8259.c index 20c9d0a58b..d9b9666aff 100644 --- a/hw/intc/i8259.c +++ b/hw/intc/i8259.c @@ -25,11 +25,9 @@ #include "hw/hw.h" #include "hw/i386/pc.h" #include "hw/isa/isa.h" -#include "monitor/monitor.h" #include "qemu/timer.h" #include "qemu/log.h" #include "hw/isa/i8259_internal.h" -#include "hw/intc/intc.h" #include "trace.h" =20 /* debug PIC */ @@ -51,8 +49,6 @@ typedef struct PICClass { DeviceRealize parent_realize; } PICClass; =20 -static int irq_level[16]; -static uint64_t irq_count[16]; #ifdef DEBUG_IRQ_LATENCY static int64_t irq_time[16]; #endif @@ -126,13 +122,7 @@ static void pic_set_irq(void *opaque, int irq, int lev= el) int irq_index =3D s->master ? irq : irq + 8; =20 trace_pic_set_irq(s->master, irq, level); - - if (level !=3D irq_level[irq_index]) { - irq_level[irq_index] =3D level; - if (level =3D=3D 1) { - irq_count[irq_index]++; - } - } + pic_stat_update_irq(irq_index, level); =20 #ifdef DEBUG_IRQ_LATENCY if (level) { @@ -235,31 +225,6 @@ static void pic_reset(DeviceState *dev) pic_init_reset(s); } =20 -static bool pic_get_statistics(InterruptStatsProvider *obj, - uint64_t **irq_counts, unsigned int *nb_irq= s) -{ - PICCommonState *s =3D PIC_COMMON(obj); - - if (s->master) { - *irq_counts =3D irq_count; - *nb_irqs =3D ARRAY_SIZE(irq_count); - } else { - *irq_counts =3D NULL; - *nb_irqs =3D 0; - } - return true; -} - -static void pic_print_info(InterruptStatsProvider *obj, Monitor *mon) -{ - PICCommonState *s =3D PIC_COMMON(obj); - monitor_printf(mon, "pic%d: irr=3D%02x imr=3D%02x isr=3D%02x hprio=3D%= d " - "irq_base=3D%02x rr_sel=3D%d elcr=3D%02x fnm=3D%d\n", - s->master ? 0 : 1, s->irr, s->imr, s->isr, s->priority_= add, - s->irq_base, s->read_reg_select, s->elcr, - s->special_fully_nested_mode); -} - static void pic_ioport_write(void *opaque, hwaddr addr64, uint64_t val64, unsigned size) { diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index 18427b459a..a3caddeefb 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -25,6 +25,10 @@ #include "qemu/osdep.h" #include "hw/i386/pc.h" #include "hw/isa/i8259_internal.h" +#include "monitor/monitor.h" + +static int irq_level[16]; +static uint64_t irq_count[16]; =20 void pic_reset_common(PICCommonState *s) { @@ -98,6 +102,43 @@ ISADevice *i8259_init_chip(const char *name, ISABus *bu= s, bool master) return isadev; } =20 +void pic_stat_update_irq(int irq, int level) +{ + if (level !=3D irq_level[irq]) { + irq_level[irq] =3D level; + if (level =3D=3D 1) { + irq_count[irq]++; + } + } +} + +bool pic_get_statistics(InterruptStatsProvider *obj, + uint64_t **irq_counts, unsigned int *nb_irqs) +{ + PICCommonState *s =3D PIC_COMMON(obj); + + if (s->master) { + *irq_counts =3D irq_count; + *nb_irqs =3D ARRAY_SIZE(irq_count); + } else { + *irq_counts =3D NULL; + *nb_irqs =3D 0; + } + + return true; +} + +void pic_print_info(InterruptStatsProvider *obj, Monitor *mon) +{ + PICCommonState *s =3D PIC_COMMON(obj); + + monitor_printf(mon, "pic%d: irr=3D%02x imr=3D%02x isr=3D%02x hprio=3D%= d " + "irq_base=3D%02x rr_sel=3D%d elcr=3D%02x fnm=3D%d\n", + s->master ? 0 : 1, s->irr, s->imr, s->isr, s->priority_= add, + s->irq_base, s->read_reg_select, s->elcr, + s->special_fully_nested_mode); +} + static const VMStateDescription vmstate_pic_common =3D { .name =3D "i8259", .version_id =3D 1, diff --git a/include/hw/isa/i8259_internal.h b/include/hw/isa/i8259_interna= l.h index 6954b6ec5f..f742c2a726 100644 --- a/include/hw/isa/i8259_internal.h +++ b/include/hw/isa/i8259_internal.h @@ -28,6 +28,7 @@ #include "hw/hw.h" #include "hw/i386/pc.h" #include "hw/isa/isa.h" +#include "hw/intc/intc.h" =20 typedef struct PICCommonState PICCommonState; =20 @@ -76,8 +77,10 @@ struct PICCommonState { }; =20 void pic_reset_common(PICCommonState *s); - ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master); - +void pic_stat_update_irq(int irq, int level); +bool pic_get_statistics(InterruptStatsProvider *obj, + uint64_t **irq_counts, unsigned int *nb_irqs); +void pic_print_info(InterruptStatsProvider *obj, Monitor *mon); =20 #endif /* QEMU_I8259_INTERNAL_H */ --=20 2.14.3