From nobody Tue Dec 16 16:20:39 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1512588326558877.8986555906683; Wed, 6 Dec 2017 11:25:26 -0800 (PST) Received: from localhost ([::1]:57190 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMfJU-0007kI-Dp for importer@patchew.org; Wed, 06 Dec 2017 14:25:00 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48718) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMfC3-00086F-8X for qemu-devel@nongnu.org; Wed, 06 Dec 2017 14:17:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eMfBz-00006B-0Z for qemu-devel@nongnu.org; Wed, 06 Dec 2017 14:17:19 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:58800 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eMfBy-000055-P9 for qemu-devel@nongnu.org; Wed, 06 Dec 2017 14:17:14 -0500 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vB6JE89E036904 for ; Wed, 6 Dec 2017 14:17:14 -0500 Received: from e15.ny.us.ibm.com (e15.ny.us.ibm.com [129.33.205.205]) by mx0b-001b2d01.pphosted.com with ESMTP id 2epne8b84y-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 06 Dec 2017 14:17:13 -0500 Received: from localhost by e15.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 6 Dec 2017 14:17:10 -0500 Received: from b01ledav002.gho.pok.ibm.com (b01ledav002.gho.pok.ibm.com [9.57.199.107]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vB6JHAAb34471942; Wed, 6 Dec 2017 19:17:10 GMT Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 38067124044; Wed, 6 Dec 2017 14:14:10 -0500 (EST) Received: from localhost (unknown [9.80.93.86]) by b01ledav002.gho.pok.ibm.com (Postfix) with ESMTP id DD9E212403F; Wed, 6 Dec 2017 14:14:09 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Wed, 6 Dec 2017 13:16:05 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171206191648.18208-1-mdroth@linux.vnet.ibm.com> References: <20171206191648.18208-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17120619-0036-0000-0000-000002976FC6 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008161; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000244; SDB=6.00956379; UDB=6.00483442; IPR=6.00736416; BA=6.00005729; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00018387; XFM=3.00000015; UTC=2017-12-06 19:17:12 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17120619-0037-0000-0000-0000429795AA Message-Id: <20171206191648.18208-13-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-06_07:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=67 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712060273 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 12/55] memory: Switch memory from using AddressSpace to FlatView X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexey Kardashevskiy , Paolo Bonzini , qemu-stable@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alexey Kardashevskiy FlatView's will be shared between AddressSpace's and subpage_t and MemoryRegionSection cannot store AS anymore, hence this change. In particular, for: typedef struct subpage_t { MemoryRegion iomem; - AddressSpace *as; + FlatView *fv; hwaddr base; uint16_t sub_section[]; } subpage_t; struct MemoryRegionSection { MemoryRegion *mr; - AddressSpace *address_space; + FlatView *fv; hwaddr offset_within_region; Int128 size; hwaddr offset_within_address_space; bool readonly; }; This should cause no behavioural change. Signed-off-by: Alexey Kardashevskiy Message-Id: <20170921085110.25598-7-aik@ozlabs.ru> Signed-off-by: Paolo Bonzini (cherry picked from commit 166206845f7fd75e720e6feea0bb01957c8da07f) Signed-off-by: Michael Roth --- exec.c | 180 ++++++++++++++++++++++++-------------= ---- hw/intc/openpic_kvm.c | 2 +- include/exec/memory-internal.h | 2 +- include/exec/memory.h | 51 ++++++++---- memory.c | 33 ++++---- 5 files changed, 159 insertions(+), 109 deletions(-) diff --git a/exec.c b/exec.c index 3212c5e70d..b561098df3 100644 --- a/exec.c +++ b/exec.c @@ -199,7 +199,7 @@ struct AddressSpaceDispatch { #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) typedef struct subpage_t { MemoryRegion iomem; - AddressSpace *as; + FlatView *fv; hwaddr base; uint16_t sub_section[]; } subpage_t; @@ -469,13 +469,13 @@ address_space_translate_internal(AddressSpaceDispatch= *d, hwaddr addr, hwaddr *x } =20 /* Called from RCU critical section */ -static MemoryRegionSection address_space_do_translate(AddressSpace *as, - hwaddr addr, - hwaddr *xlat, - hwaddr *plen, - bool is_write, - bool is_mmio, - AddressSpace **targe= t_as) +static MemoryRegionSection flatview_do_translate(FlatView *fv, + hwaddr addr, + hwaddr *xlat, + hwaddr *plen, + bool is_write, + bool is_mmio, + AddressSpace **target_as) { IOMMUTLBEntry iotlb; MemoryRegionSection *section; @@ -483,8 +483,9 @@ static MemoryRegionSection address_space_do_translate(A= ddressSpace *as, IOMMUMemoryRegionClass *imrc; =20 for (;;) { - AddressSpaceDispatch *d =3D address_space_to_dispatch(as); - section =3D address_space_translate_internal(d, addr, &addr, plen,= is_mmio); + section =3D address_space_translate_internal( + flatview_to_dispatch(fv), addr, &addr, + plen, is_mmio); =20 iommu_mr =3D memory_region_get_iommu(section->mr); if (!iommu_mr) { @@ -501,7 +502,7 @@ static MemoryRegionSection address_space_do_translate(A= ddressSpace *as, goto translate_fail; } =20 - as =3D iotlb.target_as; + fv =3D address_space_to_flatview(iotlb.target_as); *target_as =3D iotlb.target_as; } =20 @@ -524,8 +525,8 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpac= e *as, hwaddr addr, plen =3D (hwaddr)-1; =20 /* This can never be MMIO. */ - section =3D address_space_do_translate(as, addr, &xlat, &plen, - is_write, false, &as); + section =3D flatview_do_translate(address_space_to_flatview(as), addr, + &xlat, &plen, is_write, false, &as); =20 /* Illegal translation */ if (section.mr =3D=3D &io_mem_unassigned) { @@ -561,16 +562,15 @@ iotlb_fail: } =20 /* Called from RCU critical section */ -MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, - hwaddr *xlat, hwaddr *plen, - bool is_write) +MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr, hwaddr *xlat, + hwaddr *plen, bool is_write) { MemoryRegion *mr; MemoryRegionSection section; + AddressSpace *as =3D NULL; =20 /* This can be MMIO, so setup MMIO bit. */ - section =3D address_space_do_translate(as, addr, xlat, plen, is_write,= true, - &as); + section =3D flatview_do_translate(fv, addr, xlat, plen, is_write, true= , &as); mr =3D section.mr; =20 if (xen_enabled() && memory_access_is_direct(mr, is_write)) { @@ -1220,7 +1220,7 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu, } else { AddressSpaceDispatch *d; =20 - d =3D address_space_to_dispatch(section->address_space); + d =3D flatview_to_dispatch(section->fv); iotlb =3D section - d->map.sections; iotlb +=3D xlat; } @@ -1246,7 +1246,7 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu, =20 static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, uint16_t section); -static subpage_t *subpage_init(AddressSpace *as, hwaddr base); +static subpage_t *subpage_init(FlatView *fv, hwaddr base); =20 static void *(*phys_mem_alloc)(size_t size, uint64_t *align) =3D qemu_anon_ram_alloc; @@ -1303,7 +1303,7 @@ static void phys_sections_free(PhysPageMap *map) g_free(map->nodes); } =20 -static void register_subpage(AddressSpace *as, AddressSpaceDispatch *d, +static void register_subpage(FlatView *fv, AddressSpaceDispatch *d, MemoryRegionSection *section) { subpage_t *subpage; @@ -1319,8 +1319,8 @@ static void register_subpage(AddressSpace *as, Addres= sSpaceDispatch *d, assert(existing->mr->subpage || existing->mr =3D=3D &io_mem_unassigned= ); =20 if (!(existing->mr->subpage)) { - subpage =3D subpage_init(as, base); - subsection.address_space =3D as; + subpage =3D subpage_init(fv, base); + subsection.fv =3D fv; subsection.mr =3D &subpage->iomem; phys_page_set(d, base >> TARGET_PAGE_BITS, 1, phys_section_add(&d->map, &subsection)); @@ -1346,7 +1346,7 @@ static void register_multipage(AddressSpaceDispatch *= d, phys_page_set(d, start_addr >> TARGET_PAGE_BITS, num_pages, section_in= dex); } =20 -void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section) +void mem_add(FlatView *fv, MemoryRegionSection *section) { AddressSpaceDispatch *d =3D flatview_to_dispatch(fv); MemoryRegionSection now =3D *section, remain =3D *section; @@ -1357,7 +1357,7 @@ void mem_add(AddressSpace *as, FlatView *fv, MemoryRe= gionSection *section) - now.offset_within_address_space; =20 now.size =3D int128_min(int128_make64(left), now.size); - register_subpage(as, d, &now); + register_subpage(fv, d, &now); } else { now.size =3D int128_zero(); } @@ -1367,10 +1367,10 @@ void mem_add(AddressSpace *as, FlatView *fv, Memory= RegionSection *section) remain.offset_within_region +=3D int128_get64(now.size); now =3D remain; if (int128_lt(remain.size, page_size)) { - register_subpage(as, d, &now); + register_subpage(fv, d, &now); } else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK)= { now.size =3D page_size; - register_subpage(as, d, &now); + register_subpage(fv, d, &now); } else { now.size =3D int128_and(now.size, int128_neg(page_size)); register_multipage(d, &now); @@ -2501,6 +2501,11 @@ static const MemoryRegionOps watch_mem_ops =3D { .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 +static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs at= trs, + const uint8_t *buf, int len); +static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, + bool is_write); + static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, unsigned len, MemTxAttrs attrs) { @@ -2512,8 +2517,7 @@ static MemTxResult subpage_read(void *opaque, hwaddr = addr, uint64_t *data, printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__, subpage, len, addr); #endif - res =3D address_space_read(subpage->as, addr + subpage->base, - attrs, buf, len); + res =3D flatview_read(subpage->fv, addr + subpage->base, attrs, buf, l= en); if (res) { return res; } @@ -2562,8 +2566,7 @@ static MemTxResult subpage_write(void *opaque, hwaddr= addr, default: abort(); } - return address_space_write(subpage->as, addr + subpage->base, - attrs, buf, len); + return flatview_write(subpage->fv, addr + subpage->base, attrs, buf, l= en); } =20 static bool subpage_accepts(void *opaque, hwaddr addr, @@ -2575,8 +2578,8 @@ static bool subpage_accepts(void *opaque, hwaddr addr, __func__, subpage, is_write ? 'w' : 'r', len, addr); #endif =20 - return address_space_access_valid(subpage->as, addr + subpage->base, - len, is_write); + return flatview_access_valid(subpage->fv, addr + subpage->base, + len, is_write); } =20 static const MemoryRegionOps subpage_ops =3D { @@ -2610,12 +2613,12 @@ static int subpage_register (subpage_t *mmio, uint3= 2_t start, uint32_t end, return 0; } =20 -static subpage_t *subpage_init(AddressSpace *as, hwaddr base) +static subpage_t *subpage_init(FlatView *fv, hwaddr base) { subpage_t *mmio; =20 mmio =3D g_malloc0(sizeof(subpage_t) + TARGET_PAGE_SIZE * sizeof(uint1= 6_t)); - mmio->as =3D as; + mmio->fv =3D fv; mmio->base =3D base; memory_region_init_io(&mmio->iomem, NULL, &subpage_ops, mmio, NULL, TARGET_PAGE_SIZE); @@ -2629,12 +2632,11 @@ static subpage_t *subpage_init(AddressSpace *as, hw= addr base) return mmio; } =20 -static uint16_t dummy_section(PhysPageMap *map, AddressSpace *as, - MemoryRegion *mr) +static uint16_t dummy_section(PhysPageMap *map, FlatView *fv, MemoryRegion= *mr) { - assert(as); + assert(fv); MemoryRegionSection section =3D { - .address_space =3D as, + .fv =3D fv, .mr =3D mr, .offset_within_address_space =3D 0, .offset_within_region =3D 0, @@ -2673,16 +2675,17 @@ static void io_mem_init(void) =20 AddressSpaceDispatch *mem_begin(AddressSpace *as) { + FlatView *fv =3D address_space_to_flatview(as); AddressSpaceDispatch *d =3D g_new0(AddressSpaceDispatch, 1); uint16_t n; =20 - n =3D dummy_section(&d->map, as, &io_mem_unassigned); + n =3D dummy_section(&d->map, fv, &io_mem_unassigned); assert(n =3D=3D PHYS_SECTION_UNASSIGNED); - n =3D dummy_section(&d->map, as, &io_mem_notdirty); + n =3D dummy_section(&d->map, fv, &io_mem_notdirty); assert(n =3D=3D PHYS_SECTION_NOTDIRTY); - n =3D dummy_section(&d->map, as, &io_mem_rom); + n =3D dummy_section(&d->map, fv, &io_mem_rom); assert(n =3D=3D PHYS_SECTION_ROM); - n =3D dummy_section(&d->map, as, &io_mem_watch); + n =3D dummy_section(&d->map, fv, &io_mem_watch); assert(n =3D=3D PHYS_SECTION_WATCH); =20 d->phys_map =3D (PhysPageEntry) { .ptr =3D PHYS_MAP_NODE_NIL, .skip = =3D 1 }; @@ -2862,11 +2865,11 @@ static bool prepare_mmio_access(MemoryRegion *mr) } =20 /* Called within RCU critical section. */ -static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr a= ddr, - MemTxAttrs attrs, - const uint8_t *buf, - int len, hwaddr addr1, - hwaddr l, MemoryRegion *mr) +static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr, + MemTxAttrs attrs, + const uint8_t *buf, + int len, hwaddr addr1, + hwaddr l, MemoryRegion *mr) { uint8_t *ptr; uint64_t val; @@ -2928,14 +2931,14 @@ static MemTxResult address_space_write_continue(Add= ressSpace *as, hwaddr addr, } =20 l =3D len; - mr =3D address_space_translate(as, addr, &addr1, &l, true); + mr =3D flatview_translate(fv, addr, &addr1, &l, true); } =20 return result; } =20 -MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs = attrs, - const uint8_t *buf, int len) +static MemTxResult flatview_write(FlatView *fv, hwaddr addr, MemTxAttrs at= trs, + const uint8_t *buf, int len) { hwaddr l; hwaddr addr1; @@ -2945,20 +2948,27 @@ MemTxResult address_space_write(AddressSpace *as, h= waddr addr, MemTxAttrs attrs, if (len > 0) { rcu_read_lock(); l =3D len; - mr =3D address_space_translate(as, addr, &addr1, &l, true); - result =3D address_space_write_continue(as, addr, attrs, buf, len, - addr1, l, mr); + mr =3D flatview_translate(fv, addr, &addr1, &l, true); + result =3D flatview_write_continue(fv, addr, attrs, buf, len, + addr1, l, mr); rcu_read_unlock(); } =20 return result; } =20 +MemTxResult address_space_write(AddressSpace *as, hwaddr addr, + MemTxAttrs attrs, + const uint8_t *buf, int len) +{ + return flatview_write(address_space_to_flatview(as), addr, attrs, buf,= len); +} + /* Called within RCU critical section. */ -MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, - int len, hwaddr addr1, hwaddr l, - MemoryRegion *mr) +MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, + MemTxAttrs attrs, uint8_t *buf, + int len, hwaddr addr1, hwaddr l, + MemoryRegion *mr) { uint8_t *ptr; uint64_t val; @@ -3018,14 +3028,14 @@ MemTxResult address_space_read_continue(AddressSpac= e *as, hwaddr addr, } =20 l =3D len; - mr =3D address_space_translate(as, addr, &addr1, &l, false); + mr =3D flatview_translate(fv, addr, &addr1, &l, false); } =20 return result; } =20 -MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, int le= n) +MemTxResult flatview_read_full(FlatView *fv, hwaddr addr, + MemTxAttrs attrs, uint8_t *buf, int len) { hwaddr l; hwaddr addr1; @@ -3035,25 +3045,33 @@ MemTxResult address_space_read_full(AddressSpace *a= s, hwaddr addr, if (len > 0) { rcu_read_lock(); l =3D len; - mr =3D address_space_translate(as, addr, &addr1, &l, false); - result =3D address_space_read_continue(as, addr, attrs, buf, len, - addr1, l, mr); + mr =3D flatview_translate(fv, addr, &addr1, &l, false); + result =3D flatview_read_continue(fv, addr, attrs, buf, len, + addr1, l, mr); rcu_read_unlock(); } =20 return result; } =20 -MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs att= rs, - uint8_t *buf, int len, bool is_write) +static MemTxResult flatview_rw(FlatView *fv, hwaddr addr, MemTxAttrs attrs, + uint8_t *buf, int len, bool is_write) { if (is_write) { - return address_space_write(as, addr, attrs, (uint8_t *)buf, len); + return flatview_write(fv, addr, attrs, (uint8_t *)buf, len); } else { - return address_space_read(as, addr, attrs, (uint8_t *)buf, len); + return flatview_read(fv, addr, attrs, (uint8_t *)buf, len); } } =20 +MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, + MemTxAttrs attrs, uint8_t *buf, + int len, bool is_write) +{ + return flatview_rw(address_space_to_flatview(as), + addr, attrs, buf, len, is_write); +} + void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf, int len, int is_write) { @@ -3211,7 +3229,8 @@ static void cpu_notify_map_clients(void) qemu_mutex_unlock(&map_client_list_lock); } =20 -bool address_space_access_valid(AddressSpace *as, hwaddr addr, int len, bo= ol is_write) +static bool flatview_access_valid(FlatView *fv, hwaddr addr, int len, + bool is_write) { MemoryRegion *mr; hwaddr l, xlat; @@ -3219,7 +3238,7 @@ bool address_space_access_valid(AddressSpace *as, hwa= ddr addr, int len, bool is_ rcu_read_lock(); while (len > 0) { l =3D len; - mr =3D address_space_translate(as, addr, &xlat, &l, is_write); + mr =3D flatview_translate(fv, addr, &xlat, &l, is_write); if (!memory_access_is_direct(mr, is_write)) { l =3D memory_access_size(mr, l, addr); if (!memory_region_access_valid(mr, xlat, l, is_write)) { @@ -3235,8 +3254,16 @@ bool address_space_access_valid(AddressSpace *as, hw= addr addr, int len, bool is_ return true; } =20 +bool address_space_access_valid(AddressSpace *as, hwaddr addr, + int len, bool is_write) +{ + return flatview_access_valid(address_space_to_flatview(as), + addr, len, is_write); +} + static hwaddr -address_space_extend_translation(AddressSpace *as, hwaddr addr, hwaddr tar= get_len, +flatview_extend_translation(FlatView *fv, hwaddr addr, + hwaddr target_len, MemoryRegion *mr, hwaddr base, hwaddr len, bool is_write) { @@ -3253,7 +3280,8 @@ address_space_extend_translation(AddressSpace *as, hw= addr addr, hwaddr target_le } =20 len =3D target_len; - this_mr =3D address_space_translate(as, addr, &xlat, &len, is_writ= e); + this_mr =3D flatview_translate(fv, addr, &xlat, + &len, is_write); if (this_mr !=3D mr || xlat !=3D base + done) { return done; } @@ -3276,6 +3304,7 @@ void *address_space_map(AddressSpace *as, hwaddr l, xlat; MemoryRegion *mr; void *ptr; + FlatView *fv =3D address_space_to_flatview(as); =20 if (len =3D=3D 0) { return NULL; @@ -3283,7 +3312,7 @@ void *address_space_map(AddressSpace *as, =20 l =3D len; rcu_read_lock(); - mr =3D address_space_translate(as, addr, &xlat, &l, is_write); + mr =3D flatview_translate(fv, addr, &xlat, &l, is_write); =20 if (!memory_access_is_direct(mr, is_write)) { if (atomic_xchg(&bounce.in_use, true)) { @@ -3299,7 +3328,7 @@ void *address_space_map(AddressSpace *as, memory_region_ref(mr); bounce.mr =3D mr; if (!is_write) { - address_space_read(as, addr, MEMTXATTRS_UNSPECIFIED, + flatview_read(fv, addr, MEMTXATTRS_UNSPECIFIED, bounce.buffer, l); } =20 @@ -3310,7 +3339,8 @@ void *address_space_map(AddressSpace *as, =20 =20 memory_region_ref(mr); - *plen =3D address_space_extend_translation(as, addr, len, mr, xlat, l,= is_write); + *plen =3D flatview_extend_translation(fv, addr, len, mr, xlat, + l, is_write); ptr =3D qemu_ram_ptr_length(mr->ram_block, xlat, plen, true); rcu_read_unlock(); =20 diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c index 0518e017c4..fa83420254 100644 --- a/hw/intc/openpic_kvm.c +++ b/hw/intc/openpic_kvm.c @@ -124,7 +124,7 @@ static void kvm_openpic_region_add(MemoryListener *list= ener, uint64_t reg_base; int ret; =20 - if (section->address_space !=3D &address_space_memory) { + if (section->fv !=3D address_space_to_flatview(&address_space_memory))= { abort(); } =20 diff --git a/include/exec/memory-internal.h b/include/exec/memory-internal.h index 6e08eda256..1cf8ad9869 100644 --- a/include/exec/memory-internal.h +++ b/include/exec/memory-internal.h @@ -27,7 +27,7 @@ extern const MemoryRegionOps unassigned_mem_ops; bool memory_region_access_valid(MemoryRegion *mr, hwaddr addr, unsigned size, bool is_write); =20 -void mem_add(AddressSpace *as, FlatView *fv, MemoryRegionSection *section); +void mem_add(FlatView *fv, MemoryRegionSection *section); AddressSpaceDispatch *mem_begin(AddressSpace *as); void mem_commit(AddressSpaceDispatch *d); =20 diff --git a/include/exec/memory.h b/include/exec/memory.h index 8f26d63417..6715551fc6 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -48,6 +48,7 @@ =20 typedef struct MemoryRegionOps MemoryRegionOps; typedef struct MemoryRegionMmio MemoryRegionMmio; +typedef struct FlatView FlatView; =20 struct MemoryRegionMmio { CPUReadMemoryFunc *read[3]; @@ -330,6 +331,8 @@ struct AddressSpace { QTAILQ_ENTRY(AddressSpace) address_spaces_link; }; =20 +FlatView *address_space_to_flatview(AddressSpace *as); + /** * MemoryRegionSection: describes a fragment of a #MemoryRegion * @@ -343,7 +346,7 @@ struct AddressSpace { */ struct MemoryRegionSection { MemoryRegion *mr; - AddressSpace *address_space; + FlatView *fv; hwaddr offset_within_region; Int128 size; hwaddr offset_within_address_space; @@ -1852,9 +1855,17 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressS= pace *as, hwaddr addr, * @len: pointer to length * @is_write: indicates the transfer direction */ -MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr, - hwaddr *xlat, hwaddr *len, - bool is_write); +MemoryRegion *flatview_translate(FlatView *fv, + hwaddr addr, hwaddr *xlat, + hwaddr *len, bool is_write); + +static inline MemoryRegion *address_space_translate(AddressSpace *as, + hwaddr addr, hwaddr *x= lat, + hwaddr *len, bool is_w= rite) +{ + return flatview_translate(address_space_to_flatview(as), + addr, xlat, len, is_write); +} =20 /* address_space_access_valid: check for validity of accessing an address * space range @@ -1905,12 +1916,13 @@ void address_space_unmap(AddressSpace *as, void *bu= ffer, hwaddr len, =20 =20 /* Internal functions, part of the implementation of address_space_read. = */ -MemTxResult address_space_read_continue(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, - int len, hwaddr addr1, hwaddr l, - MemoryRegion *mr); -MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr, - MemTxAttrs attrs, uint8_t *buf, int le= n); +MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr, + MemTxAttrs attrs, uint8_t *buf, + int len, hwaddr addr1, hwaddr l, + MemoryRegion *mr); + +MemTxResult flatview_read_full(FlatView *fv, hwaddr addr, + MemTxAttrs attrs, uint8_t *buf, int len); void *qemu_map_ram_ptr(RAMBlock *ram_block, ram_addr_t addr); =20 static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write) @@ -1937,8 +1949,8 @@ static inline bool memory_access_is_direct(MemoryRegi= on *mr, bool is_write) * @buf: buffer with the data transferred */ static inline __attribute__((__always_inline__)) -MemTxResult address_space_read(AddressSpace *as, hwaddr addr, MemTxAttrs a= ttrs, - uint8_t *buf, int len) +MemTxResult flatview_read(FlatView *fv, hwaddr addr, MemTxAttrs attrs, + uint8_t *buf, int len) { MemTxResult result =3D MEMTX_OK; hwaddr l, addr1; @@ -1949,22 +1961,29 @@ MemTxResult address_space_read(AddressSpace *as, hw= addr addr, MemTxAttrs attrs, if (len) { rcu_read_lock(); l =3D len; - mr =3D address_space_translate(as, addr, &addr1, &l, false); + mr =3D flatview_translate(fv, addr, &addr1, &l, false); if (len =3D=3D l && memory_access_is_direct(mr, false)) { ptr =3D qemu_map_ram_ptr(mr->ram_block, addr1); memcpy(buf, ptr, len); } else { - result =3D address_space_read_continue(as, addr, attrs, bu= f, len, - addr1, l, mr); + result =3D flatview_read_continue(fv, addr, attrs, buf, le= n, + addr1, l, mr); } rcu_read_unlock(); } } else { - result =3D address_space_read_full(as, addr, attrs, buf, len); + result =3D flatview_read_full(fv, addr, attrs, buf, len); } return result; } =20 +static inline MemTxResult address_space_read(AddressSpace *as, hwaddr addr, + MemTxAttrs attrs, uint8_t *bu= f, + int len) +{ + return flatview_read(address_space_to_flatview(as), addr, attrs, buf, = len); +} + /** * address_space_read_cached: read from a cached RAM region * diff --git a/memory.c b/memory.c index 41e2e67301..6678a538d2 100644 --- a/memory.c +++ b/memory.c @@ -154,7 +154,8 @@ enum ListenerDirection { Forward, Reverse }; /* No need to ref/unref .mr, the FlatRange keeps it alive. */ #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \ do { \ - MemoryRegionSection mrs =3D section_from_flat_range(fr, as); \ + MemoryRegionSection mrs =3D section_from_flat_range(fr, \ + address_space_to_flatview(as)); \ MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \ } while(0) =20 @@ -208,7 +209,6 @@ static bool memory_region_ioeventfd_equal(MemoryRegionI= oeventfd a, } =20 typedef struct FlatRange FlatRange; -typedef struct FlatView FlatView; =20 /* Range of memory in the global map. Addresses are absolute. */ struct FlatRange { @@ -238,11 +238,11 @@ typedef struct AddressSpaceOps AddressSpaceOps; for (var =3D (view)->ranges; var < (view)->ranges + (view)->nr; ++var) =20 static inline MemoryRegionSection -section_from_flat_range(FlatRange *fr, AddressSpace *as) +section_from_flat_range(FlatRange *fr, FlatView *fv) { return (MemoryRegionSection) { .mr =3D fr->mr, - .address_space =3D as, + .fv =3D fv, .offset_within_region =3D fr->offset_in_region, .size =3D fr->addr.size, .offset_within_address_space =3D int128_get64(fr->addr.start), @@ -312,7 +312,7 @@ static void flatview_unref(FlatView *view) } } =20 -static FlatView *address_space_to_flatview(AddressSpace *as) +FlatView *address_space_to_flatview(AddressSpace *as) { return atomic_rcu_read(&as->current_map); } @@ -760,7 +760,7 @@ static void address_space_add_del_ioeventfds(AddressSpa= ce *as, fds_new[inew]))) { fd =3D &fds_old[iold]; section =3D (MemoryRegionSection) { - .address_space =3D as, + .fv =3D address_space_to_flatview(as), .offset_within_address_space =3D int128_get64(fd->addr.sta= rt), .size =3D fd->addr.size, }; @@ -773,7 +773,7 @@ static void address_space_add_del_ioeventfds(AddressSpa= ce *as, fds_old[iold]))) { fd =3D &fds_new[inew]; section =3D (MemoryRegionSection) { - .address_space =3D as, + .fv =3D address_space_to_flatview(as), .offset_within_address_space =3D int128_get64(fd->addr.sta= rt), .size =3D fd->addr.size, }; @@ -793,7 +793,7 @@ static FlatView *address_space_get_flatview(AddressSpac= e *as) =20 rcu_read_lock(); do { - view =3D atomic_rcu_read(&as->current_map); + view =3D address_space_to_flatview(as); /* If somebody has replaced as->current_map concurrently, * flatview_ref returns false. */ @@ -912,8 +912,8 @@ static void address_space_update_topology(AddressSpace = *as) new_view->dispatch =3D mem_begin(as); for (i =3D 0; i < new_view->nr; i++) { MemoryRegionSection mrs =3D - section_from_flat_range(&new_view->ranges[i], as); - mem_add(as, new_view, &mrs); + section_from_flat_range(&new_view->ranges[i], new_view); + mem_add(new_view, &mrs); } mem_commit(new_view->dispatch); =20 @@ -1869,7 +1869,7 @@ void memory_region_sync_dirty_bitmap(MemoryRegion *mr) view =3D address_space_get_flatview(as); FOR_EACH_FLAT_RANGE(fr, view) { if (fr->mr =3D=3D mr) { - MemoryRegionSection mrs =3D section_from_flat_range(fr, as= ); + MemoryRegionSection mrs =3D section_from_flat_range(fr, vi= ew); listener->log_sync(listener, &mrs); } } @@ -1972,7 +1972,7 @@ static void memory_region_update_coalesced_range_as(M= emoryRegion *mr, AddressSpa FOR_EACH_FLAT_RANGE(fr, view) { if (fr->mr =3D=3D mr) { section =3D (MemoryRegionSection) { - .address_space =3D as, + .fv =3D view, .offset_within_address_space =3D int128_get64(fr->addr.sta= rt), .size =3D fr->addr.size, }; @@ -2323,7 +2323,7 @@ static MemoryRegionSection memory_region_find_rcu(Mem= oryRegion *mr, } range =3D addrrange_make(int128_make64(addr), int128_make64(size)); =20 - view =3D atomic_rcu_read(&as->current_map); + view =3D address_space_to_flatview(as); fr =3D flatview_lookup(view, range); if (!fr) { return ret; @@ -2334,7 +2334,7 @@ static MemoryRegionSection memory_region_find_rcu(Mem= oryRegion *mr, } =20 ret.mr =3D fr->mr; - ret.address_space =3D as; + ret.fv =3D view; range =3D addrrange_intersection(range, fr->addr); ret.offset_within_region =3D fr->offset_in_region; ret.offset_within_region +=3D int128_get64(int128_sub(range.start, @@ -2383,7 +2383,8 @@ void memory_global_dirty_log_sync(void) view =3D address_space_get_flatview(as); FOR_EACH_FLAT_RANGE(fr, view) { if (fr->dirty_log_mask) { - MemoryRegionSection mrs =3D section_from_flat_range(fr, as= ); + MemoryRegionSection mrs =3D section_from_flat_range(fr, vi= ew); + listener->log_sync(listener, &mrs); } } @@ -2468,7 +2469,7 @@ static void listener_add_address_space(MemoryListener= *listener, FOR_EACH_FLAT_RANGE(fr, view) { MemoryRegionSection section =3D { .mr =3D fr->mr, - .address_space =3D as, + .fv =3D view, .offset_within_region =3D fr->offset_in_region, .size =3D fr->addr.size, .offset_within_address_space =3D int128_get64(fr->addr.start), --=20 2.11.0