From nobody Tue Feb 10 20:28:23 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511444510856542.0880085988208; Thu, 23 Nov 2017 05:41:50 -0800 (PST) Received: from localhost ([::1]:44412 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eHrlA-0001KG-T6 for importer@patchew.org; Thu, 23 Nov 2017 08:41:44 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39702) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eHrcJ-00026u-Sl for qemu-devel@nongnu.org; Thu, 23 Nov 2017 08:32:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eHrcG-0002wh-Mp for qemu-devel@nongnu.org; Thu, 23 Nov 2017 08:32:35 -0500 Received: from 20.mo3.mail-out.ovh.net ([178.33.47.94]:34402) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eHrcG-0002ux-FH for qemu-devel@nongnu.org; Thu, 23 Nov 2017 08:32:32 -0500 Received: from player797.ha.ovh.net (gw6.ovh.net [213.251.189.206]) by mo3.mail-out.ovh.net (Postfix) with ESMTP id 2DEFF16E538 for ; Thu, 23 Nov 2017 14:32:31 +0100 (CET) Received: from zorba.kaod.org.com (LFbn-1-2231-173.w90-76.abo.wanadoo.fr [90.76.52.173]) (Authenticated sender: clg@kaod.org) by player797.ha.ovh.net (Postfix) with ESMTPSA id F33952E00A2; Thu, 23 Nov 2017 14:32:25 +0100 (CET) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson , Benjamin Herrenschmidt Date: Thu, 23 Nov 2017 14:29:48 +0100 Message-Id: <20171123132955.1261-19-clg@kaod.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171123132955.1261-1-clg@kaod.org> References: <20171123132955.1261-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 14839079300336028499 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedttddrledtgdefhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 178.33.47.94 Subject: [Qemu-devel] [PATCH 18/25] spapr: allocate IRQ numbers for the XIVE interrupt mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The IRQ numbers for the IPIs are allocated at the bottom of the IRQ number space to preserve compatibility with XICS which only uses IRQ numbers above 4096. Also make sure that the allocated IRQ numbers are kept in sync between XICS and XIVE. Signed-off-by: C=C3=A9dric Le Goater --- hw/ppc/spapr.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 0e0107c8272c..ca4e72187f60 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2392,6 +2392,11 @@ static void ppc_spapr_init(MachineState *machine) * use the range below XICS_IRQ_BASE, which is unused by XICS. */ spapr->xive =3D spapr_xive_create(spapr, XICS_IRQ_BASE + XICS_IRQS= _SPAPR, &error_fatal); + + /* Allocate the first IRQ numbers for the XIVE IPIs */ + for (i =3D 0; i < xics_max_server_number(); ++i) { + spapr_xive_irq_set(spapr->xive, i, false); + } } =20 /* Set up containers for ibm,client-architecture-support negotiated op= tions @@ -3631,6 +3636,7 @@ static int ics_find_free_block(ICSState *ics, int num= , int alignnum) static void spapr_irq_set(sPAPRMachineState *spapr, int irq, bool lsi) { ics_set_irq_type(spapr->ics, irq - spapr->ics->offset, lsi); + spapr_xive_irq_set(spapr->xive, irq, lsi); } =20 int spapr_irq_alloc(sPAPRMachineState *spapr, int irq_hint, bool lsi, @@ -3721,6 +3727,7 @@ void spapr_irq_free(sPAPRMachineState *spapr, int irq= , int num) memset(&ics->irqs[i], 0, sizeof(ICSIRQState)); } } + spapr_xive_irq_unset(spapr->xive, irq); } =20 qemu_irq spapr_irq_get_qirq(sPAPRMachineState *spapr, int irq) --=20 2.13.6