From nobody Tue Feb 10 17:31:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 151144453985358.938437467582276; Thu, 23 Nov 2017 05:42:19 -0800 (PST) Received: from localhost ([::1]:44414 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eHrle-0001v6-3y for importer@patchew.org; Thu, 23 Nov 2017 08:42:14 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38832) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eHrbm-0001dU-4T for qemu-devel@nongnu.org; Thu, 23 Nov 2017 08:32:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eHrbg-0001wN-5b for qemu-devel@nongnu.org; Thu, 23 Nov 2017 08:32:02 -0500 Received: from 15.mo3.mail-out.ovh.net ([87.98.150.177]:59483) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eHrbf-0001uT-W4 for qemu-devel@nongnu.org; Thu, 23 Nov 2017 08:31:56 -0500 Received: from player797.ha.ovh.net (gw6.ovh.net [213.251.189.206]) by mo3.mail-out.ovh.net (Postfix) with ESMTP id F27F2175ADC for ; Thu, 23 Nov 2017 14:31:54 +0100 (CET) Received: from zorba.kaod.org.com (LFbn-1-2231-173.w90-76.abo.wanadoo.fr [90.76.52.173]) (Authenticated sender: clg@kaod.org) by player797.ha.ovh.net (Postfix) with ESMTPSA id C343B2E0081; Thu, 23 Nov 2017 14:31:49 +0100 (CET) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson , Benjamin Herrenschmidt Date: Thu, 23 Nov 2017 14:29:41 +0100 Message-Id: <20171123132955.1261-12-clg@kaod.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171123132955.1261-1-clg@kaod.org> References: <20171123132955.1261-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 14828664725220199251 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedttddrledtgdefhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 87.98.150.177 Subject: [Qemu-devel] [PATCH 11/25] spapr: describe the XIVE interrupt source flags X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The XIVE interrupt sources can have different characteristics depending on their nature and the HW level in use. The sPAPR specs provide a set of flags to describe them : - XIVE_SRC_H_INT_ESB the Event State Buffers are controlled with a specific hcall H_INT_ESB and not with MMIO - XIVE_SRC_LSI LSI or MSI source (ICSIRQState level) - XIVE_SRC_TRIGGER the full function page supports trigger - XIVE_SRC_STORE_EOI EOI can be done with a store. Our QEMU emulation of XIVE for the sPAPR machine gathers all sources under a same model and provides a common source with the XIVE_SRC_TRIGGER type. So, the above list is mostly informative apart from the XIVE_SRC_LSI flag which will be deduced from the XIVE_STATUS_LSI flag. The OS retrieves this information on the source with the H_INT_GET_SOURCE_INFO hcall. Signed-off-by: C=C3=A9dric Le Goater --- hw/intc/spapr_xive.c | 4 ++++ include/hw/ppc/spapr_xive.h | 7 +++++++ 2 files changed, 11 insertions(+) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index f45f50fd017e..b1e3f8710cff 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -368,6 +368,10 @@ static void spapr_xive_realize(DeviceState *dev, Error= **errp) /* Allocate the IVT (Interrupt Virtualization Table) */ xive->ivt =3D g_malloc0(xive->nr_irqs * sizeof(XiveIVE)); =20 + /* All sources are emulated under the XIVE object and share the + * same characteristic */ + xive->flags =3D XIVE_SRC_TRIGGER; + /* Allocate SBEs (State Bit Entry). 2 bits, so 4 entries per byte */ xive->sbe_size =3D DIV_ROUND_UP(xive->nr_irqs, 4); xive->sbe =3D g_malloc0(xive->sbe_size); diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 84c910e62e56..7a308fb4db2b 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -40,6 +40,13 @@ struct sPAPRXive { #define XIVE_STATUS_SENT 0x4 uint8_t *status; =20 + /* Interrupt source flags */ +#define XIVE_SRC_H_INT_ESB (1ull << (63 - 60)) +#define XIVE_SRC_LSI (1ull << (63 - 61)) +#define XIVE_SRC_TRIGGER (1ull << (63 - 62)) +#define XIVE_SRC_STORE_EOI (1ull << (63 - 63)) + uint32_t flags; + /* XIVE internal tables */ XiveIVE *ivt; uint8_t *sbe; --=20 2.13.6