From nobody Tue Feb 10 16:22:27 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510833707110866.7675536234218; Thu, 16 Nov 2017 04:01:47 -0800 (PST) Received: from localhost ([::1]:40281 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eFIrU-00039U-Pc for importer@patchew.org; Thu, 16 Nov 2017 07:01:40 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33820) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eFIpW-0001i7-VB for qemu-devel@nongnu.org; Thu, 16 Nov 2017 06:59:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eFIpR-0008W1-6L for qemu-devel@nongnu.org; Thu, 16 Nov 2017 06:59:39 -0500 Received: from mx1.redhat.com ([209.132.183.28]:48224) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eFIpQ-0008V3-Uq for qemu-devel@nongnu.org; Thu, 16 Nov 2017 06:59:33 -0500 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 071C04A6EA for ; Thu, 16 Nov 2017 11:59:32 +0000 (UTC) Received: from donizetti.redhat.com (ovpn-117-65.ams2.redhat.com [10.36.117.65]) by smtp.corp.redhat.com (Postfix) with ESMTP id B1EFC60F87; Thu, 16 Nov 2017 11:59:30 +0000 (UTC) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Thu, 16 Nov 2017 12:59:17 +0100 Message-Id: <20171116115926.16627-3-pbonzini@redhat.com> In-Reply-To: <20171116115926.16627-1-pbonzini@redhat.com> References: <20171116115926.16627-1-pbonzini@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Thu, 16 Nov 2017 11:59:32 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 02/11] ioapic/tracing: Remove last DPRINTFs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Dr. David Alan Gilbert" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Dr. David Alan Gilbert" Remove the last few DPRINTFs from hw/intc/ioapic.c and turn them into tracing. In one case it's a new trace, in the others it's just adding a parameter to the existing traces. Signed-off-by: Dr. David Alan Gilbert Message-Id: <20171102180310.24760-1-dgilbert@redhat.com> Reviewed-by: Peter Xu Reviewed-by: Stefan Hajnoczi Signed-off-by: Paolo Bonzini --- hw/intc/ioapic.c | 17 +++-------------- hw/intc/trace-events | 5 +++-- 2 files changed, 6 insertions(+), 16 deletions(-) diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index 37c4386ae3..36139a4db6 100644 --- a/hw/intc/ioapic.c +++ b/hw/intc/ioapic.c @@ -35,15 +35,6 @@ #include "hw/i386/x86-iommu.h" #include "trace.h" =20 -//#define DEBUG_IOAPIC - -#ifdef DEBUG_IOAPIC -#define DPRINTF(fmt, ...) \ - do { printf("ioapic: " fmt , ## __VA_ARGS__); } while (0) -#else -#define DPRINTF(fmt, ...) -#endif - #define APIC_DELIVERY_MODE_SHIFT 8 #define APIC_POLARITY_SHIFT 14 #define APIC_TRIG_MODE_SHIFT 15 @@ -157,7 +148,7 @@ static void ioapic_set_irq(void *opaque, int vector, in= t level) * to GSI 2. GSI maps to ioapic 1-1. This is not * the cleanest way of doing it but it should work. */ =20 - DPRINTF("%s: %s vec %x\n", __func__, level ? "raise" : "lower", vector= ); + trace_ioapic_set_irq(vector, level); if (vector =3D=3D 0) { vector =3D 2; } @@ -290,11 +281,10 @@ ioapic_mem_read(void *opaque, hwaddr addr, unsigned i= nt size) } } } - DPRINTF("read: %08x =3D %08x\n", s->ioregsel, val); break; } =20 - trace_ioapic_mem_read(addr, size, val); + trace_ioapic_mem_read(addr, s->ioregsel, size, val); =20 return val; } @@ -335,7 +325,7 @@ ioapic_mem_write(void *opaque, hwaddr addr, uint64_t va= l, int index; =20 addr &=3D 0xff; - trace_ioapic_mem_write(addr, size, val); + trace_ioapic_mem_write(addr, s->ioregsel, size, val); =20 switch (addr) { case IOAPIC_IOREGSEL: @@ -345,7 +335,6 @@ ioapic_mem_write(void *opaque, hwaddr addr, uint64_t va= l, if (size !=3D 4) { break; } - DPRINTF("write: %08x =3D %08" PRIx64 "\n", s->ioregsel, val); switch (s->ioregsel) { case IOAPIC_REG_ID: s->id =3D (val >> IOAPIC_ID_SHIFT) & IOAPIC_ID_MASK; diff --git a/hw/intc/trace-events b/hw/intc/trace-events index b86f242b0f..b298fac7c6 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -18,8 +18,9 @@ apic_mem_writel(uint64_t addr, uint32_t val) "0x%"PRIx64"= =3D 0x%08x" ioapic_set_remote_irr(int n) "set remote irr for pin %d" ioapic_clear_remote_irr(int n, int vector) "clear remote irr for pin %d ve= ctor %d" ioapic_eoi_broadcast(int vector) "EOI broadcast for vector %d" -ioapic_mem_read(uint8_t addr, uint8_t size, uint32_t val) "ioapic mem read= addr 0x%"PRIx8" size 0x%"PRIx8" retval 0x%"PRIx32 -ioapic_mem_write(uint8_t addr, uint8_t size, uint32_t val) "ioapic mem wri= te addr 0x%"PRIx8" size 0x%"PRIx8" val 0x%"PRIx32 +ioapic_mem_read(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) = "ioapic mem read addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" retval = 0x%"PRIx32 +ioapic_mem_write(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val)= "ioapic mem write addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" val 0= x%"PRIx32 +ioapic_set_irq(int vector, int level) "vector: %d level: %d" =20 # hw/intc/slavio_intctl.c slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read c= pu %d reg 0x%"PRIx64" =3D 0x%x" --=20 2.14.3