From nobody Mon Apr 29 02:08:21 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510554500907460.26739019138404; Sun, 12 Nov 2017 22:28:20 -0800 (PST) Received: from localhost ([::1]:52834 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eE8E6-0003f0-Kd for importer@patchew.org; Mon, 13 Nov 2017 01:28:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34248) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eE8DB-0003EG-3S for qemu-devel@nongnu.org; Mon, 13 Nov 2017 01:27:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eE8DA-0006BL-0S for qemu-devel@nongnu.org; Mon, 13 Nov 2017 01:27:13 -0500 Received: from mx1.redhat.com ([209.132.183.28]:52326) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eE8D5-00068w-F1; Mon, 13 Nov 2017 01:27:07 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 577E8C02C005; Mon, 13 Nov 2017 06:27:05 +0000 (UTC) Received: from localhost.localdomain (unknown [10.65.150.186]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 388535C301; Mon, 13 Nov 2017 06:27:01 +0000 (UTC) From: P J P To: Qemu Developers Date: Mon, 13 Nov 2017 11:56:58 +0530 Message-Id: <20171113062658.9697-1-ppandit@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Mon, 13 Nov 2017 06:27:05 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2] highbank: validate register offset before access X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Prasad J Pandit , Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Shawn Guo , Moguofang Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Prasad J Pandit An 'offset' parameter sent to highbank register r/w functions could be greater than number(NUM_REGS=3D0x200) of hb registers, leading to an OOB access issue. Add check to avoid it. Reported-by: Moguofang (Dennis mo) Signed-off-by: Prasad J Pandit --- hw/arm/highbank.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) Update: use HWADDR_PRIx to print offset -> https://lists.gnu.org/archive/html/qemu-devel/2017-11/msg02116.html diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 354c6b25a8..287392bbdc 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -34,6 +34,7 @@ #include "hw/ide/ahci.h" #include "hw/cpu/a9mpcore.h" #include "hw/cpu/a15mpcore.h" +#include "qemu/log.h" =20 #define SMP_BOOT_ADDR 0x100 #define SMP_BOOT_REG 0x40 @@ -117,14 +118,26 @@ static void hb_regs_write(void *opaque, hwaddr offset, } } =20 - regs[offset/4] =3D value; + if (offset / 4 >=3D NUM_REGS) { + qemu_log_mask(LOG_GUEST_ERROR, + "highbank: bad write offset 0x%" HWADDR_PRIx "\n", offse= t); + return; + } + regs[offset / 4] =3D value; } =20 static uint64_t hb_regs_read(void *opaque, hwaddr offset, unsigned size) { + uint32_t value; uint32_t *regs =3D opaque; - uint32_t value =3D regs[offset/4]; + + if (offset / 4 >=3D NUM_REGS) { + qemu_log_mask(LOG_GUEST_ERROR, + "highbank: bad read offset 0x%" HWADDR_PRIx "\n", offset= ); + return 0; + } + value =3D regs[offset / 4]; =20 if ((offset =3D=3D 0x100) || (offset =3D=3D 0x108) || (offset =3D=3D 0= x10C)) { value |=3D 0x30000000; --=20 2.13.6