From nobody Mon Feb 9 13:39:26 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510327792671702.8771452053118; Fri, 10 Nov 2017 07:29:52 -0800 (PST) Received: from localhost ([::1]:42258 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDBFa-0006Qt-Qa for importer@patchew.org; Fri, 10 Nov 2017 10:29:46 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47913) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDB7m-0008GK-CQ for qemu-devel@nongnu.org; Fri, 10 Nov 2017 10:21:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eDB7i-00073p-9N for qemu-devel@nongnu.org; Fri, 10 Nov 2017 10:21:42 -0500 Received: from 4.mo68.mail-out.ovh.net ([46.105.59.63]:53669) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eDB7i-000724-0D for qemu-devel@nongnu.org; Fri, 10 Nov 2017 10:21:38 -0500 Received: from player737.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo68.mail-out.ovh.net (Postfix) with ESMTP id C6D679C0CA for ; Fri, 10 Nov 2017 16:21:36 +0100 (CET) Received: from zorba.kaod.org.com (deibp9eh1--blueice1n7.emea.ibm.com [195.212.29.161]) (Authenticated sender: clg@kaod.org) by player737.ha.ovh.net (Postfix) with ESMTPSA id 9BA92E008C; Fri, 10 Nov 2017 16:21:29 +0100 (CET) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson , Greg Kurz , Benjamin Herrenschmidt Date: Fri, 10 Nov 2017 15:20:15 +0000 Message-Id: <20171110152017.24324-10-clg@kaod.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171110152017.24324-1-clg@kaod.org> References: <20171110152017.24324-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 14123288431717288787 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedttddrieefgdejgecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.59.63 Subject: [Qemu-devel] [PATCH for-2.12 v3 09/11] spapr: split the IRQ number space for LSI interrupts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The type of an interrupt, MSI or LSI, is stored under the flag attribute of the ICSIRQState array. To reduce the use of this array and consequently of the ICSState object (This is needed to introduce the new XIVE model), we choose to split the IRQ number space of the machine in two: first the LSIs and then the MSIs. This also has the benefit to keep the LSI IRQ numbers in a well known range which will be useful for PHB hotplug. This change only applies to the latest pseries machines. Older machines still use the ICSIRQState array to define the IRQ type. Signed-off-by: C=C3=A9dric Le Goater --- Changes since v2 : - introduced a second set of XICSFabric IRQ operations for older pseries machines hw/intc/xics_spapr.c | 6 +++--- hw/ppc/spapr.c | 33 +++++++++++++++++++++++++++++---- include/hw/ppc/xics.h | 2 +- 3 files changed, 33 insertions(+), 8 deletions(-) diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index de9e65d35247..b8e91aaf52bd 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -260,7 +260,7 @@ int spapr_ics_alloc(ICSState *ics, int irq_hint, bool l= si, Error **errp) } irq =3D irq_hint; } else { - irq =3D xic->irq_alloc_block(ics->xics, 1, 1); + irq =3D xic->irq_alloc_block(ics->xics, 1, 1, lsi); if (irq < 0) { error_setg(errp, "can't allocate IRQ: no IRQ left"); return -1; @@ -297,9 +297,9 @@ int spapr_ics_alloc_block(ICSState *ics, int num, bool = lsi, if (align) { assert((num =3D=3D 1) || (num =3D=3D 2) || (num =3D=3D 4) || (num =3D=3D 8) || (num =3D=3D 16) || (num =3D=3D 32)); - first =3D xic->irq_alloc_block(ics->xics, num, num); + first =3D xic->irq_alloc_block(ics->xics, num, num, lsi); } else { - first =3D xic->irq_alloc_block(ics->xics, num, 1); + first =3D xic->irq_alloc_block(ics->xics, num, 1, lsi); } if (first < 0) { error_setg(errp, "can't find a free %d-IRQ block", num); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index ce314fcf38db..f14eae6196cd 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3596,7 +3596,8 @@ static bool spapr_irq_test_2_11(XICSFabric *xi, int i= rq) return !ICS_IRQ_FREE(ics, srcno); } =20 -static int spapr_irq_alloc_block_2_11(XICSFabric *xi, int count, int align) +static int spapr_irq_alloc_block_2_11(XICSFabric *xi, int count, int align, + bool lsi) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(xi); ICSState *ics =3D spapr->ics; @@ -3628,7 +3629,7 @@ static void spapr_irq_free_block_2_11(XICSFabric *xi,= int irq, int num) } } =20 -static bool spapr_irq_is_lsi(XICSFabric *xi, int irq) +static bool spapr_irq_is_lsi_2_11(XICSFabric *xi, int irq) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(xi); int srcno =3D irq - spapr->ics->offset; @@ -3644,10 +3645,21 @@ static bool spapr_irq_test(XICSFabric *xi, int irq) return test_bit(srcno, spapr->irq_map); } =20 -static int spapr_irq_alloc_block(XICSFabric *xi, int count, int align) + +/* + * Let's provision 4 LSIs per PHBs + */ +#define SPAPR_MAX_LSI (SPAPR_MAX_PHBS * 4) + +/* + * Split the IRQ number space of the machine in two: first the LSIs + * and then the MSIs. This allows us to keep the LSI IRQ numbers in a + * well known range which is useful for PHB hotplug. + */ +static int spapr_irq_alloc_block(XICSFabric *xi, int count, int align, boo= l lsi) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(xi); - int start =3D 0; + int start =3D lsi ? 0 : SPAPR_MAX_LSI; int srcno; =20 /* @@ -3664,6 +3676,10 @@ static int spapr_irq_alloc_block(XICSFabric *xi, int= count, int align) return -1; } =20 + if (lsi && srcno >=3D SPAPR_MAX_LSI) { + return -1; + } + bitmap_set(spapr->irq_map, srcno, count); return srcno + spapr->irq_base; } @@ -3676,6 +3692,14 @@ static void spapr_irq_free_block(XICSFabric *xi, int= irq, int num) bitmap_clear(spapr->irq_map, srcno, num); } =20 +static bool spapr_irq_is_lsi(XICSFabric *xi, int irq) +{ + sPAPRMachineState *spapr =3D SPAPR_MACHINE(xi); + int srcno =3D irq - spapr->irq_base; + + return (srcno >=3D 0) && (srcno < SPAPR_MAX_LSI); +} + static void spapr_pic_print_info(InterruptStatsProvider *obj, Monitor *mon) { @@ -3860,6 +3884,7 @@ static void spapr_machine_2_11_class_options(MachineC= lass *mc) xic->irq_test =3D spapr_irq_test_2_11; xic->irq_alloc_block =3D spapr_irq_alloc_block_2_11; xic->irq_free_block =3D spapr_irq_free_block_2_11; + xic->irq_is_lsi =3D spapr_irq_is_lsi_2_11; } =20 DEFINE_SPAPR_MACHINE(2_11, "2.11", false); diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 478f8e510179..292b929e88eb 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -177,7 +177,7 @@ typedef struct XICSFabricClass { ICPState *(*icp_get)(XICSFabric *xi, int server); /* IRQ allocator helpers */ bool (*irq_test)(XICSFabric *xi, int irq); - int (*irq_alloc_block)(XICSFabric *xi, int count, int align); + int (*irq_alloc_block)(XICSFabric *xi, int count, int align, bool lsi); void (*irq_free_block)(XICSFabric *xi, int irq, int num); bool (*irq_is_lsi)(XICSFabric *xi, int irq); } XICSFabricClass; --=20 2.13.6