From nobody Sun Nov 2 11:51:55 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509115234843482.6875402071555; Fri, 27 Oct 2017 07:40:34 -0700 (PDT) Received: from localhost ([::1]:57622 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e85o5-0008Ah-Vf for importer@patchew.org; Fri, 27 Oct 2017 10:40:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34292) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e85Wv-00062O-Ud for qemu-devel@nongnu.org; Fri, 27 Oct 2017 10:22:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e85Wu-00012k-T6 for qemu-devel@nongnu.org; Fri, 27 Oct 2017 10:22:37 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49040) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e85Wu-00011p-KY for qemu-devel@nongnu.org; Fri, 27 Oct 2017 10:22:36 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B7B99883B8; Fri, 27 Oct 2017 14:22:35 +0000 (UTC) Received: from localhost (ovpn-116-67.gru2.redhat.com [10.97.116.67]) by smtp.corp.redhat.com (Postfix) with ESMTP id D5E5D60600; Fri, 27 Oct 2017 14:22:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com B7B99883B8 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=ehabkost@redhat.com From: Eduardo Habkost To: Peter Maydell Date: Fri, 27 Oct 2017 16:20:46 +0200 Message-Id: <20171027142107.15542-19-ehabkost@redhat.com> In-Reply-To: <20171027142107.15542-1-ehabkost@redhat.com> References: <20171027142107.15542-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 27 Oct 2017 14:22:35 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL v2 18/39] sh4: cleanup cpu type name composition X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov introduce SUPERH_CPU_TYPE_NAME macro and use it to construct cpu type names. While at it move cpu type_infos into one array and register it directly with type_init_from_array() instead of custom superh_cpu_register_types() Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <1507211474-188400-22-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost --- target/sh4/cpu-qom.h | 6 ++--- target/sh4/cpu.h | 3 +++ target/sh4/cpu.c | 63 +++++++++++++++++++++---------------------------= ---- 3 files changed, 31 insertions(+), 41 deletions(-) diff --git a/target/sh4/cpu-qom.h b/target/sh4/cpu-qom.h index 01abb206e4..17deeb661b 100644 --- a/target/sh4/cpu-qom.h +++ b/target/sh4/cpu-qom.h @@ -24,9 +24,9 @@ =20 #define TYPE_SUPERH_CPU "superh-cpu" =20 -#define TYPE_SH7750R_CPU "sh7750r-" TYPE_SUPERH_CPU -#define TYPE_SH7751R_CPU "sh7751r-" TYPE_SUPERH_CPU -#define TYPE_SH7785_CPU "sh7785-" TYPE_SUPERH_CPU +#define TYPE_SH7750R_CPU SUPERH_CPU_TYPE_NAME("sh7750r") +#define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r") +#define TYPE_SH7785_CPU SUPERH_CPU_TYPE_NAME("sh7785") =20 #define SUPERH_CPU_CLASS(klass) \ OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 123f34783a..960b46870d 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -274,6 +274,9 @@ void cpu_load_tlb(CPUSH4State * env); =20 #define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model) =20 +#define SUPERH_CPU_TYPE_SUFFIX "-" TYPE_SUPERH_CPU +#define SUPERH_CPU_TYPE_NAME(model) model SUPERH_CPU_TYPE_SUFFIX + #define cpu_signal_handler cpu_sh4_signal_handler #define cpu_list sh4_cpu_list =20 diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 89abce2472..ec6db61bdf 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -172,13 +172,6 @@ static void sh7750r_class_init(ObjectClass *oc, void *= data) scc->cvr =3D 0x00110000; } =20 -static const TypeInfo sh7750r_type_info =3D { - .name =3D TYPE_SH7750R_CPU, - .parent =3D TYPE_SUPERH_CPU, - .class_init =3D sh7750r_class_init, - .instance_init =3D sh7750r_cpu_initfn, -}; - static void sh7751r_cpu_initfn(Object *obj) { SuperHCPU *cpu =3D SUPERH_CPU(obj); @@ -198,13 +191,6 @@ static void sh7751r_class_init(ObjectClass *oc, void *= data) scc->cvr =3D 0x00110000; /* Neutered caches, should be 0x20480000 */ } =20 -static const TypeInfo sh7751r_type_info =3D { - .name =3D TYPE_SH7751R_CPU, - .parent =3D TYPE_SUPERH_CPU, - .class_init =3D sh7751r_class_init, - .instance_init =3D sh7751r_cpu_initfn, -}; - static void sh7785_cpu_initfn(Object *obj) { SuperHCPU *cpu =3D SUPERH_CPU(obj); @@ -224,13 +210,6 @@ static void sh7785_class_init(ObjectClass *oc, void *d= ata) scc->cvr =3D 0x71440211; } =20 -static const TypeInfo sh7785_type_info =3D { - .name =3D TYPE_SH7785_CPU, - .parent =3D TYPE_SUPERH_CPU, - .class_init =3D sh7785_class_init, - .instance_init =3D sh7785_cpu_initfn, -}; - static void superh_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); @@ -300,22 +279,30 @@ static void superh_cpu_class_init(ObjectClass *oc, vo= id *data) dc->vmsd =3D &vmstate_sh_cpu; } =20 -static const TypeInfo superh_cpu_type_info =3D { - .name =3D TYPE_SUPERH_CPU, - .parent =3D TYPE_CPU, - .instance_size =3D sizeof(SuperHCPU), - .instance_init =3D superh_cpu_initfn, - .abstract =3D true, - .class_size =3D sizeof(SuperHCPUClass), - .class_init =3D superh_cpu_class_init, -}; +#define DEFINE_SUPERH_CPU_TYPE(type_name, cinit, initfn) \ + { \ + .name =3D type_name, \ + .parent =3D TYPE_SUPERH_CPU, \ + .class_init =3D cinit, \ + .instance_init =3D initfn, \ + } +static const TypeInfo superh_cpu_type_infos[] =3D { + { + .name =3D TYPE_SUPERH_CPU, + .parent =3D TYPE_CPU, + .instance_size =3D sizeof(SuperHCPU), + .instance_init =3D superh_cpu_initfn, + .abstract =3D true, + .class_size =3D sizeof(SuperHCPUClass), + .class_init =3D superh_cpu_class_init, + }, + DEFINE_SUPERH_CPU_TYPE(TYPE_SH7750R_CPU, sh7750r_class_init, + sh7750r_cpu_initfn), + DEFINE_SUPERH_CPU_TYPE(TYPE_SH7751R_CPU, sh7751r_class_init, + sh7751r_cpu_initfn), + DEFINE_SUPERH_CPU_TYPE(TYPE_SH7785_CPU, sh7785_class_init, + sh7785_cpu_initfn), =20 -static void superh_cpu_register_types(void) -{ - type_register_static(&superh_cpu_type_info); - type_register_static(&sh7750r_type_info); - type_register_static(&sh7751r_type_info); - type_register_static(&sh7785_type_info); -} +}; =20 -type_init(superh_cpu_register_types) +DEFINE_TYPES(superh_cpu_type_infos) --=20 2.13.6