From nobody Sun Nov 2 11:47:16 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509027405648865.4407010005186; Thu, 26 Oct 2017 07:16:45 -0700 (PDT) Received: from localhost ([::1]:53173 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7ixP-0005Lm-Kf for importer@patchew.org; Thu, 26 Oct 2017 10:16:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43824) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7ilx-0003cQ-Do for qemu-devel@nongnu.org; Thu, 26 Oct 2017 10:04:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e7ilr-0006sa-Bj for qemu-devel@nongnu.org; Thu, 26 Oct 2017 10:04:37 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56932) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e7ilr-0006ru-2v for qemu-devel@nongnu.org; Thu, 26 Oct 2017 10:04:31 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E548F7D0E9; Thu, 26 Oct 2017 14:04:29 +0000 (UTC) Received: from localhost (ovpn-116-4.gru2.redhat.com [10.97.116.4]) by smtp.corp.redhat.com (Postfix) with ESMTP id EA63E5C881; Thu, 26 Oct 2017 14:04:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com E548F7D0E9 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=ehabkost@redhat.com From: Eduardo Habkost To: Peter Maydell Date: Thu, 26 Oct 2017 16:03:30 +0200 Message-Id: <20171026140404.21948-6-ehabkost@redhat.com> In-Reply-To: <20171026140404.21948-1-ehabkost@redhat.com> References: <20171026140404.21948-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 26 Oct 2017 14:04:30 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 05/39] lm32: cleanup cpu type name composition X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov introduce LM32_CPU_TYPE_NAME macro and consistently use it to construct cpu type names. While at it replace dynamic cpu type name composition with static data. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Michael Walle Message-Id: <1507211474-188400-9-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost --- target/lm32/cpu.h | 3 +++ target/lm32/cpu.c | 74 +++++++++++++++++----------------------------------= ---- 2 files changed, 25 insertions(+), 52 deletions(-) diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index de265b50d1..2279594f40 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -257,6 +257,9 @@ bool lm32_cpu_do_semihosting(CPUState *cs); =20 #define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model) =20 +#define LM32_CPU_TYPE_SUFFIX "-" TYPE_LM32_CPU +#define LM32_CPU_TYPE_NAME(model) model LM32_CPU_TYPE_SUFFIX + #define cpu_list lm32_cpu_list #define cpu_signal_handler cpu_lm32_signal_handler =20 diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c index 7f3a292f2b..6f5c14767b 100644 --- a/target/lm32/cpu.c +++ b/target/lm32/cpu.c @@ -51,7 +51,7 @@ static void lm32_cpu_list_entry(gpointer data, gpointer u= ser_data) const char *typename =3D object_class_get_name(oc); char *name; =20 - name =3D g_strndup(typename, strlen(typename) - strlen("-" TYPE_LM32_C= PU)); + name =3D g_strndup(typename, strlen(typename) - strlen(LM32_CPU_TYPE_S= UFFIX)); (*s->cpu_fprintf)(s->file, " %s\n", name); g_free(name); } @@ -215,32 +215,12 @@ static void lm32_full_cpu_initfn(Object *obj) | LM32_FEATURE_CYCLE_COUNT; } =20 -typedef struct LM32CPUInfo { - const char *name; - void (*initfn)(Object *obj); -} LM32CPUInfo; - -static const LM32CPUInfo lm32_cpus[] =3D { - { - .name =3D "lm32-basic", - .initfn =3D lm32_basic_cpu_initfn, - }, - { - .name =3D "lm32-standard", - .initfn =3D lm32_standard_cpu_initfn, - }, - { - .name =3D "lm32-full", - .initfn =3D lm32_full_cpu_initfn, - }, -}; - static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; char *typename; =20 - typename =3D g_strdup_printf("%s-" TYPE_LM32_CPU, cpu_model); + typename =3D g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model); oc =3D object_class_by_name(typename); g_free(typename); if (oc !=3D NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) || @@ -283,36 +263,26 @@ static void lm32_cpu_class_init(ObjectClass *oc, void= *data) cc->tcg_initialize =3D lm32_translate_init; } =20 -static void lm32_register_cpu_type(const LM32CPUInfo *info) -{ - TypeInfo type_info =3D { - .parent =3D TYPE_LM32_CPU, - .instance_init =3D info->initfn, - }; - - type_info.name =3D g_strdup_printf("%s-" TYPE_LM32_CPU, info->name); - type_register(&type_info); - g_free((void *)type_info.name); -} +#define DEFINE_LM32_CPU_TYPE(cpu_model, initfn) \ + { \ + .parent =3D TYPE_LM32_CPU, \ + .name =3D LM32_CPU_TYPE_NAME(cpu_model), \ + .instance_init =3D initfn, \ + } =20 -static const TypeInfo lm32_cpu_type_info =3D { - .name =3D TYPE_LM32_CPU, - .parent =3D TYPE_CPU, - .instance_size =3D sizeof(LM32CPU), - .instance_init =3D lm32_cpu_initfn, - .abstract =3D true, - .class_size =3D sizeof(LM32CPUClass), - .class_init =3D lm32_cpu_class_init, +static const TypeInfo lm32_cpus_type_infos[] =3D { + { /* base class should be registered first */ + .name =3D TYPE_LM32_CPU, + .parent =3D TYPE_CPU, + .instance_size =3D sizeof(LM32CPU), + .instance_init =3D lm32_cpu_initfn, + .abstract =3D true, + .class_size =3D sizeof(LM32CPUClass), + .class_init =3D lm32_cpu_class_init, + }, + DEFINE_LM32_CPU_TYPE("lm32-basic", lm32_basic_cpu_initfn), + DEFINE_LM32_CPU_TYPE("lm32-standard", lm32_standard_cpu_initfn), + DEFINE_LM32_CPU_TYPE("lm32-full", lm32_full_cpu_initfn), }; =20 -static void lm32_cpu_register_types(void) -{ - int i; - - type_register_static(&lm32_cpu_type_info); - for (i =3D 0; i < ARRAY_SIZE(lm32_cpus); i++) { - lm32_register_cpu_type(&lm32_cpus[i]); - } -} - -type_init(lm32_cpu_register_types) +DEFINE_TYPES(lm32_cpus_type_infos) --=20 2.13.6