From nobody Sun Nov 2 11:47:15 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509027898483532.3825844978018; Thu, 26 Oct 2017 07:24:58 -0700 (PDT) Received: from localhost ([::1]:53207 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7j5I-0003th-LG for importer@patchew.org; Thu, 26 Oct 2017 10:24:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44137) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7imh-0004GU-0I for qemu-devel@nongnu.org; Thu, 26 Oct 2017 10:05:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e7ima-0007n7-UP for qemu-devel@nongnu.org; Thu, 26 Oct 2017 10:05:22 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59622) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e7ima-0007lF-Mq for qemu-devel@nongnu.org; Thu, 26 Oct 2017 10:05:16 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 842128210D; Thu, 26 Oct 2017 14:05:15 +0000 (UTC) Received: from localhost (ovpn-116-4.gru2.redhat.com [10.97.116.4]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4EC9F5C881; Thu, 26 Oct 2017 14:05:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 842128210D Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=ehabkost@redhat.com From: Eduardo Habkost To: Peter Maydell Date: Thu, 26 Oct 2017 16:03:39 +0200 Message-Id: <20171026140404.21948-15-ehabkost@redhat.com> In-Reply-To: <20171026140404.21948-1-ehabkost@redhat.com> References: <20171026140404.21948-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 26 Oct 2017 14:05:15 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 14/39] openrisc: cleanup cpu type name composition X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov use new OPENRISC_CPU_TYPE_NAME to compose CPU type name and get rid of intermediate OpenRISCCPUInfo/openrisc_cpu_register_types() which is replaced by static TypeInfo array. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <1507211474-188400-18-git-send-email-imammedo@redhat.com> Acked-by: Stafford Horne Signed-off-by: Eduardo Habkost --- target/openrisc/cpu.h | 3 +++ target/openrisc/cpu.c | 69 +++++++++++++++++------------------------------= ---- 2 files changed, 26 insertions(+), 46 deletions(-) diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 892dc4210f..cc22dc8871 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -392,6 +392,9 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu, =20 #define cpu_init(cpu_model) cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model) =20 +#define OPENRISC_CPU_TYPE_SUFFIX "-" TYPE_OPENRISC_CPU +#define OPENRISC_CPU_TYPE_NAME(model) model OPENRISC_CPU_TYPE_SUFFIX + #include "exec/cpu-all.h" =20 #define TB_FLAGS_DFLAG 1 diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index a8db869e50..e0394b8b06 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -101,7 +101,7 @@ static ObjectClass *openrisc_cpu_class_by_name(const ch= ar *cpu_model) ObjectClass *oc; char *typename; =20 - typename =3D g_strdup_printf("%s-" TYPE_OPENRISC_CPU, cpu_model); + typename =3D g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model); oc =3D object_class_by_name(typename); g_free(typename); if (oc !=3D NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU)= || @@ -126,16 +126,6 @@ static void openrisc_any_initfn(Object *obj) cpu->env.cpucfgr =3D CPUCFGR_NSGF | CPUCFGR_OB32S | CPUCFGR_EVBARP; } =20 -typedef struct OpenRISCCPUInfo { - const char *name; - void (*initfn)(Object *obj); -} OpenRISCCPUInfo; - -static const OpenRISCCPUInfo openrisc_cpus[] =3D { - { .name =3D "or1200", .initfn =3D or1200_initfn }, - { .name =3D "any", .initfn =3D openrisc_any_initfn }, -}; - static void openrisc_cpu_class_init(ObjectClass *oc, void *data) { OpenRISCCPUClass *occ =3D OPENRISC_CPU_CLASS(oc); @@ -166,40 +156,6 @@ static void openrisc_cpu_class_init(ObjectClass *oc, v= oid *data) cc->tcg_initialize =3D openrisc_translate_init; } =20 -static void cpu_register(const OpenRISCCPUInfo *info) -{ - TypeInfo type_info =3D { - .parent =3D TYPE_OPENRISC_CPU, - .instance_size =3D sizeof(OpenRISCCPU), - .instance_init =3D info->initfn, - .class_size =3D sizeof(OpenRISCCPUClass), - }; - - type_info.name =3D g_strdup_printf("%s-" TYPE_OPENRISC_CPU, info->name= ); - type_register(&type_info); - g_free((void *)type_info.name); -} - -static const TypeInfo openrisc_cpu_type_info =3D { - .name =3D TYPE_OPENRISC_CPU, - .parent =3D TYPE_CPU, - .instance_size =3D sizeof(OpenRISCCPU), - .instance_init =3D openrisc_cpu_initfn, - .abstract =3D true, - .class_size =3D sizeof(OpenRISCCPUClass), - .class_init =3D openrisc_cpu_class_init, -}; - -static void openrisc_cpu_register_types(void) -{ - int i; - - type_register_static(&openrisc_cpu_type_info); - for (i =3D 0; i < ARRAY_SIZE(openrisc_cpus); i++) { - cpu_register(&openrisc_cpus[i]); - } -} - /* Sort alphabetically by type name, except for "any". */ static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b) { @@ -248,4 +204,25 @@ void cpu_openrisc_list(FILE *f, fprintf_function cpu_f= printf) g_slist_free(list); } =20 -type_init(openrisc_cpu_register_types) +#define DEFINE_OPENRISC_CPU_TYPE(cpu_model, initfn) \ + { \ + .parent =3D TYPE_OPENRISC_CPU, \ + .instance_init =3D initfn, \ + .name =3D OPENRISC_CPU_TYPE_NAME(cpu_model), \ + } + +static const TypeInfo openrisc_cpus_type_infos[] =3D { + { /* base class should be registered first */ + .name =3D TYPE_OPENRISC_CPU, + .parent =3D TYPE_CPU, + .instance_size =3D sizeof(OpenRISCCPU), + .instance_init =3D openrisc_cpu_initfn, + .abstract =3D true, + .class_size =3D sizeof(OpenRISCCPUClass), + .class_init =3D openrisc_cpu_class_init, + }, + DEFINE_OPENRISC_CPU_TYPE("or1200", or1200_initfn), + DEFINE_OPENRISC_CPU_TYPE("any", openrisc_any_initfn), +}; + +DEFINE_TYPES(openrisc_cpus_type_infos) --=20 2.13.6