From nobody Sun Nov 2 03:11:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509015109538637.024852879496; Thu, 26 Oct 2017 03:51:49 -0700 (PDT) Received: from localhost ([::1]:52048 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7flE-0000An-Ag for importer@patchew.org; Thu, 26 Oct 2017 06:51:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56431) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7fjs-0007oY-BL for qemu-devel@nongnu.org; Thu, 26 Oct 2017 06:50:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e7fjp-0002jM-Ud for qemu-devel@nongnu.org; Thu, 26 Oct 2017 06:50:16 -0400 Received: from mail-wr0-x241.google.com ([2a00:1450:400c:c0c::241]:56663) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e7fjp-0002iZ-Ku for qemu-devel@nongnu.org; Thu, 26 Oct 2017 06:50:13 -0400 Received: by mail-wr0-x241.google.com with SMTP id r79so2700250wrb.13 for ; Thu, 26 Oct 2017 03:50:13 -0700 (PDT) Received: from cloudburst.twiddle.net ([62.168.35.124]) by smtp.gmail.com with ESMTPSA id p128sm924484wmb.1.2017.10.26.03.50.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Oct 2017 03:50:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IsIfMjqihBxBB/wxTQnqMo3Bnm37m0AYcO1/doCyeaI=; b=O5hcE1SnjkeEH26NOp0skQeE93Aw+6ingaenuv1s3AwrSA96MN9nktEVpw8nJdNO1K ZpYr4lV+FAa5aZBmVF0zr/26W2iWSSQpodn0manyi24lbWZFx0JgUWGympJC9uupY/tt WGKZWCAKD+u0mY6VL5ocRqbjLgBD+x7bSJPzg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IsIfMjqihBxBB/wxTQnqMo3Bnm37m0AYcO1/doCyeaI=; b=KLEBYakXdRp8GxZqraHiO71uvodj2HlEaMuQk0LIW0o9uDny18ZRwwmlFKhgqifF7U VUfeZ2R65nGWXCE/Q0I0aR/OCpMuqfio/M/bE9YV/9k+tzpufh+mW3U7kwgKko2CDOqI wPgTWhXylw9dHCr0+WY1EkXa8EtyPdo1xP1Y5TMBCp3QcsmOtkZsPMO3wjCP9DqgABkY Av6/I97+seXwebfFJ0WrCPmNon2tA6O4+YSIk6pXiO9Ti9lcSM4qf7YAdjKMu6QtFMip sJmQNRs/31RRXDPnkY32PxgKQId52EeDlElamlkkYQ8JYItYNOgzFVGH+ELg30HIB6Mr YlqQ== X-Gm-Message-State: AMCzsaW83/hXQ1Rb8Q3Zxvd534xtvX5aZFaYsmtu82QB4s0NGBscoyqn m8DOlbBbXNeU9phrRiUTktPr7mAYFBo= X-Google-Smtp-Source: ABhQp+RkXV0OpSPAj+TDGCD/8NyF5AAJ3eJ5WfzoZvgVmhkj8MFAEo6vJbm8+eFHmziTsLsSSuHXtg== X-Received: by 10.223.179.20 with SMTP id j20mr5269767wrd.116.1509015012282; Thu, 26 Oct 2017 03:50:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 26 Oct 2017 12:50:04 +0200 Message-Id: <20171026105007.31777-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171026105007.31777-1-richard.henderson@linaro.org> References: <20171026105007.31777-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::241 Subject: [Qemu-devel] [PATCH v2 1/4] target/i386: Decode AMD XOP prefix X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, ehabkost@redhat.com, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Signed-off-by: Richard Henderson --- target/i386/translate.c | 46 ++++++++++++++++++++++++++++++++-------------- 1 file changed, 32 insertions(+), 14 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 7df9233ded..db88cc4764 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -4536,8 +4536,9 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) #endif case 0xc5: /* 2-byte VEX */ case 0xc4: /* 3-byte VEX */ + case 0x8f: /* 3-byte XOP */ /* VEX prefixes cannot be used except in 32-bit mode. - Otherwise the instruction is LES or LDS. */ + Otherwise the instruction is LES, LDS, or POP. */ if (s->code32 && !s->vm86) { static const int pp_prefix[4] =3D { 0, PREFIX_DATA, PREFIX_REPZ, PREFIX_REPNZ @@ -4546,7 +4547,13 @@ static target_ulong disas_insn(DisasContext *s, CPUS= tate *cpu) =20 if (!CODE64(s) && (vex2 & 0xc0) !=3D 0xc0) { /* 4.1.4.6: In 32-bit mode, bits [7:6] must be 11b, - otherwise the instruction is LES or LDS. */ + otherwise the instruction is LES, LDS, or POP. */ + break; + } + if (b =3D=3D 0x8f && (vex2 & 0x1f) < 8) { + /* If the value of the XOP.map_select field is less than 8, + the first two bytes of the three-byte XOP are interpret= ed + as a form of the POP instruction. */ break; } s->pc++; @@ -4572,18 +4579,25 @@ static target_ulong disas_insn(DisasContext *s, CPU= State *cpu) #endif vex3 =3D x86_ldub_code(env, s); rex_w =3D (vex3 >> 7) & 1; - switch (vex2 & 0x1f) { - case 0x01: /* Implied 0f leading opcode bytes. */ - b =3D x86_ldub_code(env, s) | 0x100; - break; - case 0x02: /* Implied 0f 38 leading opcode bytes. */ - b =3D 0x138; - break; - case 0x03: /* Implied 0f 3a leading opcode bytes. */ - b =3D 0x13a; - break; - default: /* Reserved for future use. */ - goto unknown_op; + if (b =3D=3D 0xc4) { + switch (vex2 & 0x1f) { + case 0x01: /* Implied 0f leading opcode bytes. */ + b =3D x86_ldub_code(env, s) | 0x100; + break; + case 0x02: /* Implied 0f 38 leading opcode bytes. */ + b =3D 0x138; + break; + case 0x03: /* Implied 0f 3a leading opcode bytes. */ + b =3D 0x13a; + break; + default: /* Reserved for future use. */ + goto unknown_op; + } + } else { + /* Unlike VEX, XOP.map_select does not overlap the + base instruction set. Prepend the map_select to + the next opcode byte. */ + b =3D x86_ldub_code(env, s) + (vex2 & 0x1f) * 0x100; } } s->vex_v =3D (~vex3 >> 3) & 0xf; @@ -8307,6 +8321,10 @@ static target_ulong disas_insn(DisasContext *s, CPUS= tate *cpu) case 0x1d0 ... 0x1fe: gen_sse(env, s, b, pc_start, rex_r); break; + + case 0x800 ... 0x8ff: /* XOP opcode map 8 */ + case 0x900 ... 0x9ff: /* XOP opcode map 9 */ + case 0xa00 ... 0xaff: /* XOP opcode map 10 */ default: goto unknown_op; } --=20 2.13.6 From nobody Sun Nov 2 03:11:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509015210419743.6861480710269; Thu, 26 Oct 2017 03:53:30 -0700 (PDT) Received: from localhost ([::1]:52053 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7fms-0001Pk-JI for importer@patchew.org; Thu, 26 Oct 2017 06:53:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56464) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7fjw-0007pQ-5d for qemu-devel@nongnu.org; Thu, 26 Oct 2017 06:50:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e7fjr-0002jt-HT for qemu-devel@nongnu.org; Thu, 26 Oct 2017 06:50:20 -0400 Received: from mail-wr0-x241.google.com ([2a00:1450:400c:c0c::241]:45840) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e7fjq-0002jT-P3 for qemu-devel@nongnu.org; Thu, 26 Oct 2017 06:50:15 -0400 Received: by mail-wr0-x241.google.com with SMTP id y9so2727216wrb.2 for ; Thu, 26 Oct 2017 03:50:14 -0700 (PDT) Received: from cloudburst.twiddle.net ([62.168.35.124]) by smtp.gmail.com with ESMTPSA id p128sm924484wmb.1.2017.10.26.03.50.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Oct 2017 03:50:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aDndBEMhwG/SFduKa/erh/ZVmsFq8MGHZOXJCpK3rGI=; b=gBeIOfD+o1dA9OnZHOZdOW4OrhRhMjeS7lWj8LX1aeXX3IeRLb6DI/v/kMyb6vRRI3 F5UqRd4xNjZfzPJsqP9Xs9ZcoDY3AGwXUZBg/dSrspgX6YIpnWc5bJNe/RneI+NlU5Js QmbqTYbI4PkTk5WEMUpWUp14CukzDljsI0kdM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aDndBEMhwG/SFduKa/erh/ZVmsFq8MGHZOXJCpK3rGI=; b=e5TpHXzsoIs4Tz381AXaUuETKWjgOklhG3GEYhioIiSAWpnIMtQh/XN4K/Kb1V2d8m Bsqbrk9CmfrbCm+LwfocWUasN+XCsm0anABCNTwrmlQrisZqHkXIXZAme0FRmaa6H+X5 t7lMTNXbct2I/pBeKzNwleVZc/ulwFFhQjB6tQaMBi5dbNqobjriiqNAeTZPWVa8FoVi R097GlBwpjwFFUbRtUaUWOuGx+semqMY9GZ/zqaSE3PUiblx5w4XFUU5xNBHOhFm5azk BprPhFEltVtx+qKQitIqIZDV8acu5kEFJ4PdqbopUD08qeqMrJsG6f++GszwSP6jCCP3 ILfw== X-Gm-Message-State: AMCzsaV8Q6CU+/uTiRv9zjJOoFVWIGaoLlo/JCdoHu7IkDDUG4cfIoo3 j9CU6YX6TxMBOjyS1jRCyleEvE7QeCw= X-Google-Smtp-Source: ABhQp+TsylRVwm18HwmV7pRaSkWOT3doH8iDJwdqBbzmuu+GQnJ8yaIL+tGX9L17fCcjGxGmRDbCcg== X-Received: by 10.223.185.77 with SMTP id b13mr5236585wrg.58.1509015013415; Thu, 26 Oct 2017 03:50:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 26 Oct 2017 12:50:05 +0200 Message-Id: <20171026105007.31777-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171026105007.31777-1-richard.henderson@linaro.org> References: <20171026105007.31777-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::241 Subject: [Qemu-devel] [PATCH v2 2/4] target/i386: Implement all TBM instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, ehabkost@redhat.com, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reported-by: Ricardo Ribalda Delgado Signed-off-by: Richard Henderson --- target/i386/cc_helper_template.h | 18 ++++++ target/i386/cpu.h | 7 ++- target/i386/cc_helper.c | 28 +++++++-- target/i386/cpu.c | 3 +- target/i386/translate.c | 123 +++++++++++++++++++++++++++++++++++= +++- 5 files changed, 170 insertions(+), 9 deletions(-) diff --git a/target/i386/cc_helper_template.h b/target/i386/cc_helper_templ= ate.h index 607311f195..6ce63b7ca9 100644 --- a/target/i386/cc_helper_template.h +++ b/target/i386/cc_helper_template.h @@ -235,6 +235,24 @@ static int glue(compute_c_bmilg, SUFFIX)(DATA_TYPE dst= , DATA_TYPE src1) return src1 =3D=3D 0; } =20 +static int glue(compute_all_tbmadd, SUFFIX)(DATA_TYPE dst, DATA_TYPE src1) +{ + int cf, pf, af, zf, sf, of; + + cf =3D (src1 =3D=3D (DATA_TYPE)-1); + pf =3D 0; /* undefined */ + af =3D 0; /* undefined */ + zf =3D (dst =3D=3D 0) * CC_Z; + sf =3D lshift(dst, 8 - DATA_BITS) & CC_S; + of =3D 0; + return cf | pf | af | zf | sf | of; +} + +static int glue(compute_c_tbmadd, SUFFIX)(DATA_TYPE dst, DATA_TYPE src1) +{ + return src1 =3D=3D (DATA_TYPE)-1; +} + #undef DATA_BITS #undef SIGN_MASK #undef DATA_TYPE diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b086b1528b..6c520a90fb 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -774,11 +774,16 @@ typedef enum { CC_OP_SARL, CC_OP_SARQ, =20 - CC_OP_BMILGB, /* Z,S via CC_DST, C =3D SRC=3D=3D0; O=3D0; P,A undefine= d */ + CC_OP_BMILGB, /* Z,S via DST, C =3D SRC=3D=3D0; O=3D0; P,A undefined */ CC_OP_BMILGW, CC_OP_BMILGL, CC_OP_BMILGQ, =20 + CC_OP_TBMADDB, /* Z,S via DST; C =3D SRC=3D=3D-1; O=3D0; P,A undefined= */ + CC_OP_TBMADDW, + CC_OP_TBMADDL, + CC_OP_TBMADDQ, + CC_OP_ADCX, /* CC_DST =3D C, CC_SRC =3D rest. */ CC_OP_ADOX, /* CC_DST =3D O, CC_SRC =3D rest. */ CC_OP_ADCOX, /* CC_DST =3D C, CC_SRC2 =3D O, CC_SRC =3D rest. */ diff --git a/target/i386/cc_helper.c b/target/i386/cc_helper.c index c9c90e10db..2f12c3b6cb 100644 --- a/target/i386/cc_helper.c +++ b/target/i386/cc_helper.c @@ -98,9 +98,6 @@ target_ulong helper_cc_compute_all(target_ulong dst, targ= et_ulong src1, target_ulong src2, int op) { switch (op) { - default: /* should never happen */ - return 0; - case CC_OP_EFLAGS: return src1; case CC_OP_CLR: @@ -185,6 +182,13 @@ target_ulong helper_cc_compute_all(target_ulong dst, t= arget_ulong src1, case CC_OP_BMILGL: return compute_all_bmilgl(dst, src1); =20 + case CC_OP_TBMADDB: + return compute_all_tbmaddb(dst, src1); + case CC_OP_TBMADDW: + return compute_all_tbmaddw(dst, src1); + case CC_OP_TBMADDL: + return compute_all_tbmaddl(dst, src1); + case CC_OP_ADCX: return compute_all_adcx(dst, src1, src2); case CC_OP_ADOX: @@ -215,7 +219,12 @@ target_ulong helper_cc_compute_all(target_ulong dst, t= arget_ulong src1, return compute_all_sarq(dst, src1); case CC_OP_BMILGQ: return compute_all_bmilgq(dst, src1); + case CC_OP_TBMADDQ: + return compute_all_tbmaddq(dst, src1); #endif + + default: + g_assert_not_reached(); } } =20 @@ -228,7 +237,6 @@ target_ulong helper_cc_compute_c(target_ulong dst, targ= et_ulong src1, target_ulong src2, int op) { switch (op) { - default: /* should never happen */ case CC_OP_LOGICB: case CC_OP_LOGICW: case CC_OP_LOGICL: @@ -307,6 +315,13 @@ target_ulong helper_cc_compute_c(target_ulong dst, tar= get_ulong src1, case CC_OP_BMILGL: return compute_c_bmilgl(dst, src1); =20 + case CC_OP_TBMADDB: + return compute_c_tbmaddb(dst, src1); + case CC_OP_TBMADDW: + return compute_c_tbmaddw(dst, src1); + case CC_OP_TBMADDL: + return compute_c_tbmaddl(dst, src1); + #ifdef TARGET_X86_64 case CC_OP_ADDQ: return compute_c_addq(dst, src1); @@ -320,7 +335,12 @@ target_ulong helper_cc_compute_c(target_ulong dst, tar= get_ulong src1, return compute_c_shlq(dst, src1); case CC_OP_BMILGQ: return compute_c_bmilgq(dst, src1); + case CC_OP_TBMADDQ: + return compute_c_tbmaddq(dst, src1); #endif + + default: + g_assert_not_reached(); } } =20 diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 53ec94ac9b..f36844fd95 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -227,7 +227,8 @@ static void x86_cpu_vendor_words2str(char *dst, uint32_= t vendor1, CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_PDPE1GB | \ TCG_EXT2_X86_64_FEATURES) #define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \ - CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A) + CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A | \ + CPUID_EXT3_TBM) #define TCG_EXT4_FEATURES 0 #define TCG_SVM_FEATURES 0 #define TCG_KVM_FEATURES 0 diff --git a/target/i386/translate.c b/target/i386/translate.c index db88cc4764..409b195d37 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -217,6 +217,7 @@ static const uint8_t cc_op_live[CC_OP_NB] =3D { [CC_OP_SHLB ... CC_OP_SHLQ] =3D USES_CC_DST | USES_CC_SRC, [CC_OP_SARB ... CC_OP_SARQ] =3D USES_CC_DST | USES_CC_SRC, [CC_OP_BMILGB ... CC_OP_BMILGQ] =3D USES_CC_DST | USES_CC_SRC, + [CC_OP_TBMADDB ... CC_OP_TBMADDQ] =3D USES_CC_DST | USES_CC_SRC, [CC_OP_ADCX] =3D USES_CC_DST | USES_CC_SRC, [CC_OP_ADOX] =3D USES_CC_SRC | USES_CC_SRC2, [CC_OP_ADCOX] =3D USES_CC_DST | USES_CC_SRC | USES_CC_SRC2, @@ -781,6 +782,12 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s,= TCGv reg) t0 =3D gen_ext_tl(reg, cpu_cc_src, size, false); return (CCPrepare) { .cond =3D TCG_COND_EQ, .reg =3D t0, .mask =3D= -1 }; =20 + case CC_OP_TBMADDB ... CC_OP_TBMADDQ: + size =3D s->cc_op - CC_OP_TBMADDB; + t0 =3D gen_ext_tl(reg, cpu_cc_src, size, true); + return (CCPrepare) { .cond =3D TCG_COND_EQ, .reg =3D t0, + .mask =3D -1, .imm =3D -1 }; + case CC_OP_ADCX: case CC_OP_ADCOX: return (CCPrepare) { .cond =3D TCG_COND_NE, .reg =3D cpu_cc_dst, @@ -8322,9 +8329,119 @@ static target_ulong disas_insn(DisasContext *s, CPU= State *cpu) gen_sse(env, s, b, pc_start, rex_r); break; =20 - case 0x800 ... 0x8ff: /* XOP opcode map 8 */ - case 0x900 ... 0x9ff: /* XOP opcode map 9 */ - case 0xa00 ... 0xaff: /* XOP opcode map 10 */ + case 0x901: + case 0x902: /* most tbm insns */ + if (!(s->cpuid_ext3_features & CPUID_EXT3_TBM) + || s->vex_l !=3D 0) { + goto illegal_op; + } + modrm =3D x86_ldub_code(env, s); + mod =3D (modrm >> 6) & 3; + rm =3D (modrm & 7) | REX_B(s); + ot =3D mo_64_32(s->dflag); + if (mod !=3D 3) { + gen_lea_modrm(env, s, modrm); + gen_op_ld_v(s, ot, cpu_T0, cpu_A0); + } else { + gen_op_mov_v_reg(ot, cpu_T0, rm); + } + + tcg_gen_mov_tl(cpu_cc_src, cpu_T0); + switch ((b & 2) * 4 + ((modrm >> 3) & 7)) { + case 1: /* blcfill */ + op =3D CC_OP_TBMADDB; + tcg_gen_addi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_and_tl(cpu_T0, cpu_T0, cpu_T1); + break; + case 2: /* blsfill */ + op =3D CC_OP_BMILGB; + tcg_gen_subi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_or_tl(cpu_T0, cpu_T0, cpu_T1); + break; + case 3: /* blcs */ + op =3D CC_OP_TBMADDB; + tcg_gen_addi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_or_tl(cpu_T0, cpu_T0, cpu_T1); + break; + case 4: /* tzmsk */ + op =3D CC_OP_BMILGB; + tcg_gen_subi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_andc_tl(cpu_T0, cpu_T1, cpu_T0); + break; + case 5: /* blcic */ + op =3D CC_OP_TBMADDB; + tcg_gen_addi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_andc_tl(cpu_T0, cpu_T1, cpu_T0); + break; + case 6: /* blsic */ + op =3D CC_OP_BMILGB; + tcg_gen_subi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_orc_tl(cpu_T0, cpu_T1, cpu_T0); + break; + case 7: /* t1mskc */ + op =3D CC_OP_TBMADDB; + tcg_gen_addi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_orc_tl(cpu_T0, cpu_T1, cpu_T0); + break; + case 8 + 1: /* blcmsk */ + op =3D CC_OP_TBMADDB; + tcg_gen_addi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_xor_tl(cpu_T0, cpu_T0, cpu_T1); + break; + case 8 + 6: /* blci */ + op =3D CC_OP_TBMADDB; + tcg_gen_addi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_orc_tl(cpu_T0, cpu_T0, cpu_T1); + break; + default: + goto unknown_op; + } + gen_op_mov_reg_v(ot, s->vex_v, cpu_T0); + tcg_gen_mov_tl(cpu_cc_dst, cpu_T0); + set_cc_op(s, op + ot); + break; + + case 0xa10: /* bextr Gy, Ey, imm4 */ + { + int ofs, len, max; + + if (!(s->cpuid_ext3_features & CPUID_EXT3_TBM) + || s->vex_l !=3D 0) { + goto illegal_op; + } + + s->rip_offset =3D 4; + modrm =3D cpu_ldub_code(env, s->pc++); + reg =3D ((modrm >> 3) & 7) | rex_r; + mod =3D (modrm >> 6) & 3; + rm =3D (modrm & 7) | REX_B(s); + ot =3D mo_64_32(s->dflag); + if (mod !=3D 3) { + gen_lea_modrm(env, s, modrm); + gen_op_ld_v(s, ot, cpu_T0, cpu_A0); + } else { + gen_op_mov_v_reg(ot, cpu_T0, rm); + } + val =3D cpu_ldl_code(env, s->pc); + s->pc +=3D 4; + + ofs =3D extract32(val, 0, 8); + len =3D extract32(val, 8, 8); + max =3D 8 << ot; + if (len =3D=3D 0 || ofs >=3D max) { + tcg_gen_movi_tl(cpu_T0, 0); + } else { + len =3D MIN(len, max - ofs); + tcg_gen_extract_tl(cpu_T0, cpu_T0, ofs, len); + } + tcg_gen_mov_tl(cpu_regs[reg], cpu_T0); + gen_op_update1_cc(); + /* Z is set as per result, C/O =3D 0, S/A/P =3D undefined. + Which is less strict than LOGIC, but accurate. */ + set_cc_op(s, CC_OP_LOGICB + ot); + } + break; + default: goto unknown_op; } --=20 2.13.6 From nobody Sun Nov 2 03:11:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509015102850801.4594310560063; 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Thu, 26 Oct 2017 03:50:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 26 Oct 2017 12:50:06 +0200 Message-Id: <20171026105007.31777-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171026105007.31777-1-richard.henderson@linaro.org> References: <20171026105007.31777-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::243 Subject: [Qemu-devel] [PATCH v2 3/4] target/i386: Fix BLSR and BLSI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, ehabkost@redhat.com, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson The implementation of these two instructions was swapped. At the same time, unify the setup of eflags for the insn group. Reported-by: Ricardo Ribalda Delgado Signed-off-by: Richard Henderson --- target/i386/translate.c | 26 +++++++++----------------- 1 file changed, 9 insertions(+), 17 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 409b195d37..dd464b98b0 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -4067,34 +4067,26 @@ static void gen_sse(CPUX86State *env, DisasContext = *s, int b, ot =3D mo_64_32(s->dflag); gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); =20 + tcg_gen_mov_tl(cpu_cc_src, cpu_T0); switch (reg & 7) { case 1: /* blsr By,Ey */ - tcg_gen_neg_tl(cpu_T1, cpu_T0); + tcg_gen_subi_tl(cpu_T1, cpu_T0, 1); tcg_gen_and_tl(cpu_T0, cpu_T0, cpu_T1); - gen_op_mov_reg_v(ot, s->vex_v, cpu_T0); - gen_op_update2_cc(); - set_cc_op(s, CC_OP_BMILGB + ot); break; - case 2: /* blsmsk By,Ey */ - tcg_gen_mov_tl(cpu_cc_src, cpu_T0); - tcg_gen_subi_tl(cpu_T0, cpu_T0, 1); - tcg_gen_xor_tl(cpu_T0, cpu_T0, cpu_cc_src); - tcg_gen_mov_tl(cpu_cc_dst, cpu_T0); - set_cc_op(s, CC_OP_BMILGB + ot); + tcg_gen_subi_tl(cpu_T1, cpu_T0, 1); + tcg_gen_xor_tl(cpu_T0, cpu_T0, cpu_T1); break; - case 3: /* blsi By, Ey */ - tcg_gen_mov_tl(cpu_cc_src, cpu_T0); - tcg_gen_subi_tl(cpu_T0, cpu_T0, 1); - tcg_gen_and_tl(cpu_T0, cpu_T0, cpu_cc_src); - tcg_gen_mov_tl(cpu_cc_dst, cpu_T0); - set_cc_op(s, CC_OP_BMILGB + ot); + tcg_gen_neg_tl(cpu_T1, cpu_T0); + tcg_gen_and_tl(cpu_T0, cpu_T0, cpu_T1); break; - default: goto unknown_op; } + tcg_gen_mov_tl(cpu_cc_dst, cpu_T0); + gen_op_mov_reg_v(ot, s->vex_v, cpu_T0); + set_cc_op(s, CC_OP_BMILGB + ot); break; =20 default: --=20 2.13.6 From nobody Sun Nov 2 03:11:09 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509015284584117.91485755247902; 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Thu, 26 Oct 2017 03:50:15 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 26 Oct 2017 12:50:07 +0200 Message-Id: <20171026105007.31777-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171026105007.31777-1-richard.henderson@linaro.org> References: <20171026105007.31777-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::242 Subject: [Qemu-devel] [PATCH v2 4/4] target/i386: Fix ANDN (bmi) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, Richard Henderson , ehabkost@redhat.com, Ricardo Ribalda Delgado Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Ricardo Ribalda Delgado Operands on ANDN are swapped. Tested with the following function: long test_andn(long v1, long v2){ return (~v1 & v2); } Compiled with: gcc kk.c -mbmi -O3 -Wall 0000000000000910 : 910:c4 e2 c0 f2 c6 andn %rsi,%rdi,%rax 915:c3 retq 916:66 2e 0f 1f 84 00 00 nopw %cs:0x0(%rax,%rax,1) 91d:00 00 00 and gcc kk.c -march=3Dnative -O3 -Wall 0000000000000930 : 930: 48 f7 d7 not %rdi 933: 48 89 f8 mov %rdi,%rax 936: 48 21 f0 and %rsi,%rax 939: c3 retq 93a: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1) The test showed than -mbmi version behaved differently than the -march native version. Signed-off-by: Ricardo Ribalda Delgado Message-Id: <20170713215137.5307-1-ricardo.ribalda@gmail.com> Signed-off-by: Richard Henderson --- target/i386/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index dd464b98b0..96cd04c6de 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -3810,7 +3810,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s= , int b, } ot =3D mo_64_32(s->dflag); gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); - tcg_gen_andc_tl(cpu_T0, cpu_regs[s->vex_v], cpu_T0); + tcg_gen_andc_tl(cpu_T0, cpu_T0, cpu_regs[s->vex_v]); gen_op_mov_reg_v(ot, reg, cpu_T0); gen_op_update1_cc(); set_cc_op(s, CC_OP_LOGICB + ot); --=20 2.13.6