From nobody Tue Feb 10 14:32:47 2026 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1508934813103854.1684234075033; Wed, 25 Oct 2017 05:33:33 -0700 (PDT) Received: from localhost ([::1]:48090 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7Ks5-0000Wd-E6 for importer@patchew.org; Wed, 25 Oct 2017 08:33:21 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42913) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7Kq3-0007WP-2f for qemu-devel@nongnu.org; Wed, 25 Oct 2017 08:31:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e7Kq0-00082Q-Ur for qemu-devel@nongnu.org; Wed, 25 Oct 2017 08:31:15 -0400 Received: from mail-wr0-x243.google.com ([2a00:1450:400c:c0c::243]:53354) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e7Kq0-00081s-Kp for qemu-devel@nongnu.org; Wed, 25 Oct 2017 08:31:12 -0400 Received: by mail-wr0-x243.google.com with SMTP id u40so17982987wrf.10 for ; Wed, 25 Oct 2017 05:31:12 -0700 (PDT) Received: from cloudburst.twiddle.net ([62.168.35.105]) by smtp.gmail.com with ESMTPSA id 61sm2263446wrg.58.2017.10.25.05.31.10 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 25 Oct 2017 05:31:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tJEywJ+CW4l0qPNVl3lJcjRnYBouRnECsjHaD/WUiZM=; b=CQmtQ/p+lvWjGh5hUOl+D2nHEgQor9MzWkKEVk3U0aF4WUqQZMYMbJnI+U38p4YWg2 jqs3zxR8FPEpvsg2GY+K/ysSKt/+4dUc/w9sGn8cIdiYgWFwIJnLYzh1w+dLL+CUMjYW tbl6QDtP7STXCyiVzE/r2VTRoJeWPmdIXAenE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tJEywJ+CW4l0qPNVl3lJcjRnYBouRnECsjHaD/WUiZM=; b=qUY/diOwMZ0PCY9SZrmM/tOfmsWpwbQM3jDgcCqT/GF4YfKsG16ZOUNLgR0VySW+h7 hNeVMZz39YB2OXeZ+UTOSt8e/002qONRS53ln5uxdO2VsB5QubhdzMMPXiaakvjekn5b JP16KWbakV44ryJQqQx3lTsN/SIlWhWd4knflmeVi+Giq785KQnilOpWJkZG1qv/smnL UZoPc9xEjBxehYsLjg8KulqiG98K5rOWoh+z+yVuTkLdNhIDSdzdJJcB1EHt4HTIFbA8 IB1ZsD0R78z8uznnCbYbHuheSL8cXZMehkpXMFMIOh4qbiiXoG6gVn4K+ZSpz6KOhIvu zZIA== X-Gm-Message-State: AMCzsaVB6gKHoPRf8B7lPnZJxbu9g4smw8t2OrIcuj1J24Eciqd/iI8q PJd6tCubcVtlT6XG1q57mj9ch2eRMME= X-Google-Smtp-Source: ABhQp+TMjHsMEXl88CJpuerLpL8RW8aYtOj1QwUz6GNK54oO+zzDu73AwES/4SghSa+sC3wACYYv+g== X-Received: by 10.223.189.148 with SMTP id l20mr2109248wrh.188.1508934671205; Wed, 25 Oct 2017 05:31:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 25 Oct 2017 14:30:51 +0200 Message-Id: <20171025123056.3165-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171025123056.3165-1-richard.henderson@linaro.org> References: <20171025123056.3165-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::243 Subject: [Qemu-devel] [PULL 06/11] disas: Support the Capstone disassembler library X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_6 Z_629925259 SPT_0 If configured, prefer this over our rather dated copy of the GPLv2-only binutils. This will be especially apparent with the proposed vector extensions to TCG, as disas/i386.c does not handle AVX. Tested-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/disas/bfd.h | 4 + include/disas/capstone.h | 38 ++++++++ disas.c | 219 +++++++++++++++++++++++++++++++++++++++++++= +--- configure | 26 ++++++ 4 files changed, 274 insertions(+), 13 deletions(-) create mode 100644 include/disas/capstone.h diff --git a/include/disas/bfd.h b/include/disas/bfd.h index 2852f80ed6..1f88c9e9d5 100644 --- a/include/disas/bfd.h +++ b/include/disas/bfd.h @@ -371,6 +371,10 @@ typedef struct disassemble_info { /* Command line options specific to the target disassembler. */ char * disassembler_options; =20 + /* Options for Capstone disassembly. */ + int cap_arch; + int cap_mode; + } disassemble_info; =20 =0C diff --git a/include/disas/capstone.h b/include/disas/capstone.h new file mode 100644 index 0000000000..84e214956d --- /dev/null +++ b/include/disas/capstone.h @@ -0,0 +1,38 @@ +#ifndef QEMU_CAPSTONE_H +#define QEMU_CAPSTONE_H 1 + +#ifdef CONFIG_CAPSTONE + +#include + +#else + +/* Just enough to allow backends to init without ifdefs. */ + +#define CS_ARCH_ARM -1 +#define CS_ARCH_ARM64 -1 +#define CS_ARCH_MIPS -1 +#define CS_ARCH_X86 -1 +#define CS_ARCH_PPC -1 +#define CS_ARCH_SPARC -1 +#define CS_ARCH_SYSZ -1 + +#define CS_MODE_LITTLE_ENDIAN 0 +#define CS_MODE_BIG_ENDIAN 0 +#define CS_MODE_ARM 0 +#define CS_MODE_16 0 +#define CS_MODE_32 0 +#define CS_MODE_64 0 +#define CS_MODE_THUMB 0 +#define CS_MODE_MCLASS 0 +#define CS_MODE_V8 0 +#define CS_MODE_MICRO 0 +#define CS_MODE_MIPS3 0 +#define CS_MODE_MIPS32R6 0 +#define CS_MODE_MIPSGP64 0 +#define CS_MODE_V9 0 +#define CS_MODE_MIPS32 0 +#define CS_MODE_MIPS64 0 + +#endif /* CONFIG_CAPSTONE */ +#endif /* QEMU_CAPSTONE_H */ diff --git a/disas.c b/disas.c index 2b26466b61..e392a2926e 100644 --- a/disas.c +++ b/disas.c @@ -6,6 +6,7 @@ =20 #include "cpu.h" #include "disas/disas.h" +#include "disas/capstone.h" =20 typedef struct CPUDebug { struct disassemble_info info; @@ -171,6 +172,192 @@ static int print_insn_od_target(bfd_vma pc, disassemb= le_info *info) return print_insn_objdump(pc, info, "OBJD-T"); } =20 +#ifdef CONFIG_CAPSTONE +/* Temporary storage for the capstone library. This will be alloced via + malloc with a size private to the library; thus there's no reason not + to share this across calls and across host vs target disassembly. */ +static __thread cs_insn *cap_insn; + +/* Initialize the Capstone library. */ +/* ??? It would be nice to cache this. We would need one handle for the + host and one for the target. For most targets we can reset specific + parameters via cs_option(CS_OPT_MODE, new_mode), but we cannot change + CS_ARCH_* in this way. Thus we would need to be able to close and + re-open the target handle with a different arch for the target in order + to handle AArch64 vs AArch32 mode switching. */ +static cs_err cap_disas_start(disassemble_info *info, csh *handle) +{ + cs_mode cap_mode =3D info->cap_mode; + cs_err err; + + cap_mode +=3D (info->endian =3D=3D BFD_ENDIAN_BIG ? CS_MODE_BIG_ENDIAN + : CS_MODE_LITTLE_ENDIAN); + + err =3D cs_open(info->cap_arch, cap_mode, handle); + if (err !=3D CS_ERR_OK) { + return err; + } + + /* ??? There probably ought to be a better place to put this. */ + if (info->cap_arch =3D=3D CS_ARCH_X86) { + /* We don't care about errors (if for some reason the library + is compiled without AT&T syntax); the user will just have + to deal with the Intel syntax. */ + cs_option(*handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT); + } + + /* "Disassemble" unknown insns as ".byte W,X,Y,Z". */ + cs_option(*handle, CS_OPT_SKIPDATA, CS_OPT_ON); + + /* Allocate temp space for cs_disasm_iter. */ + if (cap_insn =3D=3D NULL) { + cap_insn =3D cs_malloc(*handle); + if (cap_insn =3D=3D NULL) { + cs_close(handle); + return CS_ERR_MEM; + } + } + return CS_ERR_OK; +} + +/* Disassemble SIZE bytes at PC for the target. */ +static bool cap_disas_target(disassemble_info *info, uint64_t pc, size_t s= ize) +{ + uint8_t cap_buf[1024]; + csh handle; + cs_insn *insn; + size_t csize =3D 0; + + if (cap_disas_start(info, &handle) !=3D CS_ERR_OK) { + return false; + } + insn =3D cap_insn; + + while (1) { + size_t tsize =3D MIN(sizeof(cap_buf) - csize, size); + const uint8_t *cbuf =3D cap_buf; + + target_read_memory(pc + csize, cap_buf + csize, tsize, info); + csize +=3D tsize; + size -=3D tsize; + + while (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) { + (*info->fprintf_func)(info->stream, + "0x%08" PRIx64 ": %-12s %s\n", + insn->address, insn->mnemonic, + insn->op_str); + } + + /* If the target memory is not consumed, go back for more... */ + if (size !=3D 0) { + /* ... taking care to move any remaining fractional insn + to the beginning of the buffer. */ + if (csize !=3D 0) { + memmove(cap_buf, cbuf, csize); + } + continue; + } + + /* Since the target memory is consumed, we should not have + a remaining fractional insn. */ + if (csize !=3D 0) { + (*info->fprintf_func)(info->stream, + "Disassembler disagrees with translator " + "over instruction decoding\n" + "Please report this to qemu-devel@nongnu.org\n"); + } + break; + } + + cs_close(&handle); + return true; +} + +/* Disassemble SIZE bytes at CODE for the host. */ +static bool cap_disas_host(disassemble_info *info, void *code, size_t size) +{ + csh handle; + const uint8_t *cbuf; + cs_insn *insn; + uint64_t pc; + + if (cap_disas_start(info, &handle) !=3D CS_ERR_OK) { + return false; + } + insn =3D cap_insn; + + cbuf =3D code; + pc =3D (uintptr_t)code; + + while (cs_disasm_iter(handle, &cbuf, &size, &pc, insn)) { + (*info->fprintf_func)(info->stream, + "0x%08" PRIx64 ": %-12s %s\n", + insn->address, insn->mnemonic, + insn->op_str); + } + if (size !=3D 0) { + (*info->fprintf_func)(info->stream, + "Disassembler disagrees with TCG over instruction encoding\n" + "Please report this to qemu-devel@nongnu.org\n"); + } + + cs_close(&handle); + return true; +} + +#if !defined(CONFIG_USER_ONLY) +/* Disassemble COUNT insns at PC for the target. */ +static bool cap_disas_monitor(disassemble_info *info, uint64_t pc, int cou= nt) +{ + uint8_t cap_buf[32]; + csh handle; + cs_insn *insn; + size_t csize =3D 0; + + if (cap_disas_start(info, &handle) !=3D CS_ERR_OK) { + return false; + } + insn =3D cap_insn; + + while (1) { + /* We want to read memory for one insn, but generically we do not + know how much memory that is. We have a small buffer which is + known to be sufficient for all supported targets. Try to not + read beyond the page, Just In Case. For even more simplicity, + ignore the actual target page size and use a 1k boundary. If + that turns out to be insufficient, we'll come back around the + loop and read more. */ + uint64_t epc =3D QEMU_ALIGN_UP(pc + csize + 1, 1024); + size_t tsize =3D MIN(sizeof(cap_buf) - csize, epc - pc); + const uint8_t *cbuf =3D cap_buf; + + /* Make certain that we can make progress. */ + assert(tsize !=3D 0); + info->read_memory_func(pc, cap_buf + csize, tsize, info); + csize +=3D tsize; + + if (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) { + (*info->fprintf_func)(info->stream, + "0x%08" PRIx64 ": %-12s %s\n", + insn->address, insn->mnemonic, + insn->op_str); + if (--count <=3D 0) { + break; + } + } + memmove(cap_buf, cbuf, csize); + } + + cs_close(&handle); + return true; +} +#endif /* !CONFIG_USER_ONLY */ +#else +# define cap_disas_target(i, p, s) false +# define cap_disas_host(i, p, s) false +# define cap_disas_monitor(i, p, c) false +#endif /* CONFIG_CAPSTONE */ + /* Disassemble this for me please... (debugging). */ void target_disas(FILE *out, CPUState *cpu, target_ulong code, target_ulong size) @@ -187,6 +374,8 @@ void target_disas(FILE *out, CPUState *cpu, target_ulon= g code, s.info.buffer_vma =3D code; s.info.buffer_length =3D size; s.info.print_address_func =3D generic_print_address; + s.info.cap_arch =3D -1; + s.info.cap_mode =3D 0; =20 #ifdef TARGET_WORDS_BIGENDIAN s.info.endian =3D BFD_ENDIAN_BIG; @@ -198,6 +387,10 @@ void target_disas(FILE *out, CPUState *cpu, target_ulo= ng code, cc->disas_set_info(cpu, &s.info); } =20 + if (s.info.cap_arch >=3D 0 && cap_disas_target(&s.info, code, size)) { + return; + } + if (s.info.print_insn =3D=3D NULL) { s.info.print_insn =3D print_insn_od_target; } @@ -205,18 +398,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulo= ng code, for (pc =3D code; size > 0; pc +=3D count, size -=3D count) { fprintf(out, "0x" TARGET_FMT_lx ": ", pc); count =3D s.info.print_insn(pc, &s.info); -#if 0 - { - int i; - uint8_t b; - fprintf(out, " {"); - for(i =3D 0; i < count; i++) { - target_read_memory(pc + i, &b, 1, &s.info); - fprintf(out, " %02x", b); - } - fprintf(out, " }"); - } -#endif fprintf(out, "\n"); if (count < 0) break; @@ -244,6 +425,8 @@ void disas(FILE *out, void *code, unsigned long size) s.info.buffer =3D code; s.info.buffer_vma =3D (uintptr_t)code; s.info.buffer_length =3D size; + s.info.cap_arch =3D -1; + s.info.cap_mode =3D 0; =20 #ifdef HOST_WORDS_BIGENDIAN s.info.endian =3D BFD_ENDIAN_BIG; @@ -281,6 +464,11 @@ void disas(FILE *out, void *code, unsigned long size) #elif defined(__hppa__) print_insn =3D print_insn_hppa; #endif + + if (s.info.cap_arch >=3D 0 && cap_disas_host(&s.info, code, size)) { + return; + } + if (print_insn =3D=3D NULL) { print_insn =3D print_insn_od_host; } @@ -343,8 +531,9 @@ void monitor_disas(Monitor *mon, CPUState *cpu, monitor_disas_is_physical =3D is_physical; s.info.read_memory_func =3D monitor_read_memory; s.info.print_address_func =3D generic_print_address; - s.info.buffer_vma =3D pc; + s.info.cap_arch =3D -1; + s.info.cap_mode =3D 0; =20 #ifdef TARGET_WORDS_BIGENDIAN s.info.endian =3D BFD_ENDIAN_BIG; @@ -356,6 +545,10 @@ void monitor_disas(Monitor *mon, CPUState *cpu, cc->disas_set_info(cpu, &s.info); } =20 + if (s.info.cap_arch >=3D 0 && cap_disas_monitor(&s.info, pc, nb_insn))= { + return; + } + if (!s.info.print_insn) { monitor_printf(mon, "0x" TARGET_FMT_lx ": Asm output not supported on this arch\n", pc); diff --git a/configure b/configure index 03547cea6a..d06ad64058 100755 --- a/configure +++ b/configure @@ -375,6 +375,7 @@ opengl_dmabuf=3D"no" cpuid_h=3D"no" avx2_opt=3D"no" zlib=3D"yes" +capstone=3D"" lzo=3D"" snappy=3D"" bzip2=3D"" @@ -1294,6 +1295,10 @@ for opt do error_exit "vhost-user isn't available on win32" fi ;; + --disable-capstone) capstone=3D"no" + ;; + --enable-capstone) capstone=3D"yes" + ;; *) echo "ERROR: unknown option $opt" echo "Try '$0 --help' for more information" @@ -1541,6 +1546,7 @@ disabled with --disable-FEATURE, default is enabled i= f available: vxhs Veritas HyperScale vDisk backend support crypto-afalg Linux AF_ALG crypto backend driver vhost-user vhost-user support + capstone capstone disassembler support =20 NOTE: The object files are built at the place where configure is launched EOF @@ -4411,6 +4417,22 @@ EOF fi =20 ########################################## +# capstone + +if test "$capstone" !=3D no; then + if $pkg_config capstone; then + capstone=3Dyes + QEMU_CFLAGS=3D"$QEMU_CFLAGS $($pkg_config --cflags capstone)" + LIBS=3D"$($pkg_config --libs capstone) $LIBS" + else + if test "$capstone" =3D yes; then + feature_not_found capstone + fi + capstone=3Dno + fi +fi + +########################################## # check if we have fdatasync =20 fdatasync=3Dno @@ -5468,6 +5490,7 @@ echo "jemalloc support $jemalloc" echo "avx2 optimization $avx2_opt" echo "replication support $replication" echo "VxHS block device $vxhs" +echo "capstone $capstone" =20 if test "$sdl_too_old" =3D "yes"; then echo "-> Your SDL version is too old - please upgrade to have SDL support" @@ -6142,6 +6165,9 @@ fi if test "$ivshmem" =3D "yes" ; then echo "CONFIG_IVSHMEM=3Dy" >> $config_host_mak fi +if test "$capstone" =3D "yes" ; then + echo "CONFIG_CAPSTONE=3Dy" >> $config_host_mak +fi =20 # Hold two types of flag: # CONFIG_THREAD_SETNAME_BYTHREAD - we've got a way of setting the name = on --=20 2.13.6