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[97.113.165.104]) by smtp.gmail.com with ESMTPSA id a17sm3532594pfk.173.2017.10.20.16.20.56 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 20 Oct 2017 16:20:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mDmQuidLIeY5aP3Lh05q/zqXBNXZsdaQX2mM/b9wNZw=; b=KmfOUA3Qkiy2iXFIbD4OmWDe4SqMUL5xdgD3CNl+xmFzZXPKbfOOU6jROjPkgMo1Gs 9oQCpDC6USPtmcftneLsgw8Vo2Zq7T5lmZZICHl34uAqyqRAR7eiiJ9DD+t6IUS1BrvZ DdBryWReSTEUfBmqwwtkM2lZjP0rm0nzqDwVM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mDmQuidLIeY5aP3Lh05q/zqXBNXZsdaQX2mM/b9wNZw=; b=FY0Jo++zJGdotLlcZXMvJZs5+J2SpGH8xZ8AMe0ZX/YbviHsFcpnvHKt6yU0qsx9s9 0o+eHqA0h2kx0N/vgMOCmsGkJRVrzDc6S6Eq/cfmOzGDFOGF3p2CAChR0XOqlu2vd058 04v9FmWmXmRa3VVtOYUdBmujrG4mQQbxu4ZDgw528NOO2oT0zzpXmTUcvO99XPPb/4oE AmfPpgmWCAy2fgYPGMIPutO3qJ8FDokGMUtACO6ekzyqVZyZDkYnMhwdOx0xi/Y4w03S 4qUyX5xGtXBzdTNnyGtADaxIa7/qyyl6qjxrpRDurNgk12C0HeGiXUbBfmQ4zxRbnn8g c7zw== X-Gm-Message-State: AMCzsaUCbAUCtFKuC1YWyR+5qJSK3520w6Offgd4zVn9YszuVkxVD37u glYtEYTbfJSc3Nzusul0myeoW20nOM0= X-Google-Smtp-Source: ABhQp+TyArPzhvXOasw8QriDemhKjNrzykpIAuHVrym9p0fmE00CK+dSWqnNdC2ROdH7H+Tjh6GkrQ== X-Received: by 10.99.116.89 with SMTP id e25mr5800158pgn.383.1508541658075; Fri, 20 Oct 2017 16:20:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 20 Oct 2017 16:19:53 -0700 Message-Id: <20171020232023.15010-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171020232023.15010-1-richard.henderson@linaro.org> References: <20171020232023.15010-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [PATCH v7 22/52] tcg: Use pointers in TCGOp->args X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, cota@braap.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This limits the indexing into tcg_ctx.temps to initial opcode generation time. Signed-off-by: Richard Henderson Reviewed-by: Emilio G. Cota --- tcg/tcg.h | 46 +++++++++++++++++++++------------------------- 1 file changed, 21 insertions(+), 25 deletions(-) diff --git a/tcg/tcg.h b/tcg/tcg.h index 7fe0fb9e07..17779393a1 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -701,65 +701,61 @@ static inline size_t temp_idx(TCGTemp *ts) =20 static inline TCGArg temp_arg(TCGTemp *ts) { - ptrdiff_t a =3D (void *)ts - (void *)&tcg_ctx; - tcg_debug_assert(a >=3D offsetof(TCGContext, temps) - && a < offsetof(TCGContext, temps[tcg_ctx.nb_temps])); - return a; + return (uintptr_t)ts; } =20 static inline TCGTemp *arg_temp(TCGArg a) { - if (a =3D=3D TCG_CALL_DUMMY_ARG) { - return NULL; - } - tcg_debug_assert(a >=3D offsetof(TCGContext, temps) - && a < offsetof(TCGContext, temps[tcg_ctx.nb_temps])); - return (void *)&tcg_ctx + a; + return (TCGTemp *)a; } =20 -static inline TCGArg tcgv_i32_arg(TCGv_i32 t) +static inline TCGTemp *tcgv_i32_temp(TCGv_i32 v) { - return (intptr_t)t; + uintptr_t o =3D (uintptr_t)v; + TCGTemp *t =3D (void *)&tcg_ctx + o; + tcg_debug_assert(offsetof(TCGContext, temps[temp_idx(t)]) =3D=3D o); + return t; } =20 -static inline TCGArg tcgv_i64_arg(TCGv_i64 t) +static inline TCGTemp *tcgv_i64_temp(TCGv_i64 v) { - return (intptr_t)t; + return tcgv_i32_temp((TCGv_i32)v); } =20 -static inline TCGArg tcgv_ptr_arg(TCGv_ptr t) +static inline TCGTemp *tcgv_ptr_temp(TCGv_ptr v) { - return (intptr_t)t; + return tcgv_i32_temp((TCGv_i32)v); } =20 -static inline TCGTemp *tcgv_i32_temp(TCGv_i32 t) +static inline TCGArg tcgv_i32_arg(TCGv_i32 v) { - return arg_temp(tcgv_i32_arg(t)); + return temp_arg(tcgv_i32_temp(v)); } =20 -static inline TCGTemp *tcgv_i64_temp(TCGv_i64 t) +static inline TCGArg tcgv_i64_arg(TCGv_i64 v) { - return arg_temp(tcgv_i64_arg(t)); + return temp_arg(tcgv_i64_temp(v)); } =20 -static inline TCGTemp *tcgv_ptr_temp(TCGv_ptr t) +static inline TCGArg tcgv_ptr_arg(TCGv_ptr v) { - return arg_temp(tcgv_ptr_arg(t)); + return temp_arg(tcgv_ptr_temp(v)); } =20 static inline TCGv_i32 temp_tcgv_i32(TCGTemp *t) { - return (TCGv_i32)temp_arg(t); + (void)temp_idx(t); /* trigger embedded assert */ + return (TCGv_i32)((void *)t - (void *)&tcg_ctx); } =20 static inline TCGv_i64 temp_tcgv_i64(TCGTemp *t) { - return (TCGv_i64)temp_arg(t); + return (TCGv_i64)temp_tcgv_i32(t); } =20 static inline TCGv_ptr temp_tcgv_ptr(TCGTemp *t) { - return (TCGv_ptr)temp_arg(t); + return (TCGv_ptr)temp_tcgv_i32(t); } =20 #if TCG_TARGET_REG_BITS =3D=3D 32 --=20 2.13.6