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[97.113.165.104]) by smtp.gmail.com with ESMTPSA id a17sm3532594pfk.173.2017.10.20.16.20.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 20 Oct 2017 16:20:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bkxpjX8RLGfsMdrulIVBi+LYVaJi1uJIdM89Chv08EU=; b=jFWput17fa4eV1wHMZ6V5X3j5T8Xt7maMAl2LaBxMvOWLdXRXf94f/akCojs84/jza ujsl01ebWcGDirNqzxF6e0YbgVOJqpN2hrnv9dIYG9I1wlj6gh5noTj13izbe1aiPQTG UKYQztjAy9pewTNM46RD0R2KG0qxzrHXubzww= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bkxpjX8RLGfsMdrulIVBi+LYVaJi1uJIdM89Chv08EU=; b=PIsyhygPa5rnME/OQTDCgXzv6oYinGCKTGgfNImLtwioFOuhHdv3oCcTlXOZu62L/x ILKzuCsa91s4SbqP4b4cN8Nx813DDV+XlqT0PYoA7TeqBr5RM/USXIi/nJl/+ek5ypUR WO9CVhNQ+GAAr0W2kzKDiQFUFWRe19Nae/Ii9i3yA2gkEOTZdv7/6MkwHj06nYsxbxBO xHonPgX4qYG/Fce5IVPeLrqZs0G18EjAobfxqApTGXN3JWBEea+VKg5x8Fl3mwLdVn0b fQKOQnb3nMlXMUzTNABo3hLBMQd3zJqWqrcm9DjXpTk++OE+M2JgdBGZ4wMlMZyqICEH mWyQ== X-Gm-Message-State: AMCzsaXy8GQ6xQhedRkCTCLRUUmQjl8Ggr8NIrZaBVrOV+mLQRYbrxzw cGuUjFnBtaa+EMpjaK5FtaB8vfA8i9E= X-Google-Smtp-Source: ABhQp+R3ItbNLm1k85k13BoiqCh6SSEaF/sJPv+d0XMLr+PlcXgxw/6pI+ZQIsNwp4wOqDZFBvSA1w== X-Received: by 10.99.127.18 with SMTP id a18mr5756634pgd.98.1508541647033; Fri, 20 Oct 2017 16:20:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 20 Oct 2017 16:19:45 -0700 Message-Id: <20171020232023.15010-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171020232023.15010-1-richard.henderson@linaro.org> References: <20171020232023.15010-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::243 Subject: [Qemu-devel] [PATCH v7 14/52] tcg: Push tcg_ctx into generator functions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, cota@braap.org, f4bug@amsat.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Reviewed-by: Emilio G. Cota Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- tcg/tcg-op.h | 100 +++++++++++++++++++++++++++----------------------------= ---- tcg/tcg-op.c | 47 ++++++++++++++-------------- 2 files changed, 69 insertions(+), 78 deletions(-) diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 18d01b2f43..de9a61206a 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -28,173 +28,166 @@ =20 /* Basic output routines. Not for general consumption. */ =20 -void tcg_gen_op1(TCGContext *, TCGOpcode, TCGArg); -void tcg_gen_op2(TCGContext *, TCGOpcode, TCGArg, TCGArg); -void tcg_gen_op3(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg); -void tcg_gen_op4(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg); -void tcg_gen_op5(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg, - TCGArg, TCGArg); -void tcg_gen_op6(TCGContext *, TCGOpcode, TCGArg, TCGArg, TCGArg, - TCGArg, TCGArg, TCGArg); - +void tcg_gen_op1(TCGOpcode, TCGArg); +void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg); +void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg); +void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg); +void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg); +void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg= ); =20 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1) { - tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I32(a1)); + tcg_gen_op1(opc, GET_TCGV_I32(a1)); } =20 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1) { - tcg_gen_op1(&tcg_ctx, opc, GET_TCGV_I64(a1)); + tcg_gen_op1(opc, GET_TCGV_I64(a1)); } =20 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1) { - tcg_gen_op1(&tcg_ctx, opc, a1); + tcg_gen_op1(opc, a1); } =20 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2) { - tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2)); + tcg_gen_op2(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2)); } =20 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2) { - tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2)); + tcg_gen_op2(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2)); } =20 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2) { - tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I32(a1), a2); + tcg_gen_op2(opc, GET_TCGV_I32(a1), a2); } =20 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2) { - tcg_gen_op2(&tcg_ctx, opc, GET_TCGV_I64(a1), a2); + tcg_gen_op2(opc, GET_TCGV_I64(a1), a2); } =20 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2) { - tcg_gen_op2(&tcg_ctx, opc, a1, a2); + tcg_gen_op2(opc, a1, a2); } =20 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, TCGv_i32 a3) { - tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1), - GET_TCGV_I32(a2), GET_TCGV_I32(a3)); + tcg_gen_op3(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), GET_TCGV_I32(a3)); } =20 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, TCGv_i64 a3) { - tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1), - GET_TCGV_I64(a2), GET_TCGV_I64(a3)); + tcg_gen_op3(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), GET_TCGV_I64(a3)); } =20 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, TCGArg a3) { - tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3); + tcg_gen_op3(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3); } =20 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, TCGArg a3) { - tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3); + tcg_gen_op3(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3); } =20 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val, TCGv_ptr base, TCGArg offset) { - tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(val), GET_TCGV_PTR(base), offs= et); + tcg_gen_op3(opc, GET_TCGV_I32(val), GET_TCGV_PTR(base), offset); } =20 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val, TCGv_ptr base, TCGArg offset) { - tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(val), GET_TCGV_PTR(base), offs= et); + tcg_gen_op3(opc, GET_TCGV_I64(val), GET_TCGV_PTR(base), offset); } =20 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, TCGv_i32 a3, TCGv_i32 a4) { - tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), + tcg_gen_op4(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), GET_TCGV_I32(a3), GET_TCGV_I32(a4)); } =20 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, TCGv_i64 a3, TCGv_i64 a4) { - tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), + tcg_gen_op4(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), GET_TCGV_I64(a3), GET_TCGV_I64(a4)); } =20 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a= 2, TCGv_i32 a3, TCGArg a4) { - tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), - GET_TCGV_I32(a3), a4); + tcg_gen_op4(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), GET_TCGV_I32(a3),= a4); } =20 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a= 2, TCGv_i64 a3, TCGArg a4) { - tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), - GET_TCGV_I64(a3), a4); + tcg_gen_op4(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), GET_TCGV_I64(a3),= a4); } =20 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 = a2, TCGArg a3, TCGArg a4) { - tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3, a4); + tcg_gen_op4(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), a3, a4); } =20 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 = a2, TCGArg a3, TCGArg a4) { - tcg_gen_op4(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3, a4); + tcg_gen_op4(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), a3, a4); } =20 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2, TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5) { - tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), + tcg_gen_op5(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5)); } =20 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2, TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5) { - tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), + tcg_gen_op5(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5)); } =20 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a= 2, TCGv_i32 a3, TCGv_i32 a4, TCGArg a5) { - tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), + tcg_gen_op5(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5); } =20 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a= 2, TCGv_i64 a3, TCGv_i64 a4, TCGArg a5) { - tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), + tcg_gen_op5(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5); } =20 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 = a2, TCGv_i32 a3, TCGArg a4, TCGArg a5) { - tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), + tcg_gen_op5(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), GET_TCGV_I32(a3), a4, a5); } =20 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 = a2, TCGv_i64 a3, TCGArg a4, TCGArg a5) { - tcg_gen_op5(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), + tcg_gen_op5(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), GET_TCGV_I64(a3), a4, a5); } =20 @@ -202,7 +195,7 @@ static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_= i32 a1, TCGv_i32 a2, TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5, TCGv_i32 a6) { - tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), + tcg_gen_op6(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5), GET_TCGV_I32(a6)); } @@ -211,7 +204,7 @@ static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_= i64 a1, TCGv_i64 a2, TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5, TCGv_i64 a6) { - tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), + tcg_gen_op6(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5), GET_TCGV_I64(a6)); } @@ -220,7 +213,7 @@ static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv= _i32 a1, TCGv_i32 a2, TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5, TCGArg a6) { - tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), + tcg_gen_op6(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), GET_TCGV_I32(a3), GET_TCGV_I32(a4), GET_TCGV_I32(a5), a6); } =20 @@ -228,7 +221,7 @@ static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv= _i64 a1, TCGv_i64 a2, TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5, TCGArg a6) { - tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), + tcg_gen_op6(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), GET_TCGV_I64(a3), GET_TCGV_I64(a4), GET_TCGV_I64(a5), a6); } =20 @@ -236,7 +229,7 @@ static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCG= v_i32 a1, TCGv_i32 a2, TCGv_i32 a3, TCGv_i32 a4, TCGArg a5, TCGArg a6) { - tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), + tcg_gen_op6(opc, GET_TCGV_I32(a1), GET_TCGV_I32(a2), GET_TCGV_I32(a3), GET_TCGV_I32(a4), a5, a6); } =20 @@ -244,7 +237,7 @@ static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCG= v_i64 a1, TCGv_i64 a2, TCGv_i64 a3, TCGv_i64 a4, TCGArg a5, TCGArg a6) { - tcg_gen_op6(&tcg_ctx, opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), + tcg_gen_op6(opc, GET_TCGV_I64(a1), GET_TCGV_I64(a2), GET_TCGV_I64(a3), GET_TCGV_I64(a4), a5, a6); } =20 @@ -253,12 +246,12 @@ static inline void tcg_gen_op6ii_i64(TCGOpcode opc, T= CGv_i64 a1, TCGv_i64 a2, =20 static inline void gen_set_label(TCGLabel *l) { - tcg_gen_op1(&tcg_ctx, INDEX_op_set_label, label_arg(l)); + tcg_gen_op1(INDEX_op_set_label, label_arg(l)); } =20 static inline void tcg_gen_br(TCGLabel *l) { - tcg_gen_op1(&tcg_ctx, INDEX_op_br, label_arg(l)); + tcg_gen_op1(INDEX_op_br, label_arg(l)); } =20 void tcg_gen_mb(TCGBar); @@ -732,25 +725,24 @@ static inline void tcg_gen_concat32_i64(TCGv_i64 ret,= TCGv_i64 lo, TCGv_i64 hi) # if TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS static inline void tcg_gen_insn_start(target_ulong pc) { - tcg_gen_op1(&tcg_ctx, INDEX_op_insn_start, pc); + tcg_gen_op1(INDEX_op_insn_start, pc); } # else static inline void tcg_gen_insn_start(target_ulong pc) { - tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start, - (uint32_t)pc, (uint32_t)(pc >> 32)); + tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32)); } # endif #elif TARGET_INSN_START_WORDS =3D=3D 2 # if TARGET_LONG_BITS <=3D TCG_TARGET_REG_BITS static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1) { - tcg_gen_op2(&tcg_ctx, INDEX_op_insn_start, pc, a1); + tcg_gen_op2(INDEX_op_insn_start, pc, a1); } # else static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1) { - tcg_gen_op4(&tcg_ctx, INDEX_op_insn_start, + tcg_gen_op4(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32), (uint32_t)a1, (uint32_t)(a1 >> 32)); } @@ -760,13 +752,13 @@ static inline void tcg_gen_insn_start(target_ulong pc= , target_ulong a1) static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1, target_ulong a2) { - tcg_gen_op3(&tcg_ctx, INDEX_op_insn_start, pc, a1, a2); + tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2); } # else static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1, target_ulong a2) { - tcg_gen_op6(&tcg_ctx, INDEX_op_insn_start, + tcg_gen_op6(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32), (uint32_t)a1, (uint32_t)(a1 >> 32), (uint32_t)a2, (uint32_t)(a2 >> 32)); diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index bd84a782e3..bff4b95097 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -46,8 +46,9 @@ extern TCGv_i32 TCGV_HIGH_link_error(TCGv_i64); Up to and including filling in the forward link immediately. We'll do proper termination of the end of the list after we finish translation. = */ =20 -static inline TCGOp *tcg_emit_op(TCGContext *ctx, TCGOpcode opc) +static inline TCGOp *tcg_emit_op(TCGOpcode opc) { + TCGContext *ctx =3D &tcg_ctx; int oi =3D ctx->gen_next_op_idx; int ni =3D oi + 1; int pi =3D oi - 1; @@ -65,42 +66,40 @@ static inline TCGOp *tcg_emit_op(TCGContext *ctx, TCGOp= code opc) return op; } =20 -void tcg_gen_op1(TCGContext *ctx, TCGOpcode opc, TCGArg a1) +void tcg_gen_op1(TCGOpcode opc, TCGArg a1) { - TCGOp *op =3D tcg_emit_op(ctx, opc); + TCGOp *op =3D tcg_emit_op(opc); op->args[0] =3D a1; } =20 -void tcg_gen_op2(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2) +void tcg_gen_op2(TCGOpcode opc, TCGArg a1, TCGArg a2) { - TCGOp *op =3D tcg_emit_op(ctx, opc); + TCGOp *op =3D tcg_emit_op(opc); op->args[0] =3D a1; op->args[1] =3D a2; } =20 -void tcg_gen_op3(TCGContext *ctx, TCGOpcode opc, TCGArg a1, - TCGArg a2, TCGArg a3) +void tcg_gen_op3(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3) { - TCGOp *op =3D tcg_emit_op(ctx, opc); + TCGOp *op =3D tcg_emit_op(opc); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; } =20 -void tcg_gen_op4(TCGContext *ctx, TCGOpcode opc, TCGArg a1, - TCGArg a2, TCGArg a3, TCGArg a4) +void tcg_gen_op4(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4) { - TCGOp *op =3D tcg_emit_op(ctx, opc); + TCGOp *op =3D tcg_emit_op(opc); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; op->args[3] =3D a4; } =20 -void tcg_gen_op5(TCGContext *ctx, TCGOpcode opc, TCGArg a1, - TCGArg a2, TCGArg a3, TCGArg a4, TCGArg a5) +void tcg_gen_op5(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, + TCGArg a4, TCGArg a5) { - TCGOp *op =3D tcg_emit_op(ctx, opc); + TCGOp *op =3D tcg_emit_op(opc); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; @@ -108,10 +107,10 @@ void tcg_gen_op5(TCGContext *ctx, TCGOpcode opc, TCGA= rg a1, op->args[4] =3D a5; } =20 -void tcg_gen_op6(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2, - TCGArg a3, TCGArg a4, TCGArg a5, TCGArg a6) +void tcg_gen_op6(TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, + TCGArg a4, TCGArg a5, TCGArg a6) { - TCGOp *op =3D tcg_emit_op(ctx, opc); + TCGOp *op =3D tcg_emit_op(opc); op->args[0] =3D a1; op->args[1] =3D a2; op->args[2] =3D a3; @@ -123,7 +122,7 @@ void tcg_gen_op6(TCGContext *ctx, TCGOpcode opc, TCGArg= a1, TCGArg a2, void tcg_gen_mb(TCGBar mb_type) { if (parallel_cpus) { - tcg_gen_op1(&tcg_ctx, INDEX_op_mb, mb_type); + tcg_gen_op1(INDEX_op_mb, mb_type); } } =20 @@ -2458,7 +2457,7 @@ void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg) if (TCG_TARGET_REG_BITS =3D=3D 32) { tcg_gen_mov_i32(ret, TCGV_LOW(arg)); } else if (TCG_TARGET_HAS_extrl_i64_i32) { - tcg_gen_op2(&tcg_ctx, INDEX_op_extrl_i64_i32, + tcg_gen_op2(INDEX_op_extrl_i64_i32, GET_TCGV_I32(ret), GET_TCGV_I64(arg)); } else { tcg_gen_mov_i32(ret, MAKE_TCGV_I32(GET_TCGV_I64(arg))); @@ -2470,7 +2469,7 @@ void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg) if (TCG_TARGET_REG_BITS =3D=3D 32) { tcg_gen_mov_i32(ret, TCGV_HIGH(arg)); } else if (TCG_TARGET_HAS_extrh_i64_i32) { - tcg_gen_op2(&tcg_ctx, INDEX_op_extrh_i64_i32, + tcg_gen_op2(INDEX_op_extrh_i64_i32, GET_TCGV_I32(ret), GET_TCGV_I64(arg)); } else { TCGv_i64 t =3D tcg_temp_new_i64(); @@ -2486,7 +2485,7 @@ void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg) tcg_gen_mov_i32(TCGV_LOW(ret), arg); tcg_gen_movi_i32(TCGV_HIGH(ret), 0); } else { - tcg_gen_op2(&tcg_ctx, INDEX_op_extu_i32_i64, + tcg_gen_op2(INDEX_op_extu_i32_i64, GET_TCGV_I64(ret), GET_TCGV_I32(arg)); } } @@ -2497,7 +2496,7 @@ void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg) tcg_gen_mov_i32(TCGV_LOW(ret), arg); tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); } else { - tcg_gen_op2(&tcg_ctx, INDEX_op_ext_i32_i64, + tcg_gen_op2(INDEX_op_ext_i32_i64, GET_TCGV_I64(ret), GET_TCGV_I32(arg)); } } @@ -2609,7 +2608,7 @@ static void gen_ldst_i32(TCGOpcode opc, TCGv_i32 val,= TCGv addr, if (TCG_TARGET_REG_BITS =3D=3D 32) { tcg_gen_op4i_i32(opc, val, TCGV_LOW(addr), TCGV_HIGH(addr), oi); } else { - tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I32(val), GET_TCGV_I64(addr), = oi); + tcg_gen_op3(opc, GET_TCGV_I32(val), GET_TCGV_I64(addr), oi); } #endif } @@ -2622,7 +2621,7 @@ static void gen_ldst_i64(TCGOpcode opc, TCGv_i64 val,= TCGv addr, if (TCG_TARGET_REG_BITS =3D=3D 32) { tcg_gen_op4i_i32(opc, TCGV_LOW(val), TCGV_HIGH(val), addr, oi); } else { - tcg_gen_op3(&tcg_ctx, opc, GET_TCGV_I64(val), GET_TCGV_I32(addr), = oi); + tcg_gen_op3(opc, GET_TCGV_I64(val), GET_TCGV_I32(addr), oi); } #else if (TCG_TARGET_REG_BITS =3D=3D 32) { --=20 2.13.6