From nobody Wed Feb 11 02:54:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1508214432850901.88665056342; Mon, 16 Oct 2017 21:27:12 -0700 (PDT) Received: from localhost ([::1]:36361 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e4JTE-0003ix-3g for importer@patchew.org; Tue, 17 Oct 2017 00:27:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50376) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e4JOT-0008Hm-Hg for qemu-devel@nongnu.org; Tue, 17 Oct 2017 00:22:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e4JOR-0006ux-TO for qemu-devel@nongnu.org; Tue, 17 Oct 2017 00:22:17 -0400 Received: from ozlabs.org ([103.22.144.67]:44921) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e4JOR-0006s3-I1; Tue, 17 Oct 2017 00:22:15 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3yGMTq4X1Qz9t1G; Tue, 17 Oct 2017 15:22:07 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1508214127; bh=yhE1kdaeu9f+yl7beBwUtP9oGgtlYCnj1LA0I7XcROs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PcnaY9VzFp2bPFN9U3nUdTC4Xn19OL+LvVkEdR+DT1T9jPYU+lL35Dkj0CBifCwt5 OXJoe2pOs1DbhzYl+izKUaa9DlKobc+KfFNGs7/xcmE5cVa7mHVW7zVYx6RNnAv4qV l4rc1SEPn7RYVYFF3DYvkSCas16oEbCSFUiSTFbU= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 17 Oct 2017 15:21:25 +1100 Message-Id: <20171017042152.29443-8-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171017042152.29443-1-david@gibson.dropbear.id.au> References: <20171017042152.29443-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 07/34] target/ppc: Fix carry flag setting for shift algebraic instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: agraf@suse.de, ehabkost@redhat.com, Sandipan Das , qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Sandipan Das For POWER ISA v3.0, the XER bit CA32 needs to be set by the shift right algebraic instructions whenever the CA bit is to be set. This change affects the following instructions: * Shift Right Algebraic Word (sraw[.]) * Shift Right Algebraic Word Immediate (srawi[.]) * Shift Right Algebraic Doubleword (srad[.]) * Shift Right Algebraic Doubleword Immediate (sradi[.]) Signed-off-by: Sandipan Das Reviewed-by: Richard Henderson Signed-off-by: David Gibson --- target/ppc/int_helper.c | 16 ++++++++-------- target/ppc/translate.c | 12 ++++++++++++ 2 files changed, 20 insertions(+), 8 deletions(-) diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index da4e1a62c9..1c013a0ee3 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -219,17 +219,17 @@ target_ulong helper_sraw(CPUPPCState *env, target_ulo= ng value, shift &=3D 0x1f; ret =3D (int32_t)value >> shift; if (likely(ret >=3D 0 || (value & ((1 << shift) - 1)) =3D=3D 0= )) { - env->ca =3D 0; + env->ca32 =3D env->ca =3D 0; } else { - env->ca =3D 1; + env->ca32 =3D env->ca =3D 1; } } else { ret =3D (int32_t)value; - env->ca =3D 0; + env->ca32 =3D env->ca =3D 0; } } else { ret =3D (int32_t)value >> 31; - env->ca =3D (ret !=3D 0); + env->ca32 =3D env->ca =3D (ret !=3D 0); } return (target_long)ret; } @@ -245,17 +245,17 @@ target_ulong helper_srad(CPUPPCState *env, target_ulo= ng value, shift &=3D 0x3f; ret =3D (int64_t)value >> shift; if (likely(ret >=3D 0 || (value & ((1ULL << shift) - 1)) =3D= =3D 0)) { - env->ca =3D 0; + env->ca32 =3D env->ca =3D 0; } else { - env->ca =3D 1; + env->ca32 =3D env->ca =3D 1; } } else { ret =3D (int64_t)value; - env->ca =3D 0; + env->ca32 =3D env->ca =3D 0; } } else { ret =3D (int64_t)value >> 63; - env->ca =3D (ret !=3D 0); + env->ca32 =3D env->ca =3D (ret !=3D 0); } return ret; } diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 606b605ba0..a81ff69d75 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -2181,6 +2181,9 @@ static void gen_srawi(DisasContext *ctx) if (sh =3D=3D 0) { tcg_gen_ext32s_tl(dst, src); tcg_gen_movi_tl(cpu_ca, 0); + if (is_isa300(ctx)) { + tcg_gen_movi_tl(cpu_ca32, 0); + } } else { TCGv t0; tcg_gen_ext32s_tl(dst, src); @@ -2190,6 +2193,9 @@ static void gen_srawi(DisasContext *ctx) tcg_gen_and_tl(cpu_ca, cpu_ca, t0); tcg_temp_free(t0); tcg_gen_setcondi_tl(TCG_COND_NE, cpu_ca, cpu_ca, 0); + if (is_isa300(ctx)) { + tcg_gen_mov_tl(cpu_ca32, cpu_ca); + } tcg_gen_sari_tl(dst, dst, sh); } if (unlikely(Rc(ctx->opcode) !=3D 0)) { @@ -2259,6 +2265,9 @@ static inline void gen_sradi(DisasContext *ctx, int n) if (sh =3D=3D 0) { tcg_gen_mov_tl(dst, src); tcg_gen_movi_tl(cpu_ca, 0); + if (is_isa300(ctx)) { + tcg_gen_movi_tl(cpu_ca32, 0); + } } else { TCGv t0; tcg_gen_andi_tl(cpu_ca, src, (1ULL << sh) - 1); @@ -2267,6 +2276,9 @@ static inline void gen_sradi(DisasContext *ctx, int n) tcg_gen_and_tl(cpu_ca, cpu_ca, t0); tcg_temp_free(t0); tcg_gen_setcondi_tl(TCG_COND_NE, cpu_ca, cpu_ca, 0); + if (is_isa300(ctx)) { + tcg_gen_mov_tl(cpu_ca32, cpu_ca); + } tcg_gen_sari_tl(dst, src, sh); } if (unlikely(Rc(ctx->opcode) !=3D 0)) { --=20 2.13.6