From nobody Wed Feb 11 02:54:43 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1508215209716999.9059391876716; Mon, 16 Oct 2017 21:40:09 -0700 (PDT) Received: from localhost ([::1]:36422 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e4Jfc-0006cX-3G for importer@patchew.org; Tue, 17 Oct 2017 00:40:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50615) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e4JOZ-0008Mb-6u for qemu-devel@nongnu.org; Tue, 17 Oct 2017 00:22:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e4JOW-00072N-Av for qemu-devel@nongnu.org; Tue, 17 Oct 2017 00:22:23 -0400 Received: from ozlabs.org ([103.22.144.67]:47799) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e4JOV-0006x0-Hh; Tue, 17 Oct 2017 00:22:20 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3yGMTv415hz9t42; Tue, 17 Oct 2017 15:22:08 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1508214131; bh=so1Ck+mMPFYb0RFPgNno7trIpwGRStXs8kHG0Xyd4Qg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IsYO0COLwuNVI2aeENhE555aM79m4AdVHe6ku6rZzYLDNEcaYWk2on6CUjS+ivVot wpWDXK5HI21ugcbENDK+6eQj5+SywNJyUWOa6QCY+TSV2Q7dkHOjEYerjqvJrIS7mp GYODmchVDRt6iEFtKP8Jvf12pnVEeuhumnGyjEMY= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 17 Oct 2017 15:21:37 +1100 Message-Id: <20171017042152.29443-20-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171017042152.29443-1-david@gibson.dropbear.id.au> References: <20171017042152.29443-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [PULL 19/34] ppc: move '-cpu foo, compat=xxx' parsing into ppc_cpu_parse_featurestr() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: agraf@suse.de, ehabkost@redhat.com, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, imammedo@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov there is a dedicated callback CPUClass::parse_features which purpose is to convert -cpu features into a set of global properties AND deal with compat/legacy features that couldn't be directly translated into CPU's properties. Create ppc variant of it (ppc_cpu_parse_featurestr) and move 'compat=3Dval' handling from spapr_cpu_core.c into it. That removes a dependency of board/core code on cpu_model parsing and would let to reuse common -cpu parsing introduced by 6063d4c0 Set "max-cpu-compat" property only if it exists, in practice it should limit 'compat' hack to spapr machine and allow to avoid including machine/spapr headers in target/ppc/cpu.c Signed-off-by: Igor Mammedov Signed-off-by: David Gibson --- hw/ppc/spapr.c | 2 +- hw/ppc/spapr_cpu_core.c | 50 --------------------------------------- include/hw/ppc/spapr.h | 1 - target/ppc/cpu-qom.h | 1 + target/ppc/translate_init.c | 57 +++++++++++++++++++++++++++++++++++++++++= ++++ 5 files changed, 59 insertions(+), 52 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 147fd2cfd3..112dd91348 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2373,7 +2373,7 @@ static void ppc_spapr_init(MachineState *machine) machine->cpu_model =3D kvm_enabled() ? "host" : smc->tcg_default_c= pu; } =20 - spapr_cpu_parse_features(spapr); + cpu_parse_cpu_model(TYPE_POWERPC_CPU, machine->cpu_model); =20 spapr_set_vsmt_mode(spapr, &error_fatal); =20 diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 79a9615080..b6610dd431 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -21,56 +21,6 @@ #include "sysemu/hw_accel.h" #include "qemu/error-report.h" =20 -void spapr_cpu_parse_features(sPAPRMachineState *spapr) -{ - /* - * Backwards compatibility hack: - * - * CPUs had a "compat=3D" property which didn't make sense for - * anything except pseries. It was replaced by "max-cpu-compat" - * machine option. This supports old command lines like - * -cpu POWER8,compat=3Dpower7 - * By stripping the compat option and applying it to the machine - * before passing it on to the cpu level parser. - */ - gchar **inpieces; - gchar *newprops; - int i, j; - gchar *compat_str =3D NULL; - - inpieces =3D g_strsplit(MACHINE(spapr)->cpu_model, ",", 0); - - /* inpieces[0] is the actual model string */ - i =3D 1; - j =3D 1; - while (inpieces[i]) { - if (g_str_has_prefix(inpieces[i], "compat=3D")) { - /* in case of multiple compat=3D options */ - g_free(compat_str); - compat_str =3D inpieces[i]; - } else { - j++; - } - - i++; - /* Excise compat options from list */ - inpieces[j] =3D inpieces[i]; - } - - if (compat_str) { - char *val =3D compat_str + strlen("compat=3D"); - - object_property_set_str(OBJECT(spapr), val, "max-cpu-compat", - &error_fatal); - - } - - newprops =3D g_strjoinv(",", inpieces); - cpu_parse_cpu_model(TYPE_POWERPC_CPU, newprops); - g_free(newprops); - g_strfreev(inpieces); -} - static void spapr_cpu_reset(void *opaque) { PowerPCCPU *cpu =3D opaque; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index c1b365f564..8ca4f9498f 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -659,7 +659,6 @@ void spapr_hotplug_req_add_by_count_indexed(sPAPRDRConn= ectorType drc_type, uint32_t count, uint32_t index= ); void spapr_hotplug_req_remove_by_count_indexed(sPAPRDRConnectorType drc_ty= pe, uint32_t count, uint32_t in= dex); -void spapr_cpu_parse_features(sPAPRMachineState *spapr); int spapr_hpt_shift_for_ramsize(uint64_t ramsize); void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift, Error **errp); diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h index d0cf6ca2a9..429b47f959 100644 --- a/target/ppc/cpu-qom.h +++ b/target/ppc/cpu-qom.h @@ -181,6 +181,7 @@ typedef struct PowerPCCPUClass { DeviceRealize parent_realize; DeviceUnrealize parent_unrealize; void (*parent_reset)(CPUState *cpu); + void (*parent_parse_features)(const char *type, char *str, Error **err= p); =20 uint32_t pvr; bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr); diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 0d6379fcc5..3d16481ca1 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10097,6 +10097,61 @@ static ObjectClass *ppc_cpu_class_by_name(const ch= ar *name) return NULL; } =20 +static void ppc_cpu_parse_featurestr(const char *type, char *features, + Error **errp) +{ + Object *machine =3D qdev_get_machine(); + const PowerPCCPUClass *pcc =3D POWERPC_CPU_CLASS(object_class_by_name(= type)); + + if (!features) { + return; + } + + if (object_property_find(machine, "max-cpu-compat", NULL)) { + int i; + char **inpieces; + char *s =3D features; + Error *local_err =3D NULL; + char *compat_str =3D NULL; + + /* + * Backwards compatibility hack: + * + * CPUs had a "compat=3D" property which didn't make sense for + * anything except pseries. It was replaced by "max-cpu-compat" + * machine option. This supports old command lines like + * -cpu POWER8,compat=3Dpower7 + * By stripping the compat option and applying it to the machine + * before passing it on to the cpu level parser. + */ + inpieces =3D g_strsplit(features, ",", 0); + *s =3D '\0'; + for (i =3D 0; inpieces[i]; i++) { + if (g_str_has_prefix(inpieces[i], "compat=3D")) { + compat_str =3D inpieces[i]; + continue; + } + if ((i !=3D 0) && (s !=3D features)) { + s =3D g_stpcpy(s, ","); + } + s =3D g_stpcpy(s, inpieces[i]); + } + + if (compat_str) { + char *v =3D compat_str + strlen("compat=3D"); + object_property_set_str(machine, v, "max-cpu-compat", &local_e= rr); + } + g_strfreev(inpieces); + if (local_err) { + error_propagate(errp, local_err); + return; + } + } + + /* do property processing with generic handler */ + pcc->parent_parse_features(type, features, errp); +} + const char *ppc_cpu_lookup_alias(const char *alias) { int ai; @@ -10489,6 +10544,8 @@ static void ppc_cpu_class_init(ObjectClass *oc, voi= d *data) cc->reset =3D ppc_cpu_reset; =20 cc->class_by_name =3D ppc_cpu_class_by_name; + pcc->parent_parse_features =3D cc->parse_features; + cc->parse_features =3D ppc_cpu_parse_featurestr; cc->has_work =3D ppc_cpu_has_work; cc->do_interrupt =3D ppc_cpu_do_interrupt; cc->cpu_exec_interrupt =3D ppc_cpu_exec_interrupt; --=20 2.13.6