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X-Received-From: 2607:f8b0:400d:c09::243 Subject: [Qemu-devel] [PATCH v4 3/6] mips: split cpu_mips_realize_env() out of cpu_mips_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , James Hogan , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 so it can be used in mips_cpu_realizefn() in the next commit Signed-off-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Igor Mammedov Tested-by: James Hogan Reviewed-by: Eduardo Habkost --- target/mips/internal.h | 1 + target/mips/translate.c | 19 ++++++++++++------- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index 91c2df4537..cf4c9db427 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -132,6 +132,7 @@ void mips_tcg_init(void); =20 /* TODO QOM'ify CPU reset and remove */ void cpu_state_reset(CPUMIPSState *s); +void cpu_mips_realize_env(CPUMIPSState *env); =20 /* cp0_timer.c */ uint32_t cpu_mips_get_random(CPUMIPSState *env); diff --git a/target/mips/translate.c b/target/mips/translate.c index f0febaf1b2..5fc7979ac5 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20512,6 +20512,17 @@ void mips_tcg_init(void) =20 #include "translate_init.c" =20 +void cpu_mips_realize_env(CPUMIPSState *env) +{ + env->exception_base =3D (int32_t)0xBFC00000; + +#ifndef CONFIG_USER_ONLY + mmu_init(env, env->cpu_model); +#endif + fpu_init(env, env->cpu_model); + mvp_init(env, env->cpu_model); +} + MIPSCPU *cpu_mips_init(const char *cpu_model) { MIPSCPU *cpu; @@ -20524,13 +20535,7 @@ MIPSCPU *cpu_mips_init(const char *cpu_model) cpu =3D MIPS_CPU(object_new(TYPE_MIPS_CPU)); env =3D &cpu->env; env->cpu_model =3D def; - env->exception_base =3D (int32_t)0xBFC00000; - -#ifndef CONFIG_USER_ONLY - mmu_init(env, def); -#endif - fpu_init(env, def); - mvp_init(env, def); + cpu_mips_realize_env(env); =20 object_property_set_bool(OBJECT(cpu), true, "realized", NULL); =20 --=20 2.14.1