From nobody Tue Nov 4 05:39:03 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505772753500378.00274605539346; Mon, 18 Sep 2017 15:12:33 -0700 (PDT) Received: from localhost ([::1]:39127 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1du4HI-0007Ta-Dw for importer@patchew.org; Mon, 18 Sep 2017 18:12:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58191) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1du4GU-000711-8x for qemu-devel@nongnu.org; Mon, 18 Sep 2017 18:11:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1du4GQ-0006Wm-Pc for qemu-devel@nongnu.org; Mon, 18 Sep 2017 18:11:42 -0400 Received: from mail-qt0-x243.google.com ([2607:f8b0:400d:c0d::243]:33834) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1du4GQ-0006We-Jt; Mon, 18 Sep 2017 18:11:38 -0400 Received: by mail-qt0-x243.google.com with SMTP id q8so1254271qtb.1; Mon, 18 Sep 2017 15:11:38 -0700 (PDT) Received: from yoga.offpageads.com ([181.93.89.178]) by smtp.gmail.com with ESMTPSA id c185sm5707466qke.60.2017.09.18.15.11.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 18 Sep 2017 15:11:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=j3SemFttz/fP/BSEkWT3MeAAWs3qR7tZGNKqEagS+/s=; b=mPp1CORk3fwOR8RFWuNjcvwGYjWDuNhZZFHbVR7aiBoiZ28pQOo/XDOvk3TropE4OE WZykck/WCZjxmgjdBMFO50ns2HI8m+n4tw3Ed6z2Psnf/HDfsnz/6X4cKGFIKjwHRrN6 zNv6IsWIAZ5HWU5WuPogMF/2Q4Rm7zR9pFS95H1nH/ca0b5GskRCU8Pg897DlJ3UDwm1 gMA3ah1RhFYTuEAbZe7kfwxqRsivWmNyg2JtXR7jhfCsgZBuZImeRqMB+zldsloOzX23 Mq3gUWYhyYUAeorkZ5PxHRMI+Fw2DCdtdC1w/J186KYCOTyMep+1mcKr5RB+tg/1rqUi +0nA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=j3SemFttz/fP/BSEkWT3MeAAWs3qR7tZGNKqEagS+/s=; b=HCIoiXAZh/fd0xF5D8az+KeueiulUf7SwnxrC6EDyYFxgNTSDUFOnoOmuRB0MFnmVQ 0j9b+Yr7qxOi1fsQ3d90mzEC/VmVOEiLqzryCuTewXUOebZV4gnI3Qf7GN79vu41ojpK OS52sMMxdC+5qeTw1Xp4oqo6IjgzIo3Ew+vX7CDAnJkEXYlUt/ohADoWqwh/knGkj8+R G6AMYUTFGNbeY/pn6DiU02nUDdrnihTJH/D6qpsvy53cPxm3OJm977ChLtD/pUhEutVV U2vG1qDRKc4grqKwMnaqBBENDtxvUdDxdWNb82DKTpTYO17/447Xii6dfmTlM99UOLO0 jGqw== X-Gm-Message-State: AHPjjUhddP/BZsZm+3C4s8r8JQEwikva7na/xi3AKJIfG/3sP+Xc0rcf 3YsX5urAsY9285K9pTiWXA== X-Google-Smtp-Source: AOwi7QAvV/hiqGe5FHMtPhrTclILL1bwR4UafOi98UvJ9CJFMfjb1zSF2Xov2hQaOH2u4/2dxurdfg== X-Received: by 10.200.6.141 with SMTP id f13mr15629440qth.328.1505772698129; Mon, 18 Sep 2017 15:11:38 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Igor Mammedov , Eduardo Habkost , Subbaraya Sundeep , Alistair Francis , Peter Maydell Date: Mon, 18 Sep 2017 19:11:24 -0300 Message-Id: <20170918221124.17159-1-f4bug@amsat.org> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PATCH] msf2: drop cpu_model to directly use cpu type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, Fam Zheng , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- after Igor comment: http://lists.nongnu.org/archive/html/qemu-devel/2017-09/msg04709.html Fam: I'm trying your patchew "apply over series" feature on these 2 series, hoping they get both applied before my patch: Based-on: 1505318697-77161-6-git-send-email-imammedo@redhat.com Based-on: 1505762601-27143-6-git-send-email-sundeep.lkml@gmail.com include/hw/arm/msf2-soc.h | 1 + hw/arm/msf2-soc.c | 3 ++- hw/arm/msf2-som.c | 11 +++++++++++ 3 files changed, 14 insertions(+), 1 deletion(-) diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h index afea23db38..3cfe5c76ee 100644 --- a/include/hw/arm/msf2-soc.h +++ b/include/hw/arm/msf2-soc.h @@ -50,6 +50,7 @@ typedef struct MSF2State { =20 ARMv7MState armv7m; =20 + char *cpu_type; char *part_name; uint64_t envm_size; uint64_t esram_size; diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index abba3d888b..6f97fa9fe3 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -111,7 +111,7 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Er= ror **errp) =20 armv7m =3D DEVICE(&s->armv7m); qdev_prop_set_uint32(armv7m, "num-irq", 81); - qdev_prop_set_string(armv7m, "cpu-model", "cortex-m3"); + qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type); object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory(= )), "memory", &error_abort); object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); @@ -201,6 +201,7 @@ static Property m2sxxx_soc_properties[] =3D { * part name specifies the type of SmartFusion2 device variant(this * property is for information purpose only. */ + DEFINE_PROP_STRING("cpu-type", MSF2State, cpu_type), DEFINE_PROP_STRING("part-name", MSF2State, part_name), DEFINE_PROP_UINT64("eNVM-size", MSF2State, envm_size, MSF2_ENVM_MAX_SI= ZE), DEFINE_PROP_UINT64("eSRAM-size", MSF2State, esram_size, diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index d3956965ab..0795a3a3a1 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -24,11 +24,13 @@ =20 #include "qemu/osdep.h" #include "qapi/error.h" +#include "qemu/error-report.h" #include "hw/boards.h" #include "hw/arm/arm.h" #include "exec/address-spaces.h" #include "qemu/cutils.h" #include "hw/arm/msf2-soc.h" +#include "cpu.h" =20 #define DDR_BASE_ADDRESS 0xA0000000 #define DDR_SIZE (64 * M_BYTE) @@ -41,18 +43,26 @@ static void emcraft_sf2_s2s010_init(MachineState *machi= ne) DeviceState *dev; DeviceState *spi_flash; MSF2State *soc; + MachineClass *mc =3D MACHINE_GET_CLASS(machine); DriveInfo *dinfo =3D drive_get_next(IF_MTD); qemu_irq cs_line; SSIBus *spi_bus; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *ddr =3D g_new(MemoryRegion, 1); =20 + if (strcmp(machine->cpu_type, mc->default_cpu_type) !=3D 0) { + error_report("This board can only be used with CPU %s", + mc->default_cpu_type); + } + memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE, &error_fatal); memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr); =20 dev =3D qdev_create(NULL, TYPE_MSF2_SOC); qdev_prop_set_string(dev, "part-name", "M2S010"); + qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type); + qdev_prop_set_uint64(dev, "eNVM-size", M2S010_ENVM_SIZE); qdev_prop_set_uint64(dev, "eSRAM-size", M2S010_ESRAM_SIZE); =20 @@ -89,6 +99,7 @@ static void emcraft_sf2_machine_init(MachineClass *mc) { mc->desc =3D "SmartFusion2 SOM kit from Emcraft (M2S010)"; mc->init =3D emcraft_sf2_s2s010_init; + mc->default_cpu_type =3D ARM_CPU_TYPE_NAME("cortex-m3"); } =20 DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init) --=20 2.14.1