From nobody Wed Nov 5 05:27:30 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 150576494014986.2456932997103; Mon, 18 Sep 2017 13:02:20 -0700 (PDT) Received: from localhost ([::1]:38676 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1du2FH-0007hK-AG for importer@patchew.org; Mon, 18 Sep 2017 16:02:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37571) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1du251-00071V-9e for qemu-devel@nongnu.org; Mon, 18 Sep 2017 15:51:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1du250-0006PA-7t for qemu-devel@nongnu.org; Mon, 18 Sep 2017 15:51:43 -0400 Received: from mail-pf0-x243.google.com ([2607:f8b0:400e:c00::243]:33802) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1du24x-0006Lm-HO; Mon, 18 Sep 2017 15:51:39 -0400 Received: by mail-pf0-x243.google.com with SMTP id g65so597786pfe.1; Mon, 18 Sep 2017 12:51:39 -0700 (PDT) Received: from squirtle.westlake.spaceflightindustries.com ([173.226.206.194]) by smtp.gmail.com with ESMTPSA id d186sm200791pfd.117.2017.09.18.12.51.37 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 18 Sep 2017 12:51:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6p+10rc6YYbqewfpta9jJYHFIPg1mG9RV6MDxk6YOZ8=; b=a7UzIfMsFNGTXAB0BbaoMxuT96Lb+A1N7MMP93Vxmt1E/BPd78mQ+Z65FFGiTsYHfi XDXGg80TqHaumhUfW0wE5v79OXC3RuZ7BB1Mv8uXfKmaljU1ii0dfmYvdQ4TiY1qgkfQ QtB7XUuXS9HH4GlTkWw48FKQFEAf/rTWYoYDO09R2h/XX0T3G+2ZigfeV9eLT81ck2xY /4HtRS+t4uJpeeCxPVTpC+ooNWTHYb/sv/u9HVCs5rmEZwZ1zSfGRzjDEIi6qCsZdqfS Uzr8bL347zY/jOCu6sM+PAAUyHDJ9gup+NQn7pU9OcrRw6cGaj65pHw1SjV+S02YrsC5 KaEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6p+10rc6YYbqewfpta9jJYHFIPg1mG9RV6MDxk6YOZ8=; b=g9a3owYbUuklV5f4F2qF5FmZzRJTFU6hJvySpZ2yZktykzDacCT1+ChtIjC50rAdei QLR62qM1/XwkCDxP9mZ5CDxo9w5ItyCUhakchUrwbpkxlfRot8uHZZU8ThKabKAmMitO MSGoVSIwdIzHPKmZJ6C2j8XoiGXQMwc4ZXIpnV/Eqt06Kxd3mnA7eDHGvLlK4R8qROWt 8D8v4FVSinDM5TqUKmvkDLUb8kjhIkY6evF+ykcNCCyEZpNMJunw1Rg1qXcyBKF+vWoG ljypncQoyqUzvWkqvy/wO+dxgQLgW6Zo4BQAh99WqgyyGuwGdMaAmUUIInEV2W+NCp9x KNvQ== X-Gm-Message-State: AHPjjUix6phkDG42xMMI+Gmn5Yu9t3knfnnoIF6WiHSA25I1bMXoHiC3 A38MvYJFERC9gGw5dvo= X-Google-Smtp-Source: ADKCNb5wG7SdaukUOnoeF8cX6LGFVIZzG8fTHTCbseNX33yq+xeESfFnXTKKIipEUdS07UrHBA3mqw== X-Received: by 10.84.225.134 with SMTP id u6mr36332223plj.177.1505764298282; Mon, 18 Sep 2017 12:51:38 -0700 (PDT) From: Andrey Smirnov To: qemu-arm@nongnu.org Date: Mon, 18 Sep 2017 12:50:57 -0700 Message-Id: <20170918195100.17593-15-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170918195100.17593-1-andrew.smirnov@gmail.com> References: <20170918195100.17593-1-andrew.smirnov@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::243 Subject: [Qemu-devel] [PATCH 14/17] i.MX7: Add code to emulate SNVS IP-block X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrey Smirnov , Peter Maydell , qemu-devel@nongnu.org, yurovsky@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add code to emulate SNVS IP-block. Currently only the bits needed to be able to emulate machine shutdown are implemented. Cc: Peter Maydell Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Cc: yurovsky@gmail.com Signed-off-by: Andrey Smirnov --- hw/misc/Makefile.objs | 1 + hw/misc/imx7_snvs.c | 84 +++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/misc/imx7_snvs.h | 35 +++++++++++++++++++ 3 files changed, 120 insertions(+) create mode 100644 hw/misc/imx7_snvs.c create mode 100644 include/hw/misc/imx7_snvs.h diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index c393a93456..16cee88e0f 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -36,6 +36,7 @@ obj-$(CONFIG_IMX) +=3D imx6_ccm.o obj-$(CONFIG_IMX) +=3D imx6_src.o obj-$(CONFIG_IMX) +=3D imx7_ccm.o obj-$(CONFIG_IMX) +=3D imx2_wdt.o +obj-$(CONFIG_IMX) +=3D imx7_snvs.o obj-$(CONFIG_MILKYMIST) +=3D milkymist-hpdmc.o obj-$(CONFIG_MILKYMIST) +=3D milkymist-pfpu.o obj-$(CONFIG_MAINSTONE) +=3D mst_fpga.o diff --git a/hw/misc/imx7_snvs.c b/hw/misc/imx7_snvs.c new file mode 100644 index 0000000000..efce0a760f --- /dev/null +++ b/hw/misc/imx7_snvs.c @@ -0,0 +1,84 @@ +/* + * IMX7 Secure Non-Volatile Storage + * + * Copyright (c) 2017, Impinj, Inc. + * + * Author: Andrey Smirnov + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + * + * Bare minimum emulation code needed to support being able to shut + * down linux guest gracefully. + */ + +#include "qemu/osdep.h" +#include "qemu/sizes.h" +#include "hw/misc/imx7_snvs.h" +#include "qemu/log.h" +#include "sysemu/sysemu.h" + +static uint64_t imx7_snvs_read(void *opaque, hwaddr offset, unsigned size) +{ + return 0; +} + +static void imx7_snvs_write(void *opaque, hwaddr offset, + uint64_t v, unsigned size) +{ + const uint32_t value =3D v; + const uint32_t mask =3D SNVS_LPCR_TOP | SNVS_LPCR_DP_EN; + + if (offset =3D=3D SNVS_LPCR && ((value & mask) =3D=3D mask)) { + qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); + } +} + +static const struct MemoryRegionOps imx7_snvs_ops =3D { + .read =3D imx7_snvs_read, + .write =3D imx7_snvs_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .valid =3D { + /* + * Our device would not work correctly if the guest was doing + * unaligned access. This might not be a limitation on the real + * device but in practice there is no reason for a guest to access + * this device unaligned. + */ + .min_access_size =3D 4, + .max_access_size =3D 4, + .unaligned =3D false, + }, +}; + +static void imx7_snvs_init(Object *obj) +{ + SysBusDevice *sd =3D SYS_BUS_DEVICE(obj); + IMX7SNVSState *s =3D IMX7_SNVS(obj); + + memory_region_init_io(&s->mmio, obj, &imx7_snvs_ops, s, + TYPE_IMX7_SNVS, 0x1000); + + sysbus_init_mmio(sd, &s->mmio); +} + +static void imx7_snvs_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->desc =3D "i.MX7 Secure Non-Volatile Storage Module"; +} + +static const TypeInfo imx7_snvs_info =3D { + .name =3D TYPE_IMX7_SNVS, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(IMX7SNVSState), + .instance_init =3D imx7_snvs_init, + .class_init =3D imx7_snvs_class_init, +}; + +static void imx7_snvs_register_type(void) +{ + type_register_static(&imx7_snvs_info); +} +type_init(imx7_snvs_register_type) diff --git a/include/hw/misc/imx7_snvs.h b/include/hw/misc/imx7_snvs.h new file mode 100644 index 0000000000..255f8f26f9 --- /dev/null +++ b/include/hw/misc/imx7_snvs.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2017, Impinj, Inc. + * + * i.MX7 SNVS block emulation code + * + * Author: Andrey Smirnov + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#ifndef IMX7_SNVS_H +#define IMX7_SNVS_H + +#include "qemu/bitops.h" +#include "hw/sysbus.h" + + +enum IMX7SNVSRegisters { + SNVS_LPCR =3D 0x38, + SNVS_LPCR_TOP =3D BIT(6), + SNVS_LPCR_DP_EN =3D BIT(5) +}; + +#define TYPE_IMX7_SNVS "imx7.snvs" +#define IMX7_SNVS(obj) OBJECT_CHECK(IMX7SNVSState, (obj), TYPE_IMX7_SNVS) + +typedef struct IMX7SNVSState { + /* */ + SysBusDevice parent_obj; + + MemoryRegion mmio; +} IMX7SNVSState; + +#endif /* IMX7_SNVS_H */ --=20 2.13.5