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[189.204.159.162]) by smtp.gmail.com with ESMTPSA id j2sm5348789oia.20.2017.09.17.08.05.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 17 Sep 2017 08:05:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=44CGflEyoqKCNj+sQLdDI3BoRRqpPcf6b3WMmfhqIio=; b=ZKaGIHLob0IsYylWyDBqLwG6hlu6NtTfniHVKp+JPVpfrxbvNX9u3xZpd4QeO78alE 5wU6PvpWZ+yhtrK4IFTBF5B24lS0B4WE9/kqu6ZLNhL2v2S9LBgqrH85QpeeFP+4vVhS 8B3VgIphB+qgqOxDhbzTRZlT4EClGknGUacp4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=44CGflEyoqKCNj+sQLdDI3BoRRqpPcf6b3WMmfhqIio=; b=Qa9brsItr9PImtsA2xi3iL7oHTPdnTdfFUG+KXlXr9qAb3FJrFK5vv89uVpvbHjyBr 1An6PWOW6641B33tOfn4sY1hVdUzE87Atj5kM96heR93IBWP0TYtqF3gYCmCaaB0HQkQ kxBd4ngY4Hl7EQdatTgXzjiXBF/+kZ5U/NdpFZuiEwjRFnA/geVnDqptmHtD3nwFFBcl j+tXaYYD6DS7ctxREbKTKcL6tRCQ0HZ0eCLLzqQMa9p+Wynz1hW6rmWF9J4QCnoro+L2 VXbR7gET+hfmUYmNiSEybOK2J332ysrWdzN1tWKIWPRt9GLAiaOBQZcNMNHXZ+15msKH Q7Qg== X-Gm-Message-State: AHPjjUiMT7tOcKGd0gi+PvpKFhYHv+MfkEUBb94JICYED7KUjZC9LfX1 D48/EJRqx8auBITNqxr3Zg== X-Google-Smtp-Source: AOwi7QAG7E4cy+S4eH7T1KbC3YmSAhGKtXqMaarz+qmY37WX3FcPrEONqQNOqwvjN3H+S/qSKa084A== X-Received: by 10.202.196.197 with SMTP id u188mr30680992oif.228.1505660756750; Sun, 17 Sep 2017 08:05:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 17 Sep 2017 08:05:27 -0700 Message-Id: <20170917150535.8284-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170917150535.8284-1-richard.henderson@linaro.org> References: <20170917150535.8284-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4003:c06::230 Subject: [Qemu-devel] [PULL 09/17] tcg: Remove tcg_regset_set X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/tcg.h | 1 - tcg/mips/tcg-target.inc.c | 47 ++++++++++++++++++++++++-------------------= ---- tcg/tcg.c | 8 ++++---- 3 files changed, 28 insertions(+), 28 deletions(-) diff --git a/tcg/tcg.h b/tcg/tcg.h index 6525e51c21..5bf67678d5 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -186,7 +186,6 @@ typedef enum TCGOpcode { NB_OPS, } TCGOpcode; =20 -#define tcg_regset_set(d, s) (d) =3D (s) #define tcg_regset_set32(d, reg, val32) (d) |=3D (val32) << (reg) #define tcg_regset_set_reg(d, r) (d) |=3D 1L << (r) #define tcg_regset_reset_reg(d, r) (d) &=3D ~(1L << (r)) diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 85c1abd14b..1c09ec7d5b 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -195,11 +195,11 @@ static const char *target_parse_constraint(TCGArgCons= traint *ct, switch(*ct_str++) { case 'r': ct->ct |=3D TCG_CT_REG; - tcg_regset_set(ct->u.regs, 0xffffffff); + ct->u.regs =3D 0xffffffff; break; case 'L': /* qemu_ld input arg constraint */ ct->ct |=3D TCG_CT_REG; - tcg_regset_set(ct->u.regs, 0xffffffff); + ct->u.regs =3D 0xffffffff; tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0); #if defined(CONFIG_SOFTMMU) if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { @@ -209,7 +209,7 @@ static const char *target_parse_constraint(TCGArgConstr= aint *ct, break; case 'S': /* qemu_st constraint */ ct->ct |=3D TCG_CT_REG; - tcg_regset_set(ct->u.regs, 0xffffffff); + ct->u.regs =3D 0xffffffff; tcg_regset_reset_reg(ct->u.regs, TCG_REG_A0); #if defined(CONFIG_SOFTMMU) if (TCG_TARGET_REG_BITS < TARGET_LONG_BITS) { @@ -2607,27 +2607,28 @@ static void tcg_target_qemu_prologue(TCGContext *s) static void tcg_target_init(TCGContext *s) { tcg_target_detect_isa(); - tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I32], 0xffffffff); + tcg_target_available_regs[TCG_TYPE_I32] =3D 0xffffffff; if (TCG_TARGET_REG_BITS =3D=3D 64) { - tcg_regset_set(tcg_target_available_regs[TCG_TYPE_I64], 0xffffffff= ); - } - tcg_regset_set(tcg_target_call_clobber_regs, - (1 << TCG_REG_V0) | - (1 << TCG_REG_V1) | - (1 << TCG_REG_A0) | - (1 << TCG_REG_A1) | - (1 << TCG_REG_A2) | - (1 << TCG_REG_A3) | - (1 << TCG_REG_T0) | - (1 << TCG_REG_T1) | - (1 << TCG_REG_T2) | - (1 << TCG_REG_T3) | - (1 << TCG_REG_T4) | - (1 << TCG_REG_T5) | - (1 << TCG_REG_T6) | - (1 << TCG_REG_T7) | - (1 << TCG_REG_T8) | - (1 << TCG_REG_T9)); + tcg_target_available_regs[TCG_TYPE_I64] =3D 0xffffffff; + } + + tcg_target_call_clobber_regs =3D 0; + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_V0); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_V1); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A0); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A1); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A2); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_A3); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T0); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T1); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T2); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T3); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T4); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T5); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T6); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T7); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T8); + tcg_regset_set_reg(tcg_target_call_clobber_regs, TCG_REG_T9); =20 s->reserved_regs =3D 0; tcg_regset_set_reg(s->reserved_regs, TCG_REG_ZERO); /* zero register */ diff --git a/tcg/tcg.c b/tcg/tcg.c index 9eeaba9529..a4badcc85f 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2362,7 +2362,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TC= GOpDef *def, TCGTemp *ts, *ots; TCGType otype, itype; =20 - tcg_regset_set(allocated_regs, s->reserved_regs); + allocated_regs =3D s->reserved_regs; ots =3D &s->temps[args[0]]; ts =3D &s->temps[args[1]]; =20 @@ -2450,8 +2450,8 @@ static void tcg_reg_alloc_op(TCGContext *s, args + nb_oargs + nb_iargs,=20 sizeof(TCGArg) * def->nb_cargs); =20 - tcg_regset_set(i_allocated_regs, s->reserved_regs); - tcg_regset_set(o_allocated_regs, s->reserved_regs); + i_allocated_regs =3D s->reserved_regs; + o_allocated_regs =3D s->reserved_regs; =20 /* satisfy input constraints */=20 for(k =3D 0; k < nb_iargs; k++) { @@ -2651,7 +2651,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_= oargs, int nb_iargs, } =20 /* assign input registers */ - tcg_regset_set(allocated_regs, s->reserved_regs); + allocated_regs =3D s->reserved_regs; for(i =3D 0; i < nb_regs; i++) { arg =3D args[nb_oargs + i]; if (arg !=3D TCG_CALL_DUMMY_ARG) { --=20 2.13.5