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X-Received-From: 2607:f8b0:400e:c05::22e Subject: [Qemu-devel] [PATCH 01/10] target/i386: Convert to disas_set_info hook X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- disas.c | 22 ++-------------------- monitor.c | 21 --------------------- target/i386/cpu.c | 12 ++++++++++++ target/i386/translate.c | 8 +------- 4 files changed, 15 insertions(+), 48 deletions(-) diff --git a/disas.c b/disas.c index d6a1eb9c8e..2be716fdb2 100644 --- a/disas.c +++ b/disas.c @@ -205,16 +205,7 @@ void target_disas(FILE *out, CPUState *cpu, target_ulo= ng code, cc->disas_set_info(cpu, &s.info); } =20 -#if defined(TARGET_I386) - if (flags =3D=3D 2) { - s.info.mach =3D bfd_mach_x86_64; - } else if (flags =3D=3D 1) { - s.info.mach =3D bfd_mach_i386_i8086; - } else { - s.info.mach =3D bfd_mach_i386_i386; - } - s.info.print_insn =3D print_insn_i386; -#elif defined(TARGET_PPC) +#if defined(TARGET_PPC) if ((flags >> 16) & 1) { s.info.endian =3D BFD_ENDIAN_LITTLE; } @@ -390,16 +381,7 @@ void monitor_disas(Monitor *mon, CPUState *cpu, cc->disas_set_info(cpu, &s.info); } =20 -#if defined(TARGET_I386) - if (flags =3D=3D 2) { - s.info.mach =3D bfd_mach_x86_64; - } else if (flags =3D=3D 1) { - s.info.mach =3D bfd_mach_i386_i8086; - } else { - s.info.mach =3D bfd_mach_i386_i386; - } - s.info.print_insn =3D print_insn_i386; -#elif defined(TARGET_PPC) +#if defined(TARGET_PPC) if (flags & 0xFFFF) { /* If we have a precise definition of the instruction set, use it.= */ s.info.mach =3D flags & 0xFFFF; diff --git a/monitor.c b/monitor.c index 9239f7adde..3f3ebc31ef 100644 --- a/monitor.c +++ b/monitor.c @@ -1310,27 +1310,6 @@ static void memory_dump(Monitor *mon, int count, int= format, int wsize, =20 if (format =3D=3D 'i') { int flags =3D 0; -#ifdef TARGET_I386 - CPUArchState *env =3D mon_get_cpu_env(); - if (wsize =3D=3D 2) { - flags =3D 1; - } else if (wsize =3D=3D 4) { - flags =3D 0; - } else { - /* as default we use the current CS size */ - flags =3D 0; - if (env) { -#ifdef TARGET_X86_64 - if ((env->efer & MSR_EFER_LMA) && - (env->segs[R_CS].flags & DESC_L_MASK)) - flags =3D 2; - else -#endif - if (!(env->segs[R_CS].flags & DESC_B_MASK)) - flags =3D 1; - } - } -#endif #ifdef TARGET_PPC CPUArchState *env =3D mon_get_cpu_env(); flags =3D msr_le << 16; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 69676e13e1..b869a69c53 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4099,6 +4099,17 @@ static bool x86_cpu_has_work(CPUState *cs) !(env->hflags & HF_SMM_MASK)); } =20 +static void x86_disas_set_info(CPUState *cs, disassemble_info *info) +{ + X86CPU *cpu =3D X86_CPU(cs); + CPUX86State *env =3D &cpu->env; + + info->mach =3D (env->hflags & HF_CS64_MASK ? bfd_mach_x86_64 + : env->hflags & HF_CS32_MASK ? bfd_mach_i386_i386 + : bfd_mach_i386_i8086); + info->print_insn =3D print_insn_i386; +} + static Property x86_cpu_properties[] =3D { #ifdef CONFIG_USER_ONLY /* apic_id =3D 0 by default for *-user, see commit 9886e834 */ @@ -4204,6 +4215,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc= , void *data) #endif cc->cpu_exec_enter =3D x86_cpu_exec_enter; cc->cpu_exec_exit =3D x86_cpu_exec_exit; + cc->disas_set_info =3D x86_disas_set_info; =20 dc->user_creatable =3D true; } diff --git a/target/i386/translate.c b/target/i386/translate.c index de0c989763..06c2cb9e64 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -8526,15 +8526,9 @@ static void i386_tr_disas_log(const DisasContextBase= *dcbase, CPUState *cpu) { DisasContext *dc =3D container_of(dcbase, DisasContext, base); - int disas_flags =3D !dc->code32; =20 qemu_log("IN: %s\n", lookup_symbol(dc->base.pc_first)); -#ifdef TARGET_X86_64 - if (dc->code64) { - disas_flags =3D 2; - } -#endif - log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size, disas_flag= s); + log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size, 0); } =20 static const TranslatorOps i386_tr_ops =3D { --=20 2.13.5 From nobody Sun May 5 03:20:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505414251450749.826072254418; Thu, 14 Sep 2017 11:37:31 -0700 (PDT) Received: from localhost ([::1]:49453 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsZ10-0001tu-4Q for importer@patchew.org; Thu, 14 Sep 2017 14:37:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49581) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsYz0-0000Oy-JQ for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dsYyw-0000Oa-Py for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:26 -0400 Received: from mail-pg0-x235.google.com ([2607:f8b0:400e:c05::235]:54885) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dsYyw-0000NR-Ku for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:22 -0400 Received: by mail-pg0-x235.google.com with SMTP id c137so111717pga.11 for ; Thu, 14 Sep 2017 11:35:22 -0700 (PDT) Received: from bigtime.twiddle.net (97-126-103-167.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c05::235 Subject: [Qemu-devel] [PATCH 02/10] target/ppc: Convert to disas_set_info hook X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: qemu-ppc@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- disas.c | 33 --------------------------------- monitor.c | 5 ----- target/ppc/translate.c | 5 +---- target/ppc/translate_init.c | 21 +++++++++++++++++++++ 4 files changed, 22 insertions(+), 42 deletions(-) diff --git a/disas.c b/disas.c index 2be716fdb2..3a375a3b6c 100644 --- a/disas.c +++ b/disas.c @@ -205,23 +205,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulo= ng code, cc->disas_set_info(cpu, &s.info); } =20 -#if defined(TARGET_PPC) - if ((flags >> 16) & 1) { - s.info.endian =3D BFD_ENDIAN_LITTLE; - } - if (flags & 0xFFFF) { - /* If we have a precise definition of the instruction set, use it.= */ - s.info.mach =3D flags & 0xFFFF; - } else { -#ifdef TARGET_PPC64 - s.info.mach =3D bfd_mach_ppc64; -#else - s.info.mach =3D bfd_mach_ppc; -#endif - } - s.info.disassembler_options =3D (char *)"any"; - s.info.print_insn =3D print_insn_ppc; -#endif if (s.info.print_insn =3D=3D NULL) { s.info.print_insn =3D print_insn_od_target; } @@ -381,22 +364,6 @@ void monitor_disas(Monitor *mon, CPUState *cpu, cc->disas_set_info(cpu, &s.info); } =20 -#if defined(TARGET_PPC) - if (flags & 0xFFFF) { - /* If we have a precise definition of the instruction set, use it.= */ - s.info.mach =3D flags & 0xFFFF; - } else { -#ifdef TARGET_PPC64 - s.info.mach =3D bfd_mach_ppc64; -#else - s.info.mach =3D bfd_mach_ppc; -#endif - } - if ((flags >> 16) & 1) { - s.info.endian =3D BFD_ENDIAN_LITTLE; - } - s.info.print_insn =3D print_insn_ppc; -#endif if (!s.info.print_insn) { monitor_printf(mon, "0x" TARGET_FMT_lx ": Asm output not supported on this arch\n", pc); diff --git a/monitor.c b/monitor.c index 3f3ebc31ef..a0f43f27e7 100644 --- a/monitor.c +++ b/monitor.c @@ -1310,11 +1310,6 @@ static void memory_dump(Monitor *mon, int count, int= format, int wsize, =20 if (format =3D=3D 'i') { int flags =3D 0; -#ifdef TARGET_PPC - CPUArchState *env =3D mon_get_cpu_env(); - flags =3D msr_le << 16; - flags |=3D env->bfd_mach; -#endif monitor_disas(mon, cs, addr, count, is_physical, flags); return; } diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 606b605ba0..bc155f1036 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7395,12 +7395,9 @@ void gen_intermediate_code(CPUState *cs, struct Tran= slationBlock *tb) #if defined(DEBUG_DISAS) if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) && qemu_log_in_addr_range(pc_start)) { - int flags; - flags =3D env->bfd_mach; - flags |=3D ctx.le_mode << 16; qemu_log_lock(); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, ctx.nip - pc_start, flags); + log_target_disas(cs, pc_start, ctx.nip - pc_start, 0); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index c827d1e388..c7b4a7c02a 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10644,6 +10644,26 @@ static gchar *ppc_gdb_arch_name(CPUState *cs) #endif } =20 +static void ppc_disas_set_info(CPUState *cs, disassemble_info *info) +{ + PowerPCCPU *cpu =3D POWERPC_CPU(cs); + CPUPPCState *env =3D &cpu->env; + + if ((env->hflags >> MSR_LE) & 1) { + info->endian =3D BFD_ENDIAN_LITTLE; + } + info->mach =3D env->bfd_mach; + if (!env->bfd_mach) { +#ifdef TARGET_PPC64 + info->mach =3D bfd_mach_ppc64; +#else + info->mach =3D bfd_mach_ppc; +#endif + } + info->disassembler_options =3D (char *)"any"; + info->print_insn =3D print_insn_ppc; +} + static Property ppc_cpu_properties[] =3D { DEFINE_PROP_BOOL("pre-2.8-migration", PowerPCCPU, pre_2_8_migration, f= alse), DEFINE_PROP_BOOL("pre-2.10-migration", PowerPCCPU, pre_2_10_migration, @@ -10705,6 +10725,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, voi= d *data) #ifndef CONFIG_USER_ONLY cc->virtio_is_big_endian =3D ppc_cpu_is_big_endian; #endif + cc->disas_set_info =3D ppc_disas_set_info; =20 dc->fw_name =3D "PowerPC,UNKNOWN"; } --=20 2.13.5 From nobody Sun May 5 03:20:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505414563435403.67267277012945; Thu, 14 Sep 2017 11:42:43 -0700 (PDT) Received: from localhost ([::1]:49487 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsZ62-0007Iq-4S for importer@patchew.org; Thu, 14 Sep 2017 14:42:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49580) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsYz0-0000Ox-Iu for qemu-devel@nongnu.org; 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[97.126.103.167]) by smtp.gmail.com with ESMTPSA id l85sm32473848pfb.176.2017.09.14.11.35.21 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Sep 2017 11:35:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=fo2V6OTJv7bqak1L19P46/GepcZM/YhahCeEGGnp6R4=; b=f6mHPadFtkBW5f3n+wwmtqGRxbkSPSM197EXF83wBI8laCB/OM6DJKWw03tyLbwgcG fhHTVtaPeSbzE/xwSq1PS8TZr0J4wn+VcFc7fvNWeHSumQYcjybA5zFeCXlbyx7QpEJf VHXNXmQ6oDKgS/G7dUuLk81qRzW0yP0Oc0Ido= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=fo2V6OTJv7bqak1L19P46/GepcZM/YhahCeEGGnp6R4=; b=C1652ijlOFKHOR4OWrY8WawcO0F0hVzHwLGOeDg9S8HIkPqBGS0+F6AeW9mi1fN6f6 PiEmDarJjWskqptZSGQbuqG53eO+FBJr4T713qVU5lSaXxFtsCLjJAKBkqd4oyUVSH3L ISe+MISiCmx4z7vua2M7hRL2Rign7ff4ifHqPFY6u2/qYB6Ha4DlS66A0252x7vURXbM AqMjsRAd9k+l/tW7EhxYcDCtZmAW06p5HiaVFGEfvmZHVSf1ZQfHLrI6KFHRQi6bPrRX vkwD/g41Me1OZNmXzo0eZwqETtJ0xFW9ZKJKIa675jSEC2BmrC2oPqxxqFnlxQKihvLa +3qA== X-Gm-Message-State: AHPjjUjLqRKSEBONE/DmXsPJtip1qZMWjnsOtllyQ5x0IegPzzgMiFQj AZUYtgcBvGazze07x8etKw== X-Google-Smtp-Source: ADKCNb4/H9yTAq/jCD24qA/gNJZ4b7oEbh20VhkApwsh6qDpmayJKO+gychhrAzOXzJfZVciArV9RA== X-Received: by 10.98.209.9 with SMTP id z9mr21764710pfg.283.1505414122755; Thu, 14 Sep 2017 11:35:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 14 Sep 2017 11:35:09 -0700 Message-Id: <20170914183516.19537-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170914183516.19537-1-richard.henderson@linaro.org> References: <20170914183516.19537-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::22c Subject: [Qemu-devel] [PATCH 03/10] disas: Remove unused flags arguments X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Now that every target is using the disas_set_info hook, the flags argument is unused. Remove it. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/disas/disas.h | 4 ++-- include/exec/log.h | 4 ++-- disas.c | 15 ++++----------- monitor.c | 3 +-- target/alpha/translate.c | 2 +- target/arm/translate-a64.c | 3 +-- target/arm/translate.c | 3 +-- target/cris/translate.c | 3 +-- target/hppa/translate.c | 2 +- target/i386/translate.c | 2 +- target/lm32/translate.c | 2 +- target/m68k/translate.c | 2 +- target/microblaze/translate.c | 2 +- target/mips/translate.c | 2 +- target/nios2/translate.c | 2 +- target/openrisc/translate.c | 2 +- target/ppc/translate.c | 2 +- target/s390x/translate.c | 2 +- target/sh4/translate.c | 2 +- target/sparc/translate.c | 2 +- target/tricore/translate.c | 2 +- target/unicore32/translate.c | 2 +- target/xtensa/translate.c | 2 +- 23 files changed, 28 insertions(+), 39 deletions(-) diff --git a/include/disas/disas.h b/include/disas/disas.h index e549ca24a1..4d48c13c65 100644 --- a/include/disas/disas.h +++ b/include/disas/disas.h @@ -9,10 +9,10 @@ /* Disassemble this for me please... (debugging). */ void disas(FILE *out, void *code, unsigned long size); void target_disas(FILE *out, CPUState *cpu, target_ulong code, - target_ulong size, int flags); + target_ulong size); =20 void monitor_disas(Monitor *mon, CPUState *cpu, - target_ulong pc, int nb_insn, int is_physical, int flag= s); + target_ulong pc, int nb_insn, int is_physical); =20 /* Look up symbol for debugging purpose. Returns "" if unknown. */ const char *lookup_symbol(target_ulong orig_addr); diff --git a/include/exec/log.h b/include/exec/log.h index ba1c9b5682..c249307911 100644 --- a/include/exec/log.h +++ b/include/exec/log.h @@ -38,9 +38,9 @@ static inline void log_cpu_state_mask(int mask, CPUState = *cpu, int flags) #ifdef NEED_CPU_H /* disas() and target_disas() to qemu_logfile: */ static inline void log_target_disas(CPUState *cpu, target_ulong start, - target_ulong len, int flags) + target_ulong len) { - target_disas(qemu_logfile, cpu, start, len, flags); + target_disas(qemu_logfile, cpu, start, len); } =20 static inline void log_disas(void *code, unsigned long size) diff --git a/disas.c b/disas.c index 3a375a3b6c..ad675dc361 100644 --- a/disas.c +++ b/disas.c @@ -171,15 +171,9 @@ static int print_insn_od_target(bfd_vma pc, disassembl= e_info *info) return print_insn_objdump(pc, info, "OBJD-T"); } =20 -/* Disassemble this for me please... (debugging). 'flags' has the following - values: - i386 - 1 means 16 bit code, 2 means 64 bit code - ppc - bits 0:15 specify (optionally) the machine instruction set; - bit 16 indicates little endian. - other targets - unused - */ +/* Disassemble this for me please... (debugging). */ void target_disas(FILE *out, CPUState *cpu, target_ulong code, - target_ulong size, int flags) + target_ulong size) { CPUClass *cc =3D CPU_GET_CLASS(cpu); target_ulong pc; @@ -336,10 +330,9 @@ monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr= , int length, return 0; } =20 -/* Disassembler for the monitor. - See target_disas for a description of flags. */ +/* Disassembler for the monitor. */ void monitor_disas(Monitor *mon, CPUState *cpu, - target_ulong pc, int nb_insn, int is_physical, int flag= s) + target_ulong pc, int nb_insn, int is_physical) { CPUClass *cc =3D CPU_GET_CLASS(cpu); int count, i; diff --git a/monitor.c b/monitor.c index a0f43f27e7..2125b54101 100644 --- a/monitor.c +++ b/monitor.c @@ -1309,8 +1309,7 @@ static void memory_dump(Monitor *mon, int count, int = format, int wsize, } =20 if (format =3D=3D 'i') { - int flags =3D 0; - monitor_disas(mon, cs, addr, count, is_physical, flags); + monitor_disas(mon, cs, addr, count, is_physical); return; } =20 diff --git a/target/alpha/translate.c b/target/alpha/translate.c index 5a92c4accb..e9a245f9c5 100644 --- a/target/alpha/translate.c +++ b/target/alpha/translate.c @@ -3048,7 +3048,7 @@ static void alpha_tr_tb_stop(DisasContextBase *dcbase= , CPUState *cpu) static void alpha_tr_disas_log(const DisasContextBase *dcbase, CPUState *c= pu) { qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first)); - log_target_disas(cpu, dcbase->pc_first, dcbase->tb->size, 1); + log_target_disas(cpu, dcbase->pc_first, dcbase->tb->size); } =20 static const TranslatorOps alpha_tr_ops =3D { diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 9017e30510..a3984c9a0d 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -11409,8 +11409,7 @@ static void aarch64_tr_disas_log(const DisasContext= Base *dcbase, DisasContext *dc =3D container_of(dcbase, DisasContext, base); =20 qemu_log("IN: %s\n", lookup_symbol(dc->base.pc_first)); - log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size, - 4 | (bswap_code(dc->sctlr_b) ? 2 : 0)); + log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size); } =20 const TranslatorOps aarch64_translator_ops =3D { diff --git a/target/arm/translate.c b/target/arm/translate.c index ab1a12a1b8..93e9dbe33d 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -12258,8 +12258,7 @@ static void arm_tr_disas_log(const DisasContextBase= *dcbase, CPUState *cpu) DisasContext *dc =3D container_of(dcbase, DisasContext, base); =20 qemu_log("IN: %s\n", lookup_symbol(dc->base.pc_first)); - log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size, - dc->thumb | (dc->sctlr_b << 1)); + log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size); } =20 static const TranslatorOps arm_translator_ops =3D { diff --git a/target/cris/translate.c b/target/cris/translate.c index 38a999e6f1..b1fda57c74 100644 --- a/target/cris/translate.c +++ b/target/cris/translate.c @@ -3297,8 +3297,7 @@ void gen_intermediate_code(CPUState *cs, struct Trans= lationBlock *tb) qemu_log_lock(); qemu_log("--------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, dc->pc - pc_start, - env->pregs[PR_VR]); + log_target_disas(cs, pc_start, dc->pc - pc_start); qemu_log("\nisize=3D%d osize=3D%d\n", dc->pc - pc_start, tcg_op_buf_count()); qemu_log_unlock(); diff --git a/target/hppa/translate.c b/target/hppa/translate.c index b6e2652341..fc2a9f5896 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3904,7 +3904,7 @@ static void hppa_tr_disas_log(const DisasContextBase = *dcbase, CPUState *cs) break; default: qemu_log("IN: %s\n", lookup_symbol(tb->pc)); - log_target_disas(cs, tb->pc, tb->size, 1); + log_target_disas(cs, tb->pc, tb->size); break; } } diff --git a/target/i386/translate.c b/target/i386/translate.c index 06c2cb9e64..23d9e05426 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -8528,7 +8528,7 @@ static void i386_tr_disas_log(const DisasContextBase = *dcbase, DisasContext *dc =3D container_of(dcbase, DisasContext, base); =20 qemu_log("IN: %s\n", lookup_symbol(dc->base.pc_first)); - log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size, 0); + log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size); } =20 static const TranslatorOps i386_tr_ops =3D { diff --git a/target/lm32/translate.c b/target/lm32/translate.c index 65bc9c0bf6..a83cbdf729 100644 --- a/target/lm32/translate.c +++ b/target/lm32/translate.c @@ -1156,7 +1156,7 @@ void gen_intermediate_code(CPUState *cs, struct Trans= lationBlock *tb) && qemu_log_in_addr_range(pc_start)) { qemu_log_lock(); qemu_log("\n"); - log_target_disas(cs, pc_start, dc->pc - pc_start, 0); + log_target_disas(cs, pc_start, dc->pc - pc_start); qemu_log("\nisize=3D%d osize=3D%d\n", dc->pc - pc_start, tcg_op_buf_count()); qemu_log_unlock(); diff --git a/target/m68k/translate.c b/target/m68k/translate.c index d738f32f9c..e1e31f622c 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -5620,7 +5620,7 @@ void gen_intermediate_code(CPUState *cs, TranslationB= lock *tb) qemu_log_lock(); qemu_log("----------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, dc->pc - pc_start, 0); + log_target_disas(cs, pc_start, dc->pc - pc_start); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 067b0878d6..fecc61a1ec 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1810,7 +1810,7 @@ void gen_intermediate_code(CPUState *cs, struct Trans= lationBlock *tb) qemu_log_lock(); qemu_log("--------------\n"); #if DISAS_GNU - log_target_disas(cs, pc_start, dc->pc - pc_start, 0); + log_target_disas(cs, pc_start, dc->pc - pc_start); #endif qemu_log("\nisize=3D%d osize=3D%d\n", dc->pc - pc_start, tcg_op_buf_count()); diff --git a/target/mips/translate.c b/target/mips/translate.c index c78d27294c..3b9cf9a236 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20369,7 +20369,7 @@ done_generating: && qemu_log_in_addr_range(pc_start)) { qemu_log_lock(); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, ctx.pc - pc_start, 0); + log_target_disas(cs, pc_start, ctx.pc - pc_start); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 6b0961837d..7a0fa860da 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -907,7 +907,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlo= ck *tb) && qemu_log_in_addr_range(tb->pc)) { qemu_log_lock(); qemu_log("IN: %s\n", lookup_symbol(tb->pc)); - log_target_disas(cs, tb->pc, dc->pc - tb->pc, 0); + log_target_disas(cs, tb->pc, dc->pc - tb->pc); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 112db1ad0f..99f2b463ce 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -1653,7 +1653,7 @@ void gen_intermediate_code(CPUState *cs, struct Trans= lationBlock *tb) =20 if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) && qemu_log_in_addr_range(pc_start)) { - log_target_disas(cs, pc_start, tb->size, 0); + log_target_disas(cs, pc_start, tb->size); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/ppc/translate.c b/target/ppc/translate.c index bc155f1036..8e92e4579c 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7397,7 +7397,7 @@ void gen_intermediate_code(CPUState *cs, struct Trans= lationBlock *tb) && qemu_log_in_addr_range(pc_start)) { qemu_log_lock(); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, ctx.nip - pc_start, 0); + log_target_disas(cs, pc_start, ctx.nip - pc_start); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 909b12818d..28bd02ceb3 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -5910,7 +5910,7 @@ void gen_intermediate_code(CPUState *cs, struct Trans= lationBlock *tb) qemu_log("IN: EXECUTE %016" PRIx64 "\n", dc.ex_value); } else { qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, dc.pc - pc_start, 1); + log_target_disas(cs, pc_start, dc.pc - pc_start); qemu_log("\n"); } qemu_log_unlock(); diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 10191073b2..7532bf74c1 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -2347,7 +2347,7 @@ void gen_intermediate_code(CPUState *cs, struct Trans= lationBlock *tb) && qemu_log_in_addr_range(pc_start)) { qemu_log_lock(); qemu_log("IN:\n"); /* , lookup_symbol(pc_start)); */ - log_target_disas(cs, pc_start, ctx.pc - pc_start, 0); + log_target_disas(cs, pc_start, ctx.pc - pc_start); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 6290705b11..e89b6227f2 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -5855,7 +5855,7 @@ void gen_intermediate_code(CPUState *cs, TranslationB= lock * tb) qemu_log_lock(); qemu_log("--------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, last_pc + 4 - pc_start, 0); + log_target_disas(cs, pc_start, last_pc + 4 - pc_start); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 4e4198e887..e807500e26 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -8839,7 +8839,7 @@ void gen_intermediate_code(CPUState *cs, struct Trans= lationBlock *tb) && qemu_log_in_addr_range(pc_start)) { qemu_log_lock(); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, ctx.pc - pc_start, 0); + log_target_disas(cs, pc_start, ctx.pc - pc_start); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/unicore32/translate.c b/target/unicore32/translate.c index 6c094d59d7..f9aa248a80 100644 --- a/target/unicore32/translate.c +++ b/target/unicore32/translate.c @@ -2031,7 +2031,7 @@ done_generating: qemu_log_lock(); qemu_log("----------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, dc->pc - pc_start, 0); + log_target_disas(cs, pc_start, dc->pc - pc_start); qemu_log("\n"); qemu_log_unlock(); } diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index d7bf07e8e6..03719ce12b 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -3250,7 +3250,7 @@ done: qemu_log_lock(); qemu_log("----------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(cs, pc_start, dc.pc - pc_start, 0); + log_target_disas(cs, pc_start, dc.pc - pc_start); qemu_log("\n"); qemu_log_unlock(); } --=20 2.13.5 From nobody Sun May 5 03:20:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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[97.126.103.167]) by smtp.gmail.com with ESMTPSA id l85sm32473848pfb.176.2017.09.14.11.35.22 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Sep 2017 11:35:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=cHa2/xB6nYGL9i+D4GhHYh/dVeiKGQ/gqH8P2cYg23w=; b=bIIohRKQ63BXLIFmmltgDrcd42F5EGBO7I7Qk60iTF/WsSCD3UzESBama8kUZg/q52 ja33e8OJHzsPslkT8fczA1gDcDOSrbHAuRPWLbgikdN7x+WjiHVtvZHRReyoUcHdMPPl 6/tLTvv79I1N0THoIlXOoJqL3iDwGivLSNCNE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=cHa2/xB6nYGL9i+D4GhHYh/dVeiKGQ/gqH8P2cYg23w=; b=TLL0N3j6GeXjpIg1Ox2VAW8V46W4Jxs7MzAKddTJd2R09oGdVFobnr5aS/icX8Ix81 9RzVY597yZ75MNAANW2CVwz/+GGCWt7cbNQMWou49M7kqepz+mKCruHR8IteQFgp7ge1 KDmmruuggF6UZmZrGAGj7ld8BFMDUDynrnBBTMw5IKLNsJxV/bXQgYNkfe/webtN+qrz XPIZA83rWGG/9/0E9auN6nnvzh0mbaSh/U/qtCjOjnUPZCrGL5ge2tnJimafLSLpcUOe +s6lSEy4V8PAarFpJhi3lAoFEZ2cPSvAwFFeyjrceWBaUngc24TBteFAkd7xh5CIXSpt 1r+g== X-Gm-Message-State: AHPjjUjx/LfDhaMQRIOSGsbrktfV0YNR7Y7MOfkA+jnnhHrJPlvoFqG1 6zdZyhlGGA+Rx+RFf0f16A== X-Google-Smtp-Source: ADKCNb5vWdQxMvG1j6PpXfL3S+gNkoUpc86dDTrWpnP6HRdQSz3XDakq6nfDYXeAyh3i5XBcOdZ8nw== X-Received: by 10.98.155.76 with SMTP id r73mr22490118pfd.182.1505414124184; Thu, 14 Sep 2017 11:35:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 14 Sep 2017 11:35:10 -0700 Message-Id: <20170914183516.19537-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170914183516.19537-1-richard.henderson@linaro.org> References: <20170914183516.19537-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::22e Subject: [Qemu-devel] [PATCH 04/10] disas: Support the Capstone disassembler library X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" If configured, prefer this over our rather dated copy of the GPLv2-only binutils. This will be especially apparent with the proposed vector extensions to TCG, as disas/i386.c does not handle AVX. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- include/disas/bfd.h | 4 ++ include/disas/capstone.h | 38 +++++++++++++++++++ disas.c | 99 ++++++++++++++++++++++++++++++++++++++++++--= ---- configure | 17 +++++++++ 4 files changed, 146 insertions(+), 12 deletions(-) create mode 100644 include/disas/capstone.h diff --git a/include/disas/bfd.h b/include/disas/bfd.h index b01e002b4c..0f4ecdeb88 100644 --- a/include/disas/bfd.h +++ b/include/disas/bfd.h @@ -377,6 +377,10 @@ typedef struct disassemble_info { /* Command line options specific to the target disassembler. */ char * disassembler_options; =20 + /* Options for Capstone disassembly. */ + int cap_arch; + int cap_mode; + } disassemble_info; =20 =0C diff --git a/include/disas/capstone.h b/include/disas/capstone.h new file mode 100644 index 0000000000..84e214956d --- /dev/null +++ b/include/disas/capstone.h @@ -0,0 +1,38 @@ +#ifndef QEMU_CAPSTONE_H +#define QEMU_CAPSTONE_H 1 + +#ifdef CONFIG_CAPSTONE + +#include + +#else + +/* Just enough to allow backends to init without ifdefs. */ + +#define CS_ARCH_ARM -1 +#define CS_ARCH_ARM64 -1 +#define CS_ARCH_MIPS -1 +#define CS_ARCH_X86 -1 +#define CS_ARCH_PPC -1 +#define CS_ARCH_SPARC -1 +#define CS_ARCH_SYSZ -1 + +#define CS_MODE_LITTLE_ENDIAN 0 +#define CS_MODE_BIG_ENDIAN 0 +#define CS_MODE_ARM 0 +#define CS_MODE_16 0 +#define CS_MODE_32 0 +#define CS_MODE_64 0 +#define CS_MODE_THUMB 0 +#define CS_MODE_MCLASS 0 +#define CS_MODE_V8 0 +#define CS_MODE_MICRO 0 +#define CS_MODE_MIPS3 0 +#define CS_MODE_MIPS32R6 0 +#define CS_MODE_MIPSGP64 0 +#define CS_MODE_V9 0 +#define CS_MODE_MIPS32 0 +#define CS_MODE_MIPS64 0 + +#endif /* CONFIG_CAPSTONE */ +#endif /* QEMU_CAPSTONE_H */ diff --git a/disas.c b/disas.c index ad675dc361..76ea76b026 100644 --- a/disas.c +++ b/disas.c @@ -6,6 +6,7 @@ =20 #include "cpu.h" #include "disas/disas.h" +#include "disas/capstone.h" =20 typedef struct CPUDebug { struct disassemble_info info; @@ -171,6 +172,57 @@ static int print_insn_od_target(bfd_vma pc, disassembl= e_info *info) return print_insn_objdump(pc, info, "OBJD-T"); } =20 +static bool cap_disas(disassemble_info *info, uint64_t pc, size_t size) +{ + bool ret =3D false; +#ifdef CONFIG_CAPSTONE + csh handle; + cs_insn *insn; + uint8_t *buf; + const uint8_t *cbuf; + uint64_t pc_start; + cs_mode cap_mode =3D info->cap_mode; + + cap_mode +=3D (info->endian =3D=3D BFD_ENDIAN_BIG ? CS_MODE_BIG_ENDIAN + : CS_MODE_LITTLE_ENDIAN); + + if (cs_open(info->cap_arch, cap_mode, &handle) !=3D CS_ERR_OK) { + goto err0; + } + + /* ??? There probably ought to be a better place to put this. */ + if (info->cap_arch =3D=3D CS_ARCH_X86) { + /* We don't care about errors (if for some reason the library + is compiled without AT&T syntax); the user will just have + to deal with the Intel syntax. */ + cs_option(handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT); + } + + insn =3D cs_malloc(handle); + if (insn =3D=3D NULL) { + goto err1; + } + + cbuf =3D buf =3D g_malloc(size); + info->read_memory_func(pc, buf, size, info); + + pc_start =3D pc; + while (cs_disasm_iter(handle, &cbuf, &size, &pc, insn)) { + (*info->fprintf_func)(info->stream, + "0x%08" PRIx64 ": %-12s %s\n", + pc_start, insn->mnemonic, insn->op_str); + pc_start =3D pc; + } + ret =3D true; + + g_free(buf); + err1: + cs_close(&handle); + err0: +#endif /* CONFIG_CAPSTONE */ + return ret; +} + /* Disassemble this for me please... (debugging). */ void target_disas(FILE *out, CPUState *cpu, target_ulong code, target_ulong size) @@ -188,6 +240,8 @@ void target_disas(FILE *out, CPUState *cpu, target_ulon= g code, s.info.buffer_vma =3D code; s.info.buffer_length =3D size; s.info.print_address_func =3D generic_print_address; + s.info.cap_arch =3D -1; + s.info.cap_mode =3D 0; =20 #ifdef TARGET_WORDS_BIGENDIAN s.info.endian =3D BFD_ENDIAN_BIG; @@ -199,6 +253,10 @@ void target_disas(FILE *out, CPUState *cpu, target_ulo= ng code, cc->disas_set_info(cpu, &s.info); } =20 + if (s.info.cap_arch >=3D 0 && cap_disas(&s.info, code, size)) { + return; + } + if (s.info.print_insn =3D=3D NULL) { s.info.print_insn =3D print_insn_od_target; } @@ -206,18 +264,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulo= ng code, for (pc =3D code; size > 0; pc +=3D count, size -=3D count) { fprintf(out, "0x" TARGET_FMT_lx ": ", pc); count =3D s.info.print_insn(pc, &s.info); -#if 0 - { - int i; - uint8_t b; - fprintf(out, " {"); - for(i =3D 0; i < count; i++) { - target_read_memory(pc + i, &b, 1, &s.info); - fprintf(out, " %02x", b); - } - fprintf(out, " }"); - } -#endif fprintf(out, "\n"); if (count < 0) break; @@ -245,6 +291,8 @@ void disas(FILE *out, void *code, unsigned long size) s.info.buffer =3D code; s.info.buffer_vma =3D (uintptr_t)code; s.info.buffer_length =3D size; + s.info.cap_arch =3D -1; + s.info.cap_mode =3D 0; =20 #ifdef HOST_WORDS_BIGENDIAN s.info.endian =3D BFD_ENDIAN_BIG; @@ -256,21 +304,34 @@ void disas(FILE *out, void *code, unsigned long size) #elif defined(__i386__) s.info.mach =3D bfd_mach_i386_i386; print_insn =3D print_insn_i386; + s.info.cap_arch =3D CS_ARCH_X86; + s.info.cap_mode =3D CS_MODE_32; #elif defined(__x86_64__) s.info.mach =3D bfd_mach_x86_64; print_insn =3D print_insn_i386; + s.info.cap_arch =3D CS_ARCH_X86; + s.info.cap_mode =3D CS_MODE_64; #elif defined(_ARCH_PPC) s.info.disassembler_options =3D (char *)"any"; print_insn =3D print_insn_ppc; + s.info.cap_arch =3D CS_ARCH_PPC; +# ifdef _ARCH_PPC64 + s.info.cap_mode =3D CS_MODE_64; +# endif #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS) print_insn =3D print_insn_arm_a64; + s.info.cap_arch =3D CS_ARCH_ARM64; #elif defined(__alpha__) print_insn =3D print_insn_alpha; #elif defined(__sparc__) print_insn =3D print_insn_sparc; s.info.mach =3D bfd_mach_sparc_v9b; + s.info.cap_arch =3D CS_ARCH_SPARC; + s.info.cap_mode =3D CS_MODE_V9; #elif defined(__arm__) print_insn =3D print_insn_arm; + s.info.cap_arch =3D CS_ARCH_ARM; + /* TCG only generates code for arm mode. */ #elif defined(__MIPSEB__) print_insn =3D print_insn_big_mips; #elif defined(__MIPSEL__) @@ -279,9 +340,15 @@ void disas(FILE *out, void *code, unsigned long size) print_insn =3D print_insn_m68k; #elif defined(__s390__) print_insn =3D print_insn_s390; + s.info.cap_arch =3D CS_ARCH_SYSZ; #elif defined(__hppa__) print_insn =3D print_insn_hppa; #endif + + if (s.info.cap_arch >=3D 0 && cap_disas(&s.info, (uintptr_t)code, size= )) { + return; + } + if (print_insn =3D=3D NULL) { print_insn =3D print_insn_od_host; } @@ -357,6 +424,14 @@ void monitor_disas(Monitor *mon, CPUState *cpu, cc->disas_set_info(cpu, &s.info); } =20 + /* ??? Capstone requires that we copy the data into a host-addressable + buffer first and has no call-back to read more. Therefore we need + an estimate of buffer size. This will work for most RISC, but we'll + need to figure out something else for variable-length ISAs. */ + if (s.info.cap_arch >=3D 0 && cap_disas(&s.info, pc, 4 * nb_insn)) { + return; + } + if (!s.info.print_insn) { monitor_printf(mon, "0x" TARGET_FMT_lx ": Asm output not supported on this arch\n", pc); diff --git a/configure b/configure index fd7e3a5e81..a55a8eda8a 100755 --- a/configure +++ b/configure @@ -366,6 +366,7 @@ opengl_dmabuf=3D"no" cpuid_h=3D"no" avx2_opt=3D"no" zlib=3D"yes" +capstone=3D"" lzo=3D"" snappy=3D"" bzip2=3D"" @@ -4381,6 +4382,18 @@ EOF fi =20 ########################################## +# capstone + +if test "$capstone" !=3D no; then + capstone=3Dno + if $pkg_config capstone; then + capstone=3Dyes + QEMU_CFLAGS=3D"$QEMU_CFLAGS $($pkg_config --cflags capstone)" + LDFLAGS=3D"$LDFLAGS $($pkg_config --libs capstone)" + fi +fi + +########################################## # check if we have fdatasync =20 fdatasync=3Dno @@ -5402,6 +5415,7 @@ echo "jemalloc support $jemalloc" echo "avx2 optimization $avx2_opt" echo "replication support $replication" echo "VxHS block device $vxhs" +echo "capstone $capstone" =20 if test "$sdl_too_old" =3D "yes"; then echo "-> Your SDL version is too old - please upgrade to have SDL support" @@ -6050,6 +6064,9 @@ fi if test "$ivshmem" =3D "yes" ; then echo "CONFIG_IVSHMEM=3Dy" >> $config_host_mak fi +if test "$capstone" =3D "yes" ; then + echo "CONFIG_CAPSTONE=3Dy" >> $config_host_mak +fi =20 # Hold two types of flag: # CONFIG_THREAD_SETNAME_BYTHREAD - we've got a way of setting the name = on --=20 2.13.5 From nobody Sun May 5 03:20:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505414645511409.4762678543692; Thu, 14 Sep 2017 11:44:05 -0700 (PDT) Received: from localhost ([::1]:49496 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsZ7M-00008V-Rd for importer@patchew.org; Thu, 14 Sep 2017 14:44:04 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49637) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsYz2-0000Q9-A2 for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dsYz1-0000VD-3M for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:28 -0400 Received: from mail-pf0-x230.google.com ([2607:f8b0:400e:c00::230]:47702) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dsYz0-0000Td-TM for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:27 -0400 Received: by mail-pf0-x230.google.com with SMTP id u12so118890pfl.4 for ; Thu, 14 Sep 2017 11:35:26 -0700 (PDT) Received: from bigtime.twiddle.net (97-126-103-167.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c00::230 Subject: [Qemu-devel] [PATCH 05/10] target/i386: Support Capstone in disas_set_info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/cpu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b869a69c53..c3980b3864 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -51,6 +51,8 @@ #include "hw/i386/apic_internal.h" #endif =20 +#include "disas/capstone.h" + =20 /* Cache topology CPUID constants: */ =20 @@ -4108,6 +4110,11 @@ static void x86_disas_set_info(CPUState *cs, disasse= mble_info *info) : env->hflags & HF_CS32_MASK ? bfd_mach_i386_i386 : bfd_mach_i386_i8086); info->print_insn =3D print_insn_i386; + + info->cap_arch =3D CS_ARCH_X86; + info->cap_mode =3D (env->hflags & HF_CS64_MASK ? CS_MODE_64 + : env->hflags & HF_CS32_MASK ? CS_MODE_32 + : CS_MODE_16); } =20 static Property x86_cpu_properties[] =3D { --=20 2.13.5 From nobody Sun May 5 03:20:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 150541471263416.44677166008239; Thu, 14 Sep 2017 11:45:12 -0700 (PDT) Received: from localhost ([::1]:49499 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsZ8R-0000uE-No for importer@patchew.org; Thu, 14 Sep 2017 14:45:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49673) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsYz3-0000Qd-9I for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dsYz2-0000XY-Ec for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:29 -0400 Received: from mail-pg0-x232.google.com ([2607:f8b0:400e:c05::232]:49374) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dsYz2-0000WA-6l for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:28 -0400 Received: by mail-pg0-x232.google.com with SMTP id m30so118660pgn.6 for ; Thu, 14 Sep 2017 11:35:28 -0700 (PDT) Received: from bigtime.twiddle.net (97-126-103-167.tukw.qwest.net. [97.126.103.167]) by smtp.gmail.com with ESMTPSA id l85sm32473848pfb.176.2017.09.14.11.35.25 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Sep 2017 11:35:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BJqyeQ0M3M1yn5ApG5bni6x3B5PmYk58/MJIa3Ocjvs=; b=kffYuaSYGsKFT6OHxWW+QVw5wCI4nuTtRdVy0a6pXitTnortrYJGuT4NLdjYSXtoko vW1m698y5I33NJH8MLtZLulw/NUvY2pSXK9ezvTYLtxI32+dxo7MQz8lXerC/UVrjaTw Z/yuJdZ/J23MoQowcYwzlnwcDyllArI6WT82g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BJqyeQ0M3M1yn5ApG5bni6x3B5PmYk58/MJIa3Ocjvs=; b=dhkB4+CFtfs7bSkI9B8xFQ5bi4guSW+vjGsnxsXAx+ja6gEcngQ7KGK3z/tI1b4keQ 0xu0XYN1GuE4BFTd1X4EoHe5jYy1GKfZHpsetJM2lV0FHNUGUfh7n/+fCO2XXGFwVC9D jBpknFh3LooAPM1Wo1P2q5wyg98v3sNZ1s5w6EBT82QWO+f3yr6idj3GkLSLrDQWcJgo Dchbez/YP1egdZdPsjmSR2KZ9eIhft7ujbn8nEzHy2GZxJ2dgByQK2+hl/ahky6MyC+W gXxJftO//Ebk5e+qwB4VjHGd1VSYJyS9kCWkadijq7fKqCgcAOqN0eRL6VN1Gq67gFgs 3xQQ== X-Gm-Message-State: AHPjjUhQQfVPbKSVCA4g7bmQh0fiwEu152tc0TqohbKohx7hScFGfDCo ck+QVsyHAXJX6A3CoaFsMA== X-Google-Smtp-Source: ADKCNb4pdpBAgYs+bv/J0F7I78qJ03qTMZs+mbSKzjiN49v32hDDGulORBTdCBenCasA2MXeJvNP5A== X-Received: by 10.98.11.214 with SMTP id 83mr22371354pfl.326.1505414127081; Thu, 14 Sep 2017 11:35:27 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 14 Sep 2017 11:35:12 -0700 Message-Id: <20170914183516.19537-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170914183516.19537-1-richard.henderson@linaro.org> References: <20170914183516.19537-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::232 Subject: [Qemu-devel] [PATCH 06/10] target/arm: Support Capstone in disas_set_info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: qemu-arm@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/cpu.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a1acce3c7a..92159ca0b1 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -33,6 +33,7 @@ #include "sysemu/sysemu.h" #include "sysemu/hw_accel.h" #include "kvm_arm.h" +#include "disas/capstone.h" =20 static void arm_cpu_set_pc(CPUState *cs, vaddr value) { @@ -476,10 +477,24 @@ static void arm_disas_set_info(CPUState *cpu, disasse= mble_info *info) #if defined(CONFIG_ARM_A64_DIS) info->print_insn =3D print_insn_arm_a64; #endif - } else if (env->thumb) { - info->print_insn =3D print_insn_thumb1; + info->cap_arch =3D CS_ARCH_ARM64; } else { - info->print_insn =3D print_insn_arm; + int cap_mode; + if (env->thumb) { + info->print_insn =3D print_insn_thumb1; + cap_mode =3D CS_MODE_THUMB; + } else { + info->print_insn =3D print_insn_arm; + cap_mode =3D CS_MODE_ARM; + } + if (arm_feature(env, ARM_FEATURE_V8)) { + cap_mode |=3D CS_MODE_V8; + } + if (arm_feature(env, ARM_FEATURE_M)) { + cap_mode |=3D CS_MODE_MCLASS; + } + info->cap_arch =3D CS_ARCH_ARM; + info->cap_mode =3D cap_mode; } if (bswap_code(arm_sctlr_b(env))) { #ifdef TARGET_WORDS_BIGENDIAN --=20 2.13.5 From nobody Sun May 5 03:20:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505414253126969.1521464762233; Thu, 14 Sep 2017 11:37:33 -0700 (PDT) Received: from localhost ([::1]:49455 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsZ12-0001wQ-4k for importer@patchew.org; Thu, 14 Sep 2017 14:37:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49707) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsYz4-0000Qj-E6 for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dsYz3-0000ZP-Jc for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:30 -0400 Received: from mail-pg0-x234.google.com ([2607:f8b0:400e:c05::234]:57268) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dsYz3-0000YW-Eu for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:29 -0400 Received: by mail-pg0-x234.google.com with SMTP id 7so109364pgd.13 for ; Thu, 14 Sep 2017 11:35:29 -0700 (PDT) Received: from bigtime.twiddle.net (97-126-103-167.tukw.qwest.net. [97.126.103.167]) by smtp.gmail.com with ESMTPSA id l85sm32473848pfb.176.2017.09.14.11.35.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Sep 2017 11:35:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dXNgIki+m7LGtYcdnbeZX+mf/jFfdEb3n4/3NYk7fOw=; b=PMONrmmtSAiIe8suwcz0Vh1SbyqBNz1jkPln6N/Bxad24j+LYkc6KPtRq8JTgCGBuI YikLK8jCWzhF8j5s8BtDogDUsjPPco4nCv7y4SdBHmmptii1i0b5ZW03Gncv2k4Yevv0 2qJ7AE9Fk633UP8x6T72uSBGxR/dctcullL4o= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dXNgIki+m7LGtYcdnbeZX+mf/jFfdEb3n4/3NYk7fOw=; b=JL3xKyz0mIbYlQpI4sSn6jjYVw42COV/EppoyoMftb1pyvfpHCKaabp1PdXZU6Xghn csXx8piSzW8PhQYRu946lm4FZS8H426km/frH7e2SLZ4KZ3V79eFauaBJAGkPD+jXk83 m/irBDkMaJeW4XN14sDWttPxKmAULINC8pAQAnjNUBNvPi8jRsvfQvu1Q71KcOi1+eRc v6Nz3IEDIUx2Usz3WzPholu+AiRhXuu4PZxMZLOyvKsjzJTJ9K/IpBeKXllvX2NTNZHb 92/6xqetYrtnFH+mBmfTmQY9ts21Hf7yWNXqSwyCWxR0z3Ts2bBxJpDS0Y0hx4aepOar yVLg== X-Gm-Message-State: AHPjjUh7cLnggQgIXtuUGNA6mt9r5dJp+OI5QlMGOEuvh11wUFHdJfec MAWy5aejW+Ufb8DpLY1F3w== X-Google-Smtp-Source: ADKCNb5PftzP9/B0jbXa9cxrSO7SBb/SHTZrJ0HNHqzIY0CZ7AL9Do2GGj7Qf3iOvYn73O0ILE+qog== X-Received: by 10.98.33.80 with SMTP id h77mr16762734pfh.18.1505414128297; Thu, 14 Sep 2017 11:35:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 14 Sep 2017 11:35:13 -0700 Message-Id: <20170914183516.19537-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170914183516.19537-1-richard.henderson@linaro.org> References: <20170914183516.19537-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::234 Subject: [Qemu-devel] [PATCH 07/10] target/ppc: Support Capstone in disas_set_info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: qemu-ppc@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- target/ppc/translate_init.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index c7b4a7c02a..b976784d21 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -35,6 +35,7 @@ #include "mmu-book3s-v3.h" #include "sysemu/qtest.h" #include "qemu/cutils.h" +#include "disas/capstone.h" =20 //#define PPC_DUMP_CPU //#define PPC_DEBUG_SPR @@ -10662,6 +10663,11 @@ static void ppc_disas_set_info(CPUState *cs, disas= semble_info *info) } info->disassembler_options =3D (char *)"any"; info->print_insn =3D print_insn_ppc; + + info->cap_arch =3D CS_ARCH_PPC; +#ifdef TARGET_PPC64 + info->cap_mode =3D CS_MODE_64; +#endif } =20 static Property ppc_cpu_properties[] =3D { --=20 2.13.5 From nobody Sun May 5 03:20:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505414260628490.101003809094; Thu, 14 Sep 2017 11:37:40 -0700 (PDT) Received: from localhost ([::1]:49457 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsZ19-000238-S4 for importer@patchew.org; Thu, 14 Sep 2017 14:37:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49739) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsYz6-0000Rd-5H for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dsYz5-0000at-6R for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:32 -0400 Received: from mail-pg0-x22f.google.com ([2607:f8b0:400e:c05::22f]:55977) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dsYz5-0000a7-0k for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:31 -0400 Received: by mail-pg0-x22f.google.com with SMTP id b11so108961pgn.12 for ; Thu, 14 Sep 2017 11:35:30 -0700 (PDT) Received: from bigtime.twiddle.net (97-126-103-167.tukw.qwest.net. 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X-Received-From: 2607:f8b0:400e:c05::22f Subject: [Qemu-devel] [PATCH 08/10] target/s390x: Support Capstone in disas_set_info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- target/s390x/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 74b3e4fd0d..a4f7ff3da8 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -42,6 +42,7 @@ #include "sysemu/sysemu.h" #include "hw/s390x/sclp.h" #endif +#include "disas/capstone.h" =20 #define CR0_RESET 0xE0UL #define CR14_RESET 0xC2000000UL; @@ -172,6 +173,7 @@ static void s390_cpu_disas_set_info(CPUState *cpu, disa= ssemble_info *info) { info->mach =3D bfd_mach_s390_64; info->print_insn =3D print_insn_s390; + info->cap_arch =3D CS_ARCH_SYSZ; } =20 static void s390_cpu_realizefn(DeviceState *dev, Error **errp) --=20 2.13.5 From nobody Sun May 5 03:20:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505414420218416.5401206544436; Thu, 14 Sep 2017 11:40:20 -0700 (PDT) Received: from localhost ([::1]:49468 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsZ3j-0004fT-FW for importer@patchew.org; Thu, 14 Sep 2017 14:40:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49805) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsYzB-0000Wz-45 for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dsYz6-0000cS-Aw for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:37 -0400 Received: from mail-pg0-x22d.google.com ([2607:f8b0:400e:c05::22d]:44794) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dsYz6-0000bW-4k for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:32 -0400 Received: by mail-pg0-x22d.google.com with SMTP id j16so127628pga.1 for ; Thu, 14 Sep 2017 11:35:32 -0700 (PDT) Received: from bigtime.twiddle.net (97-126-103-167.tukw.qwest.net. [97.126.103.167]) by smtp.gmail.com with ESMTPSA id l85sm32473848pfb.176.2017.09.14.11.35.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Sep 2017 11:35:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=fmGan1ShCJ5GBnPRPye1s5iBqwpl8mHcISObIerH4So=; b=bIe+oFaVw4eeGNpcoMoHsGZy8HBwGA0H688NtODFj8WxUWqGBBqUPISnpbKwf9I/nm Xua+c8JJ3MssWiB+YdkeKKZs7I/rOGaOaG4dw0Sn92RvKHeAdWN9tkUPn7YkS7MkJc5d psBnDmD2HCxMMV3fDViuER1fhlM9+UIuuhVP8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=fmGan1ShCJ5GBnPRPye1s5iBqwpl8mHcISObIerH4So=; b=WqAAhbxyCk7fmRKfJ8HrilehSCMXNRQTNRr04vCdNy/T18V5ra6+4tqtXRrOCwEijb ecAk8vAXEd56mCTSBtACHsMUMelzoHweooJcDbdkSpVNPGb+njL/zl/CjgAmafbvFFgA GAZiOI7vYjlaatNzpqcKed5fgwv35zm3tDiTyG/xcovZybaWjEMZ87OazlqNnA/r7gIx 7NDTe51xSrl7nFzE/MnYzCXYCW1C6RYwldtjrMQijYQ2py6YAUysgVLT/M9OssxUq9fa evFzmmyBEbEUzdEOGhc5S0+gdwEXVUWk3YTu7/44l7wrtA2Da5YsCBL3hqDlWeOLh9Dw S0mQ== X-Gm-Message-State: AHPjjUjsNtyJoA9SoimvUQwQn9JTzgpltSWTXMp+s5PriNOxLd7oPuV/ ak2XGCvlJL0x+rAb5UeiSg== X-Google-Smtp-Source: ADKCNb4bWKywYOPqsSTR+AzCyM5aoGkeEThWcP5c3GSbXiuqvF31o4cCs7Dklj6WtMnU+K71uqEtJA== X-Received: by 10.99.7.205 with SMTP id 196mr21731285pgh.356.1505414130951; Thu, 14 Sep 2017 11:35:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 14 Sep 2017 11:35:15 -0700 Message-Id: <20170914183516.19537-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170914183516.19537-1-richard.henderson@linaro.org> References: <20170914183516.19537-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::22d Subject: [Qemu-devel] [PATCH 09/10] target/sparc: Support Capstone in disas_set_info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: Mark Cave-Ayland Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- target/sparc/cpu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 0806d699e6..7eabf410de 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -24,6 +24,7 @@ #include "exec/exec-all.h" #include "hw/qdev-properties.h" #include "qapi/visitor.h" +#include "disas/capstone.h" =20 //#define DEBUG_FEATURES =20 @@ -99,8 +100,10 @@ static bool sparc_cpu_exec_interrupt(CPUState *cs, int = interrupt_request) static void cpu_sparc_disas_set_info(CPUState *cpu, disassemble_info *info) { info->print_insn =3D print_insn_sparc; + info->cap_arch =3D CS_ARCH_SPARC; #ifdef TARGET_SPARC64 info->mach =3D bfd_mach_sparc_v9b; + info->cap_mode =3D CS_MODE_V9; #endif } =20 --=20 2.13.5 From nobody Sun May 5 03:20:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505414565251632.4487369679658; Thu, 14 Sep 2017 11:42:45 -0700 (PDT) Received: from localhost ([::1]:49488 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsZ64-0007Lb-CO for importer@patchew.org; Thu, 14 Sep 2017 14:42:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49810) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dsYzB-0000X5-7b for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dsYz7-0000et-Qc for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:37 -0400 Received: from mail-pg0-x22b.google.com ([2607:f8b0:400e:c05::22b]:43507) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dsYz7-0000dS-Jb for qemu-devel@nongnu.org; Thu, 14 Sep 2017 14:35:33 -0400 Received: by mail-pg0-x22b.google.com with SMTP id u18so127516pgo.0 for ; Thu, 14 Sep 2017 11:35:33 -0700 (PDT) Received: from bigtime.twiddle.net (97-126-103-167.tukw.qwest.net. [97.126.103.167]) by smtp.gmail.com with ESMTPSA id l85sm32473848pfb.176.2017.09.14.11.35.31 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Sep 2017 11:35:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=p2dILW5tsQ1dMIqBhGi3++87zont1ha9AlVGFBgG+pA=; b=XZIN5mnlD9wL7tWleBSFEGfwvOzMS+dADuHepaOu9pzizXjmLe84I9GrUXrve7dgNZ 4w8kpr5EiBV3ii2lueZTmIBFjAIGv05PUzKc1qOzwaLMNGfFEkqq0kNkUO7Vs3WRNdD8 LgJXLLR6rnmoainkjCTfJj1TzilyweGxpYsaw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=p2dILW5tsQ1dMIqBhGi3++87zont1ha9AlVGFBgG+pA=; b=dnz2Av7bkk2yld3gE9q8zbqAi6uFe9GipjnyiqLkztRRmQh1KJRb3NMHkFE5Gy3L0C 8Mx80smIQEqPSlCp5iFSqJYTDzSIfRdF19mJYJ4vMF/3EfzVx3DF2/qZKy+SOfBng7Cs j/skPMRilY6K3EcgQ8n/qKkMohtBjgPtiDZMoooA7/Z7zIO6Td7e0ISBMQuz4FbBBRV9 ASOSTYRruSqONIwTNDNXo90+OQxHkOKnzZv5modgB1apaMcpc0ZPX5vwVF2o0gszzIaa oEOjOoKurSwwxaA4HLvvmwzWvr6yMsjDPbDpEkrD1Dv8KOpYJLePzTyq7cGZTReYodI3 Affw== X-Gm-Message-State: AHPjjUioj2SWiPfvxGC9kroRvXzQQ2uUpIoPqOdgJcxIIb5yxKO9ctD0 tY7ced9bX/vaBuOIGXL/Kw== X-Google-Smtp-Source: AOwi7QA6lBQ9Q7DaP+c+Vf34dft/ppShxClUlSPqy6lOJDh5mnaD5mfdg8X5kEJ+MlqICViLaZr44g== X-Received: by 10.99.47.68 with SMTP id v65mr4101488pgv.452.1505414132323; Thu, 14 Sep 2017 11:35:32 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 14 Sep 2017 11:35:16 -0700 Message-Id: <20170914183516.19537-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170914183516.19537-1-richard.henderson@linaro.org> References: <20170914183516.19537-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::22b Subject: [Qemu-devel] [PATCH 10/10] target/mips: Support Capstone in disas_set_info X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yongbok Kim , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Cc: Aurelien Jarno Cc: Yongbok Kim Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- target/mips/cpu.h | 2 ++ target/mips/cpu.c | 8 -------- target/mips/translate_init.c | 36 ++++++++++++++++++++++++++++++++++++ 3 files changed, 38 insertions(+), 8 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 74f6a5b098..dca713825d 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1118,4 +1118,6 @@ static inline void QEMU_NORETURN do_raise_exception(C= PUMIPSState *env, do_raise_exception_err(env, exception, 0, pc); } =20 +void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info); + #endif /* MIPS_CPU_H */ diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 1bb66b7a5a..898f1b3759 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -111,14 +111,6 @@ static void mips_cpu_reset(CPUState *s) #endif } =20 -static void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) { -#ifdef TARGET_WORDS_BIGENDIAN - info->print_insn =3D print_insn_big_mips; -#else - info->print_insn =3D print_insn_little_mips; -#endif -} - static void mips_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c index 255d25bacd..1d43b3c36d 100644 --- a/target/mips/translate_init.c +++ b/target/mips/translate_init.c @@ -947,3 +947,39 @@ static void msa_reset(CPUMIPSState *env) /* set proper signanling bit meaning ("1" means "quiet") */ set_snan_bit_is_one(0, &env->active_tc.msa_fp_status); } + +#include "disas/capstone.h" + +void mips_cpu_disas_set_info(CPUState *s, disassemble_info *info) +{ + MIPSCPU *cpu =3D MIPS_CPU(s); + CPUMIPSState *env =3D &cpu->env; + int insn_flags =3D env->cpu_model->insn_flags; + int cap_mode; + +#ifdef TARGET_WORDS_BIGENDIAN + info->print_insn =3D print_insn_big_mips; +#else + info->print_insn =3D print_insn_little_mips; +#endif + + cap_mode =3D 0; + if (insn_flags & ISA_MIPS3) { + cap_mode |=3D CS_MODE_MIPS3; + } + if (insn_flags & ISA_MIPS32) { + cap_mode |=3D CS_MODE_MIPS32; + } + if (insn_flags & ISA_MIPS64) { + cap_mode |=3D CS_MODE_MIPS64; + } + if (insn_flags & ISA_MIPS32R6) { + cap_mode |=3D CS_MODE_MIPS32R6; + } +#ifdef TARGET_MIPS64 + cap_mode |=3D CS_MODE_MIPSGP64; +#endif + + info->cap_arch =3D CS_ARCH_MIPS; + info->cap_mode =3D cap_mode; +} --=20 2.13.5