From nobody Sun Feb 8 13:53:25 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505303553923288.61731726528274; Wed, 13 Sep 2017 04:52:33 -0700 (PDT) Received: from localhost ([::1]:41776 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ds6DZ-0001Xa-4d for importer@patchew.org; Wed, 13 Sep 2017 07:52:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43379) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ds6Bv-0000Tt-PU for qemu-devel@nongnu.org; Wed, 13 Sep 2017 07:50:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ds6Br-0005Vr-1V for qemu-devel@nongnu.org; Wed, 13 Sep 2017 07:50:51 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:44610) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ds6Bq-0005V4-Fg for qemu-devel@nongnu.org; Wed, 13 Sep 2017 07:50:46 -0400 Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v8DBniXE112306 for ; Wed, 13 Sep 2017 07:50:45 -0400 Received: from e06smtp12.uk.ibm.com (e06smtp12.uk.ibm.com [195.75.94.108]) by mx0a-001b2d01.pphosted.com with ESMTP id 2cy24cp0tg-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 13 Sep 2017 07:50:45 -0400 Received: from localhost by e06smtp12.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 13 Sep 2017 12:50:39 +0100 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v8DBocJ820709546; Wed, 13 Sep 2017 11:50:38 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 191DA4C04A; Wed, 13 Sep 2017 12:47:12 +0100 (BST) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D594C4C040; Wed, 13 Sep 2017 12:47:11 +0100 (BST) Received: from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTPS; Wed, 13 Sep 2017 12:47:11 +0100 (BST) From: Halil Pasic To: Cornelia Huck Date: Wed, 13 Sep 2017 13:50:28 +0200 X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170913115029.47626-1-pasic@linux.vnet.ibm.com> References: <20170913115029.47626-1-pasic@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17091311-0008-0000-0000-00000496A0CB X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17091311-0009-0000-0000-00001E27BB2D Message-Id: <20170913115029.47626-4-pasic@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-09-13_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1709130186 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH v2 3/4] virtio-ccw: use ccw data stream X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dong Jia Shi , Halil Pasic , Pierre Morel , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Replace direct access which implicitly assumes no IDA or MIDA with the new ccw data stream interface which should cope with these transparently in the future. Signed-off-by: Halil Pasic Reviewed-by: Dong Jia Shi Reviewed-by: Pierre Morel --- v1 --> v2: Removed todo comments on possible errno change as with https://lists.nongnu.org/archive/html/qemu-devel/2017-09/msg02441.html applied it does not matter any more. Error handling: At the moment we ignore errors reported by stream ops to keep the change minimal. An add-on patch improving on this is to be expected later. --- hw/s390x/virtio-ccw.c | 156 +++++++++++++++-------------------------------= ---- 1 file changed, 46 insertions(+), 110 deletions(-) diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c index b1976fdd19..a9baf6f7ab 100644 --- a/hw/s390x/virtio-ccw.c +++ b/hw/s390x/virtio-ccw.c @@ -287,49 +287,19 @@ static int virtio_ccw_handle_set_vq(SubchDev *sch, CC= W1 ccw, bool check_len, return -EFAULT; } if (is_legacy) { - linfo.queue =3D address_space_ldq_be(&address_space_memory, ccw.cd= a, - MEMTXATTRS_UNSPECIFIED, NULL); - linfo.align =3D address_space_ldl_be(&address_space_memory, - ccw.cda + sizeof(linfo.queue), - MEMTXATTRS_UNSPECIFIED, - NULL); - linfo.index =3D address_space_lduw_be(&address_space_memory, - ccw.cda + sizeof(linfo.queue) - + sizeof(linfo.align), - MEMTXATTRS_UNSPECIFIED, - NULL); - linfo.num =3D address_space_lduw_be(&address_space_memory, - ccw.cda + sizeof(linfo.queue) - + sizeof(linfo.align) - + sizeof(linfo.index), - MEMTXATTRS_UNSPECIFIED, - NULL); + ccw_dstream_read(&sch->cds, linfo); + be64_to_cpus(&linfo.queue); + be32_to_cpus(&linfo.align); + be16_to_cpus(&linfo.index); + be16_to_cpus(&linfo.num); ret =3D virtio_ccw_set_vqs(sch, NULL, &linfo); } else { - info.desc =3D address_space_ldq_be(&address_space_memory, ccw.cda, - MEMTXATTRS_UNSPECIFIED, NULL); - info.index =3D address_space_lduw_be(&address_space_memory, - ccw.cda + sizeof(info.desc) - + sizeof(info.res0), - MEMTXATTRS_UNSPECIFIED, NULL); - info.num =3D address_space_lduw_be(&address_space_memory, - ccw.cda + sizeof(info.desc) - + sizeof(info.res0) - + sizeof(info.index), - MEMTXATTRS_UNSPECIFIED, NULL); - info.avail =3D address_space_ldq_be(&address_space_memory, - ccw.cda + sizeof(info.desc) - + sizeof(info.res0) - + sizeof(info.index) - + sizeof(info.num), - MEMTXATTRS_UNSPECIFIED, NULL); - info.used =3D address_space_ldq_be(&address_space_memory, - ccw.cda + sizeof(info.desc) - + sizeof(info.res0) - + sizeof(info.index) - + sizeof(info.num) - + sizeof(info.avail), - MEMTXATTRS_UNSPECIFIED, NULL); + ccw_dstream_read(&sch->cds, info); + be64_to_cpus(&info.desc); + be16_to_cpus(&info.index); + be16_to_cpus(&info.num); + be64_to_cpus(&info.avail); + be64_to_cpus(&info.used); ret =3D virtio_ccw_set_vqs(sch, &info, NULL); } sch->curr_status.scsw.count =3D 0; @@ -342,15 +312,13 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) VirtioRevInfo revinfo; uint8_t status; VirtioFeatDesc features; - void *config; hwaddr indicators; VqConfigBlock vq_config; VirtioCcwDevice *dev =3D sch->driver_data; VirtIODevice *vdev =3D virtio_ccw_get_vdev(sch); bool check_len; int len; - hwaddr hw_len; - VirtioThinintInfo *thinint; + VirtioThinintInfo thinint; =20 if (!dev) { return -EINVAL; @@ -394,11 +362,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) } else { VirtioDeviceClass *vdc =3D VIRTIO_DEVICE_GET_CLASS(vdev); =20 - features.index =3D address_space_ldub(&address_space_memory, - ccw.cda - + sizeof(features.features= ), - MEMTXATTRS_UNSPECIFIED, - NULL); + ccw_dstream_advance(&sch->cds, sizeof(features.features)); + ccw_dstream_read(&sch->cds, features.index); if (features.index =3D=3D 0) { if (dev->revision >=3D 1) { /* Don't offer legacy features for modern devices. */ @@ -417,9 +382,9 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) /* Return zeroes if the guest supports more feature bits. = */ features.features =3D 0; } - address_space_stl_le(&address_space_memory, ccw.cda, - features.features, MEMTXATTRS_UNSPECIFIED, - NULL); + ccw_dstream_rewind(&sch->cds); + cpu_to_le32s(&features.features); + ccw_dstream_write(&sch->cds, features.features); sch->curr_status.scsw.count =3D ccw.count - sizeof(features); ret =3D 0; } @@ -438,15 +403,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) if (!ccw.cda) { ret =3D -EFAULT; } else { - features.index =3D address_space_ldub(&address_space_memory, - ccw.cda - + sizeof(features.features= ), - MEMTXATTRS_UNSPECIFIED, - NULL); - features.features =3D address_space_ldl_le(&address_space_memo= ry, - ccw.cda, - MEMTXATTRS_UNSPECIFIE= D, - NULL); + ccw_dstream_read(&sch->cds, features); + le32_to_cpus(&features.features); if (features.index =3D=3D 0) { virtio_set_features(vdev, (vdev->guest_features & 0xffffffff0000= 0000ULL) | @@ -488,7 +446,7 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) } else { virtio_bus_get_vdev_config(&dev->bus, vdev->config); /* XXX config space endianness */ - cpu_physical_memory_write(ccw.cda, vdev->config, len); + ccw_dstream_write_buf(&sch->cds, vdev->config, len); sch->curr_status.scsw.count =3D ccw.count - len; ret =3D 0; } @@ -501,21 +459,13 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) } } len =3D MIN(ccw.count, vdev->config_len); - hw_len =3D len; if (!ccw.cda) { ret =3D -EFAULT; } else { - config =3D cpu_physical_memory_map(ccw.cda, &hw_len, 0); - if (!config) { - ret =3D -EFAULT; - } else { - len =3D hw_len; - /* XXX config space endianness */ - memcpy(vdev->config, config, len); - cpu_physical_memory_unmap(config, hw_len, 0, hw_len); + ret =3D ccw_dstream_read_buf(&sch->cds, vdev->config, len); + if (!ret) { virtio_bus_set_vdev_config(&dev->bus, vdev->config); sch->curr_status.scsw.count =3D ccw.count - len; - ret =3D 0; } } break; @@ -553,8 +503,7 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) if (!ccw.cda) { ret =3D -EFAULT; } else { - status =3D address_space_ldub(&address_space_memory, ccw.cda, - MEMTXATTRS_UNSPECIFIED, NULL); + ccw_dstream_read(&sch->cds, status); if (!(status & VIRTIO_CONFIG_S_DRIVER_OK)) { virtio_ccw_stop_ioeventfd(dev); } @@ -597,8 +546,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) if (!ccw.cda) { ret =3D -EFAULT; } else { - indicators =3D address_space_ldq_be(&address_space_memory, ccw= .cda, - MEMTXATTRS_UNSPECIFIED, NULL= ); + ccw_dstream_read(&sch->cds, indicators); + be64_to_cpus(&indicators); dev->indicators =3D get_indicator(indicators, sizeof(uint64_t)= ); sch->curr_status.scsw.count =3D ccw.count - sizeof(indicators); ret =3D 0; @@ -618,8 +567,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) if (!ccw.cda) { ret =3D -EFAULT; } else { - indicators =3D address_space_ldq_be(&address_space_memory, ccw= .cda, - MEMTXATTRS_UNSPECIFIED, NULL= ); + ccw_dstream_read(&sch->cds, indicators); + be64_to_cpus(&indicators); dev->indicators2 =3D get_indicator(indicators, sizeof(uint64_t= )); sch->curr_status.scsw.count =3D ccw.count - sizeof(indicators); ret =3D 0; @@ -639,67 +588,58 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) if (!ccw.cda) { ret =3D -EFAULT; } else { - vq_config.index =3D address_space_lduw_be(&address_space_memor= y, - ccw.cda, - MEMTXATTRS_UNSPECIFIED, - NULL); + ccw_dstream_read(&sch->cds, vq_config.index); + be16_to_cpus(&vq_config.index); if (vq_config.index >=3D VIRTIO_QUEUE_MAX) { ret =3D -EINVAL; break; } vq_config.num_max =3D virtio_queue_get_num(vdev, vq_config.index); - address_space_stw_be(&address_space_memory, - ccw.cda + sizeof(vq_config.index), - vq_config.num_max, - MEMTXATTRS_UNSPECIFIED, - NULL); + cpu_to_be16s(&vq_config.num_max); + ccw_dstream_write(&sch->cds, vq_config.num_max); sch->curr_status.scsw.count =3D ccw.count - sizeof(vq_config); ret =3D 0; } break; case CCW_CMD_SET_IND_ADAPTER: if (check_len) { - if (ccw.count !=3D sizeof(*thinint)) { + if (ccw.count !=3D sizeof(thinint)) { ret =3D -EINVAL; break; } - } else if (ccw.count < sizeof(*thinint)) { + } else if (ccw.count < sizeof(thinint)) { /* Can't execute command. */ ret =3D -EINVAL; break; } - len =3D sizeof(*thinint); - hw_len =3D len; if (!ccw.cda) { ret =3D -EFAULT; } else if (dev->indicators && !sch->thinint_active) { /* Trigger a command reject. */ ret =3D -ENOSYS; } else { - thinint =3D cpu_physical_memory_map(ccw.cda, &hw_len, 0); - if (!thinint) { + if (ccw_dstream_read(&sch->cds, thinint)) { ret =3D -EFAULT; } else { - uint64_t ind_bit =3D ldq_be_p(&thinint->ind_bit); + be64_to_cpus(&thinint.ind_bit); + be64_to_cpus(&thinint.summary_indicator); + be64_to_cpus(&thinint.device_indicator); =20 - len =3D hw_len; dev->summary_indicator =3D - get_indicator(ldq_be_p(&thinint->summary_indicator), - sizeof(uint8_t)); + get_indicator(thinint.summary_indicator, sizeof(uint8_= t)); dev->indicators =3D - get_indicator(ldq_be_p(&thinint->device_indicator), - ind_bit / 8 + 1); - dev->thinint_isc =3D thinint->isc; - dev->routes.adapter.ind_offset =3D ind_bit; + get_indicator(thinint.device_indicator, + thinint.ind_bit / 8 + 1); + dev->thinint_isc =3D thinint.isc; + dev->routes.adapter.ind_offset =3D thinint.ind_bit; dev->routes.adapter.summary_offset =3D 7; - cpu_physical_memory_unmap(thinint, hw_len, 0, hw_len); dev->routes.adapter.adapter_id =3D css_get_adapter_id( CSS_IO_ADAPTER_VIRTIO, dev->thinint_isc); sch->thinint_active =3D ((dev->indicators !=3D NULL) && (dev->summary_indicator !=3D NULL)); - sch->curr_status.scsw.count =3D ccw.count - len; + sch->curr_status.scsw.count =3D ccw.count - sizeof(thinint= ); ret =3D 0; } } @@ -714,13 +654,9 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw) ret =3D -EFAULT; break; } - revinfo.revision =3D - address_space_lduw_be(&address_space_memory, ccw.cda, - MEMTXATTRS_UNSPECIFIED, NULL); - revinfo.length =3D - address_space_lduw_be(&address_space_memory, - ccw.cda + sizeof(revinfo.revision), - MEMTXATTRS_UNSPECIFIED, NULL); + ccw_dstream_read_buf(&sch->cds, &revinfo, 4); + be16_to_cpus(&revinfo.revision); + be16_to_cpus(&revinfo.length); if (ccw.count < len + revinfo.length || (check_len && ccw.count > len + revinfo.length)) { ret =3D -EINVAL; --=20 2.13.5