From nobody Mon Feb 9 08:11:23 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505151347334241.12595506396838; Mon, 11 Sep 2017 10:35:47 -0700 (PDT) Received: from localhost ([::1]:59396 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1drScc-0004Cf-6P for importer@patchew.org; Mon, 11 Sep 2017 13:35:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38432) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1drSOK-0007Gk-2r for qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:21:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1drSOI-0001BY-75 for qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:21:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:55102) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1drSOH-0001BB-VU for qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:20:58 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1827C11A28D for ; Mon, 11 Sep 2017 17:20:57 +0000 (UTC) Received: from red.redhat.com (ovpn-120-44.rdu2.redhat.com [10.10.120.44]) by smtp.corp.redhat.com (Postfix) with ESMTP id 420F45D9CA; Mon, 11 Sep 2017 17:20:56 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 1827C11A28D Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=eblake@redhat.com From: Eric Blake To: qemu-devel@nongnu.org Date: Mon, 11 Sep 2017 12:19:59 -0500 Message-Id: <20170911172022.4738-16-eblake@redhat.com> In-Reply-To: <20170911172022.4738-1-eblake@redhat.com> References: <20170911172022.4738-1-eblake@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 11 Sep 2017 17:20:57 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v7 15/38] libqos: Use explicit QTestState for i2c operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, thuth@redhat.com, armbru@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Drop one more client of global_qtest by teaching all i2c test functionality to pass in an explicit QTestState, adjusting all callers. Signed-off-by: Eric Blake Reviewed-by: Thomas Huth --- tests/libqos/i2c.h | 7 ++++-- tests/ds1338-test.c | 6 ++--- tests/libqos/i2c-imx.c | 67 +++++++++++++++++++++++++--------------------= ---- tests/libqos/i2c-omap.c | 45 +++++++++++++++++---------------- tests/tmp105-test.c | 6 ++--- 5 files changed, 66 insertions(+), 65 deletions(-) diff --git a/tests/libqos/i2c.h b/tests/libqos/i2c.h index 6e648f922a..eb40b808bd 100644 --- a/tests/libqos/i2c.h +++ b/tests/libqos/i2c.h @@ -9,6 +9,7 @@ #ifndef LIBQOS_I2C_H #define LIBQOS_I2C_H +#include "libqtest.h" typedef struct I2CAdapter I2CAdapter; struct I2CAdapter { @@ -16,6 +17,8 @@ struct I2CAdapter { const uint8_t *buf, uint16_t len); void (*recv)(I2CAdapter *adapter, uint8_t addr, uint8_t *buf, uint16_t len); + + QTestState *qts; }; void i2c_send(I2CAdapter *i2c, uint8_t addr, @@ -24,9 +27,9 @@ void i2c_recv(I2CAdapter *i2c, uint8_t addr, uint8_t *buf, uint16_t len); /* libi2c-omap.c */ -I2CAdapter *omap_i2c_create(uint64_t addr); +I2CAdapter *omap_i2c_create(QTestState *qts, uint64_t addr); /* libi2c-imx.c */ -I2CAdapter *imx_i2c_create(uint64_t addr); +I2CAdapter *imx_i2c_create(QTestState *qts, uint64_t addr); #endif diff --git a/tests/ds1338-test.c b/tests/ds1338-test.c index 26968bc82a..742dad9113 100644 --- a/tests/ds1338-test.c +++ b/tests/ds1338-test.c @@ -61,16 +61,14 @@ int main(int argc, char **argv) g_test_init(&argc, &argv, NULL); s =3D qtest_start("-display none -machine imx25-pdk"); - i2c =3D imx_i2c_create(IMX25_I2C_0_BASE); + i2c =3D imx_i2c_create(s, IMX25_I2C_0_BASE); addr =3D DS1338_ADDR; qtest_add_func("/ds1338/tx-rx", send_and_receive); ret =3D g_test_run(); - if (s) { - qtest_quit(s); - } + qtest_quit(s); g_free(i2c); return ret; diff --git a/tests/libqos/i2c-imx.c b/tests/libqos/i2c-imx.c index 1c4b4314ba..0945f2ecdc 100644 --- a/tests/libqos/i2c-imx.c +++ b/tests/libqos/i2c-imx.c @@ -40,8 +40,8 @@ typedef struct IMXI2C { static void imx_i2c_set_slave_addr(IMXI2C *s, uint8_t addr, enum IMXI2CDirection direction) { - writeb(s->addr + I2DR_ADDR, (addr << 1) | - (direction =3D=3D IMX_I2C_READ ? 1 : 0)); + qtest_writeb(s->parent.qts, s->addr + I2DR_ADDR, + (addr << 1) | (direction =3D=3D IMX_I2C_READ ? 1 : 0)); } static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr, @@ -63,35 +63,35 @@ static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr, I2CR_MTX | I2CR_TXAK; - writeb(s->addr + I2CR_ADDR, data); - status =3D readb(s->addr + I2SR_ADDR); + qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IBB) !=3D 0); /* set the slave address */ imx_i2c_set_slave_addr(s, addr, IMX_I2C_WRITE); - status =3D readb(s->addr + I2SR_ADDR); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) !=3D 0); g_assert((status & I2SR_RXAK) =3D=3D 0); /* ack the interrupt */ - writeb(s->addr + I2SR_ADDR, 0); - status =3D readb(s->addr + I2SR_ADDR); + qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) =3D=3D 0); while (size < len) { /* check we are still busy */ - status =3D readb(s->addr + I2SR_ADDR); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IBB) !=3D 0); /* write the data */ - writeb(s->addr + I2DR_ADDR, buf[size]); - status =3D readb(s->addr + I2SR_ADDR); + qtest_writeb(i2c->qts, s->addr + I2DR_ADDR, buf[size]); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) !=3D 0); g_assert((status & I2SR_RXAK) =3D=3D 0); /* ack the interrupt */ - writeb(s->addr + I2SR_ADDR, 0); - status =3D readb(s->addr + I2SR_ADDR); + qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) =3D=3D 0); size++; @@ -99,8 +99,8 @@ static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr, /* release the bus */ data &=3D ~(I2CR_MSTA | I2CR_MTX); - writeb(s->addr + I2CR_ADDR, data); - status =3D readb(s->addr + I2SR_ADDR); + qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IBB) =3D=3D 0); } @@ -123,19 +123,19 @@ static void imx_i2c_recv(I2CAdapter *i2c, uint8_t add= r, I2CR_MTX | I2CR_TXAK; - writeb(s->addr + I2CR_ADDR, data); - status =3D readb(s->addr + I2SR_ADDR); + qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IBB) !=3D 0); /* set the slave address */ imx_i2c_set_slave_addr(s, addr, IMX_I2C_READ); - status =3D readb(s->addr + I2SR_ADDR); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) !=3D 0); g_assert((status & I2SR_RXAK) =3D=3D 0); /* ack the interrupt */ - writeb(s->addr + I2SR_ADDR, 0); - status =3D readb(s->addr + I2SR_ADDR); + qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) =3D=3D 0); /* set the bus for read */ @@ -144,23 +144,23 @@ static void imx_i2c_recv(I2CAdapter *i2c, uint8_t add= r, if (len !=3D 1) { data &=3D ~I2CR_TXAK; } - writeb(s->addr + I2CR_ADDR, data); - status =3D readb(s->addr + I2SR_ADDR); + qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IBB) !=3D 0); /* dummy read */ - readb(s->addr + I2DR_ADDR); - status =3D readb(s->addr + I2SR_ADDR); + qtest_readb(i2c->qts, s->addr + I2DR_ADDR); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) !=3D 0); /* ack the interrupt */ - writeb(s->addr + I2SR_ADDR, 0); - status =3D readb(s->addr + I2SR_ADDR); + qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) =3D=3D 0); while (size < len) { /* check we are still busy */ - status =3D readb(s->addr + I2SR_ADDR); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IBB) !=3D 0); if (size =3D=3D (len - 1)) { @@ -170,30 +170,30 @@ static void imx_i2c_recv(I2CAdapter *i2c, uint8_t add= r, /* ack the data read */ data |=3D I2CR_TXAK; } - writeb(s->addr + I2CR_ADDR, data); + qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data); /* read the data */ - buf[size] =3D readb(s->addr + I2DR_ADDR); + buf[size] =3D qtest_readb(i2c->qts, s->addr + I2DR_ADDR); if (size !=3D (len - 1)) { - status =3D readb(s->addr + I2SR_ADDR); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) !=3D 0); /* ack the interrupt */ - writeb(s->addr + I2SR_ADDR, 0); + qtest_writeb(i2c->qts, s->addr + I2SR_ADDR, 0); } - status =3D readb(s->addr + I2SR_ADDR); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IIF) =3D=3D 0); size++; } - status =3D readb(s->addr + I2SR_ADDR); + status =3D qtest_readb(i2c->qts, s->addr + I2SR_ADDR); g_assert((status & I2SR_IBB) =3D=3D 0); } -I2CAdapter *imx_i2c_create(uint64_t addr) +I2CAdapter *imx_i2c_create(QTestState *qts, uint64_t addr) { IMXI2C *s =3D g_malloc0(sizeof(*s)); I2CAdapter *i2c =3D (I2CAdapter *)s; @@ -202,6 +202,7 @@ I2CAdapter *imx_i2c_create(uint64_t addr) i2c->send =3D imx_i2c_send; i2c->recv =3D imx_i2c_recv; + i2c->qts =3D qts; return i2c; } diff --git a/tests/libqos/i2c-omap.c b/tests/libqos/i2c-omap.c index f603fdf43c..1ef6e7b200 100644 --- a/tests/libqos/i2c-omap.c +++ b/tests/libqos/i2c-omap.c @@ -51,8 +51,8 @@ static void omap_i2c_set_slave_addr(OMAPI2C *s, uint8_t a= ddr) { uint16_t data =3D addr; - writew(s->addr + OMAP_I2C_SA, data); - data =3D readw(s->addr + OMAP_I2C_SA); + qtest_writew(s->parent.qts, s->addr + OMAP_I2C_SA, data); + data =3D qtest_readw(s->parent.qts, s->addr + OMAP_I2C_SA); g_assert_cmphex(data, =3D=3D, addr); } @@ -65,38 +65,38 @@ static void omap_i2c_send(I2CAdapter *i2c, uint8_t addr, omap_i2c_set_slave_addr(s, addr); data =3D len; - writew(s->addr + OMAP_I2C_CNT, data); + qtest_writew(i2c->qts, s->addr + OMAP_I2C_CNT, data); data =3D OMAP_I2C_CON_I2C_EN | OMAP_I2C_CON_TRX | OMAP_I2C_CON_MST | OMAP_I2C_CON_STT | OMAP_I2C_CON_STP; - writew(s->addr + OMAP_I2C_CON, data); - data =3D readw(s->addr + OMAP_I2C_CON); + qtest_writew(i2c->qts, s->addr + OMAP_I2C_CON, data); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON); g_assert((data & OMAP_I2C_CON_STP) !=3D 0); - data =3D readw(s->addr + OMAP_I2C_STAT); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT); g_assert((data & OMAP_I2C_STAT_NACK) =3D=3D 0); while (len > 1) { - data =3D readw(s->addr + OMAP_I2C_STAT); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT); g_assert((data & OMAP_I2C_STAT_XRDY) !=3D 0); data =3D buf[0] | ((uint16_t)buf[1] << 8); - writew(s->addr + OMAP_I2C_DATA, data); + qtest_writew(i2c->qts, s->addr + OMAP_I2C_DATA, data); buf =3D (uint8_t *)buf + 2; len -=3D 2; } if (len =3D=3D 1) { - data =3D readw(s->addr + OMAP_I2C_STAT); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT); g_assert((data & OMAP_I2C_STAT_XRDY) !=3D 0); data =3D buf[0]; - writew(s->addr + OMAP_I2C_DATA, data); + qtest_writew(i2c->qts, s->addr + OMAP_I2C_DATA, data); } - data =3D readw(s->addr + OMAP_I2C_CON); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON); g_assert((data & OMAP_I2C_CON_STP) =3D=3D 0); } @@ -109,30 +109,30 @@ static void omap_i2c_recv(I2CAdapter *i2c, uint8_t ad= dr, omap_i2c_set_slave_addr(s, addr); data =3D len; - writew(s->addr + OMAP_I2C_CNT, data); + qtest_writew(i2c->qts, s->addr + OMAP_I2C_CNT, data); data =3D OMAP_I2C_CON_I2C_EN | OMAP_I2C_CON_MST | OMAP_I2C_CON_STT | OMAP_I2C_CON_STP; - writew(s->addr + OMAP_I2C_CON, data); - data =3D readw(s->addr + OMAP_I2C_CON); + qtest_writew(i2c->qts, s->addr + OMAP_I2C_CON, data); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON); g_assert((data & OMAP_I2C_CON_STP) =3D=3D 0); - data =3D readw(s->addr + OMAP_I2C_STAT); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT); g_assert((data & OMAP_I2C_STAT_NACK) =3D=3D 0); - data =3D readw(s->addr + OMAP_I2C_CNT); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_CNT); g_assert_cmpuint(data, =3D=3D, len); while (len > 0) { - data =3D readw(s->addr + OMAP_I2C_STAT); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT); g_assert((data & OMAP_I2C_STAT_RRDY) !=3D 0); g_assert((data & OMAP_I2C_STAT_ROVR) =3D=3D 0); - data =3D readw(s->addr + OMAP_I2C_DATA); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_DATA); - stat =3D readw(s->addr + OMAP_I2C_STAT); + stat =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_STAT); if (unlikely(len =3D=3D 1)) { g_assert((stat & OMAP_I2C_STAT_SBD) !=3D 0); @@ -148,11 +148,11 @@ static void omap_i2c_recv(I2CAdapter *i2c, uint8_t ad= dr, } } - data =3D readw(s->addr + OMAP_I2C_CON); + data =3D qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON); g_assert((data & OMAP_I2C_CON_STP) =3D=3D 0); } -I2CAdapter *omap_i2c_create(uint64_t addr) +I2CAdapter *omap_i2c_create(QTestState *qts, uint64_t addr) { OMAPI2C *s =3D g_malloc0(sizeof(*s)); I2CAdapter *i2c =3D (I2CAdapter *)s; @@ -162,9 +162,10 @@ I2CAdapter *omap_i2c_create(uint64_t addr) i2c->send =3D omap_i2c_send; i2c->recv =3D omap_i2c_recv; + i2c->qts =3D qts; /* verify the mmio address by looking for a known signature */ - data =3D readw(addr + OMAP_I2C_REV); + data =3D qtest_readw(qts, addr + OMAP_I2C_REV); g_assert_cmphex(data, =3D=3D, 0x34); return i2c; diff --git a/tests/tmp105-test.c b/tests/tmp105-test.c index a7940a4639..382f88ba23 100644 --- a/tests/tmp105-test.c +++ b/tests/tmp105-test.c @@ -154,15 +154,13 @@ int main(int argc, char **argv) s =3D qtest_start("-machine n800 " "-device tmp105,bus=3Di2c-bus.0,id=3D" TMP105_TEST_ID ",address=3D0x49"); - i2c =3D omap_i2c_create(OMAP2_I2C_1_BASE); + i2c =3D omap_i2c_create(s, OMAP2_I2C_1_BASE); qtest_add_func("/tmp105/tx-rx", send_and_receive); ret =3D g_test_run(); - if (s) { - qtest_quit(s); - } + qtest_quit(s); g_free(i2c); return ret; --=20 2.13.5