From nobody Sun Feb 8 16:32:29 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505139790213814.0467414678488; Mon, 11 Sep 2017 07:23:10 -0700 (PDT) Received: from localhost ([::1]:58058 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1drPcD-0000NQ-8Y for importer@patchew.org; Mon, 11 Sep 2017 10:23:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50859) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1drPaR-0007cS-DG for qemu-devel@nongnu.org; Mon, 11 Sep 2017 10:21:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1drPaL-0001ot-Mk for qemu-devel@nongnu.org; Mon, 11 Sep 2017 10:21:19 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51192) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1drPaG-0001lO-4z; Mon, 11 Sep 2017 10:21:08 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 25367113204; Mon, 11 Sep 2017 14:21:07 +0000 (UTC) Received: from thinkpad.redhat.com (ovpn-116-239.ams2.redhat.com [10.36.116.239]) by smtp.corp.redhat.com (Postfix) with ESMTP id 651D2649CC; Mon, 11 Sep 2017 14:21:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 25367113204 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=lvivier@redhat.com From: Laurent Vivier To: qemu-devel@nongnu.org Date: Mon, 11 Sep 2017 16:20:55 +0200 Message-Id: <20170911142056.15643-3-lvivier@redhat.com> In-Reply-To: <20170911142056.15643-1-lvivier@redhat.com> References: <20170911142056.15643-1-lvivier@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Mon, 11 Sep 2017 14:21:07 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 2/3] hmp: fix "dump-quest-memory" segfault (arm) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Thomas Huth , Cornelia Huck , "Dr . David Alan Gilbert" , Greg Kurz , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Commit fd5d23babf (hmp: fix "dump-quest-memory" segfault) fixes the problem for i386, do the same for arm. Running QEMU with qemu-system-aarch64 -M none -nographic -m 256 and executing dump-guest-memory /dev/null 0 8192 results in segfault Fix by checking if we have CPU. Signed-off-by: Laurent Vivier Reviewed-by: Greg Kurz --- target/arm/arch_dump.c | 52 +++++++++++++++++++++++++++++++++-------------= ---- 1 file changed, 34 insertions(+), 18 deletions(-) diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c index 1a9861f69b..1f58cff256 100644 --- a/target/arm/arch_dump.c +++ b/target/arm/arch_dump.c @@ -273,8 +273,6 @@ int arm_cpu_write_elf32_note(WriteCoreDumpFunction f, C= PUState *cs, int cpu_get_dump_info(ArchDumpInfo *info, const GuestPhysBlockList *guest_phys_blocks) { - ARMCPU *cpu =3D ARM_CPU(first_cpu); - CPUARMState *env =3D &cpu->env; GuestPhysBlock *block; hwaddr lowest_addr =3D ULLONG_MAX; =20 @@ -290,13 +288,32 @@ int cpu_get_dump_info(ArchDumpInfo *info, } } =20 - if (arm_feature(env, ARM_FEATURE_AARCH64)) { - info->d_machine =3D EM_AARCH64; - info->d_class =3D ELFCLASS64; - info->page_size =3D (1 << 16); /* aarch64 max pagesize */ - if (lowest_addr !=3D ULLONG_MAX) { - info->phys_base =3D lowest_addr; + if (first_cpu) { + ARMCPU *cpu =3D ARM_CPU(first_cpu); + CPUARMState *env =3D &cpu->env; + if (arm_feature(env, ARM_FEATURE_AARCH64)) { + info->d_machine =3D EM_AARCH64; + info->d_class =3D ELFCLASS64; + info->page_size =3D (1 << 16); /* aarch64 max pagesize */ + if (lowest_addr !=3D ULLONG_MAX) { + info->phys_base =3D lowest_addr; + } + } else { + info->d_machine =3D EM_ARM; + info->d_class =3D ELFCLASS32; + info->page_size =3D (1 << 12); + if (lowest_addr < UINT_MAX) { + info->phys_base =3D lowest_addr; + } } + + /* We assume the relevant endianness is that of EL1; this is right + * for kernels, but might give the wrong answer if you're trying to + * dump a hypervisor that happens to be running an opposite-endian + * kernel. + */ + info->d_endian =3D (env->cp15.sctlr_el[1] & SCTLR_EE) !=3D 0 + ? ELFDATA2MSB : ELFDATA2LSB; } else { info->d_machine =3D EM_ARM; info->d_class =3D ELFCLASS32; @@ -304,25 +321,24 @@ int cpu_get_dump_info(ArchDumpInfo *info, if (lowest_addr < UINT_MAX) { info->phys_base =3D lowest_addr; } + info->d_endian =3D ELFDATA2LSB; } =20 - /* We assume the relevant endianness is that of EL1; this is right - * for kernels, but might give the wrong answer if you're trying to - * dump a hypervisor that happens to be running an opposite-endian - * kernel. - */ - info->d_endian =3D (env->cp15.sctlr_el[1] & SCTLR_EE) !=3D 0 - ? ELFDATA2MSB : ELFDATA2LSB; - return 0; } =20 ssize_t cpu_get_note_size(int class, int machine, int nr_cpus) { - ARMCPU *cpu =3D ARM_CPU(first_cpu); - CPUARMState *env =3D &cpu->env; + ARMCPU *cpu; + CPUARMState *env; size_t note_size; =20 + if (first_cpu =3D=3D NULL) { + return 0; + } + + cpu =3D ARM_CPU(first_cpu); + env =3D &cpu->env; if (class =3D=3D ELFCLASS64) { note_size =3D AARCH64_PRSTATUS_NOTE_SIZE; note_size +=3D AARCH64_PRFPREG_NOTE_SIZE; --=20 2.13.5