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[97.126.108.236]) by smtp.gmail.com with ESMTPSA id h19sm770678pfh.142.2017.09.07.15.41.20 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 07 Sep 2017 15:41:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=yBOu7JqCOYL/zdGWF1N82TvQobuXyOfCGYZq1uRWpb0=; b=VmPATD0ptYLRoh1GGAo8LC3hiwDUVY2YE29ioS+3EobbsdwCP1G5WvXPff6bJIbng/ F9zkEkp385Ms4U0n1sdkK3eKRQWopTyYDUfeiu3gl0h/urwmd1pcUKDcp6e6k+VaS5r4 rEA3GOjvoBntcb2/xPpC6DG0+FAgjb4E0KEco= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=yBOu7JqCOYL/zdGWF1N82TvQobuXyOfCGYZq1uRWpb0=; b=tbsRvl/O4QpaT6wHQjsNOz5funcWcT5dEwG4bkPPHUP/K1dIQg8mCByM1FauarJG5b hcocglKEzqYzgdZA6np4v+H4HtSE1ZMiV+Wc8YMTubvTBGx2UK0jlhxFqRb/+gHjAh9A 4tsP2GKt/KghXFXwhTfoXluYvxVgSNVMnQaoRbp0NkuYtliS5kaT1XT5GdMAxtnabOaw gyMTJ6/waKnZFbnDeOMzsj4gMjEj/SelE1UwRyfMehqg+3m7o6ho5m1EGo9fzgyPp7xE jnRBUFR/oZr44uNw1AEBG2Zr362Pp49crybebn0vAB0HSZFt0rwbSc8Fb2WnE8I/Pewu Vf2A== X-Gm-Message-State: AHPjjUj5zdmC/jrA0e7THcrqzcg2ZmgqP77aA/75qXOHdkhDobvnQusm Mkb3g3dp+9CxKs21jbGZzg== X-Google-Smtp-Source: ADKCNb4PdCLghz5H1eb2KnMixpdTsFMIvxHm+5EZbDHmuivHgmVb/fL50hg4zyaq30QF0FykgXPK/Q== X-Received: by 10.98.80.13 with SMTP id e13mr939480pfb.341.1504824081298; Thu, 07 Sep 2017 15:41:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 7 Sep 2017 15:40:47 -0700 Message-Id: <20170907224051.21518-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.5 In-Reply-To: <20170907224051.21518-1-richard.henderson@linaro.org> References: <20170907224051.21518-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::233 Subject: [Qemu-devel] [PULL 19/23] tcg/arm: Use constant pool for movi X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Signed-off-by: Richard Henderson --- tcg/arm/tcg-target.h | 1 + tcg/arm/tcg-target.inc.c | 92 ++++++++++++++++++++++++++++++++++++++------= ---- 2 files changed, 75 insertions(+), 18 deletions(-) diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 2e92cb3283..94b3578c55 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -143,5 +143,6 @@ void tb_target_set_jmp_target(uintptr_t, uintptr_t, uin= tptr_t); #ifdef CONFIG_SOFTMMU #define TCG_TARGET_NEED_LDST_LABELS #endif +#define TCG_TARGET_NEED_POOL_LABELS =20 #endif diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c index 78603a19db..2736022d5a 100644 --- a/tcg/arm/tcg-target.inc.c +++ b/tcg/arm/tcg-target.inc.c @@ -23,6 +23,7 @@ */ =20 #include "elf.h" +#include "tcg-pool.inc.c" =20 int arm_arch =3D __ARM_ARCH; =20 @@ -203,9 +204,39 @@ static inline void reloc_pc24_atomic(tcg_insn_unit *co= de_ptr, tcg_insn_unit *tar static void patch_reloc(tcg_insn_unit *code_ptr, int type, intptr_t value, intptr_t addend) { - tcg_debug_assert(type =3D=3D R_ARM_PC24); tcg_debug_assert(addend =3D=3D 0); - reloc_pc24(code_ptr, (tcg_insn_unit *)value); + + if (type =3D=3D R_ARM_PC24) { + reloc_pc24(code_ptr, (tcg_insn_unit *)value); + } else if (type =3D=3D R_ARM_PC13) { + intptr_t diff =3D value - (uintptr_t)(code_ptr + 2); + tcg_insn_unit insn =3D *code_ptr; + bool u; + + if (diff >=3D -0xfff && diff <=3D 0xfff) { + u =3D (diff >=3D 0); + if (!u) { + diff =3D -diff; + } + } else { + int rd =3D extract32(insn, 12, 4); + int rt =3D rd =3D=3D TCG_REG_PC ? TCG_REG_TMP : rd; + assert(diff >=3D 0x1000 && diff < 0x100000); + /* add rt, pc, #high */ + *code_ptr++ =3D ((insn & 0xf0000000) | (1 << 25) | ARITH_ADD + | (TCG_REG_PC << 16) | (rt << 12) + | (20 << 7) | (diff >> 12)); + /* ldr rd, [rt, #low] */ + insn =3D deposit32(insn, 12, 4, rt); + diff &=3D 0xfff; + u =3D 1; + } + insn =3D deposit32(insn, 23, 1, u); + insn =3D deposit32(insn, 0, 12, diff); + *code_ptr =3D insn; + } else { + g_assert_not_reached(); + } } =20 #define TCG_CT_CONST_ARM 0x100 @@ -581,9 +612,20 @@ static inline void tcg_out_ld8s_r(TCGContext *s, int c= ond, TCGReg rt, tcg_out_memop_r(s, cond, INSN_LDRSB_REG, rt, rn, rm, 1, 1, 0); } =20 +static void tcg_out_movi_pool(TCGContext *s, int cond, int rd, uint32_t ar= g) +{ + /* The 12-bit range on the ldr insn is sometimes a bit too small. + In order to get around that we require two insns, one of which + will usually be a nop, but may be replaced in patch_reloc. */ + new_pool_label(s, arg, R_ARM_PC13, s->code_ptr, 0); + tcg_out_ld32_12(s, cond, rd, TCG_REG_PC, 0); + tcg_out_nop(s); +} + static void tcg_out_movi32(TCGContext *s, int cond, int rd, uint32_t arg) { - int rot, opc, rn, diff; + int rot, diff, opc, sh1, sh2; + uint32_t tt0, tt1, tt2; =20 /* Check a single MOV/MVN before anything else. */ rot =3D encode_imm(arg); @@ -631,24 +673,30 @@ static void tcg_out_movi32(TCGContext *s, int cond, i= nt rd, uint32_t arg) return; } =20 - /* TODO: This is very suboptimal, we can easily have a constant - pool somewhere after all the instructions. */ + /* Look for sequences of two insns. If we have lots of 1's, we can + shorten the sequence by beginning with mvn and then clearing + higher bits with eor. */ + tt0 =3D arg; opc =3D ARITH_MOV; - rn =3D 0; - /* If we have lots of leading 1's, we can shorten the sequence by - beginning with mvn and then clearing higher bits with eor. */ - if (clz32(~arg) > clz32(arg)) { - opc =3D ARITH_MVN, arg =3D ~arg; + if (ctpop32(arg) > 16) { + tt0 =3D ~arg; + opc =3D ARITH_MVN; + } + sh1 =3D ctz32(tt0) & ~1; + tt1 =3D tt0 & ~(0xff << sh1); + sh2 =3D ctz32(tt1) & ~1; + tt2 =3D tt1 & ~(0xff << sh2); + if (tt2 =3D=3D 0) { + rot =3D ((32 - sh1) << 7) & 0xf00; + tcg_out_dat_imm(s, cond, opc, rd, 0, ((tt0 >> sh1) & 0xff) | rot); + rot =3D ((32 - sh2) << 7) & 0xf00; + tcg_out_dat_imm(s, cond, ARITH_EOR, rd, rd, + ((tt0 >> sh2) & 0xff) | rot); + return; } - do { - int i =3D ctz32(arg) & ~1; - rot =3D ((32 - i) << 7) & 0xf00; - tcg_out_dat_imm(s, cond, opc, rd, rn, ((arg >> i) & 0xff) | rot); - arg &=3D ~(0xff << i); =20 - opc =3D ARITH_EOR; - rn =3D rd; - } while (arg); + /* Otherwise, drop it into the constant pool. */ + tcg_out_movi_pool(s, cond, rd, arg); } =20 static inline void tcg_out_dat_rI(TCGContext *s, int cond, int opc, TCGArg= dst, @@ -2164,6 +2212,14 @@ static inline void tcg_out_movi(TCGContext *s, TCGTy= pe type, tcg_out_movi32(s, COND_AL, ret, arg); } =20 +static void tcg_out_nop_fill(tcg_insn_unit *p, int count) +{ + int i; + for (i =3D 0; i < count; ++i) { + p[i] =3D INSN_NOP; + } +} + /* Compute frame size via macros, to share between tcg_target_qemu_prologue and tcg_register_jit. */ =20 --=20 2.13.5