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spf=fail smtp.mailfrom=marcel@redhat.com From: Marcel Apfelbaum To: qemu-devel@nongnu.org Date: Wed, 6 Sep 2017 17:26:57 +0300 Message-Id: <20170906142658.58298-2-marcel@redhat.com> In-Reply-To: <20170906142658.58298-1-marcel@redhat.com> References: <20170906142658.58298-1-marcel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 06 Sep 2017 14:27:18 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 1/2] pc: add 2.11 machine types X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marcel@redhat.com, pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com, mst@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Marcel Apfelbaum --- hw/i386/pc_piix.c | 15 ++++++++++++--- hw/i386/pc_q35.c | 13 +++++++++++-- include/hw/i386/pc.h | 3 +++ 3 files changed, 26 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 46dfd2c954..b03cc047c3 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -436,21 +436,30 @@ static void pc_i440fx_machine_options(MachineClass *m) m->default_display =3D "std"; } =20 -static void pc_i440fx_2_10_machine_options(MachineClass *m) +static void pc_i440fx_2_11_machine_options(MachineClass *m) { pc_i440fx_machine_options(m); m->alias =3D "pc"; m->is_default =3D 1; } =20 +DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, + pc_i440fx_2_11_machine_options); + +static void pc_i440fx_2_10_machine_options(MachineClass *m) +{ + pc_i440fx_2_11_machine_options(m); + m->is_default =3D 0; + m->alias =3D NULL; + SET_MACHINE_COMPAT(m, PC_COMPAT_2_10); +} + DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, pc_i440fx_2_10_machine_options); =20 static void pc_i440fx_2_9_machine_options(MachineClass *m) { pc_i440fx_2_10_machine_options(m); - m->is_default =3D 0; - m->alias =3D NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_2_9); m->numa_auto_assign_ram =3D numa_legacy_auto_assign_ram; } diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 169a214d50..c1cba584d1 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -302,10 +302,20 @@ static void pc_q35_machine_options(MachineClass *m) m->max_cpus =3D 288; } =20 -static void pc_q35_2_10_machine_options(MachineClass *m) +static void pc_q35_2_11_machine_options(MachineClass *m) { pc_q35_machine_options(m); m->alias =3D "q35"; +} + +DEFINE_Q35_MACHINE(v2_11, "pc-q35-2.11", NULL, + pc_q35_2_11_machine_options); + +static void pc_q35_2_10_machine_options(MachineClass *m) +{ + pc_q35_2_11_machine_options(m); + m->alias =3D NULL; + SET_MACHINE_COMPAT(m, PC_COMPAT_2_10); m->numa_auto_assign_ram =3D numa_legacy_auto_assign_ram; } =20 @@ -315,7 +325,6 @@ DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL, static void pc_q35_2_9_machine_options(MachineClass *m) { pc_q35_2_10_machine_options(m); - m->alias =3D NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_2_9); } =20 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index d80859bfad..8226904524 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -369,6 +369,9 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t); int e820_get_num_entries(void); bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); =20 +#define PC_COMPAT_2_10 \ + HW_COMPAT_2_10 \ + #define PC_COMPAT_2_9 \ HW_COMPAT_2_9 \ {\ --=20 2.13.5 From nobody Mon Apr 29 04:37:32 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1504708327197445.92298972236676; Wed, 6 Sep 2017 07:32:07 -0700 (PDT) Received: from localhost ([::1]:36431 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dpbN6-0003U4-VG for importer@patchew.org; Wed, 06 Sep 2017 10:32:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60301) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dpbIi-0008T3-3C for qemu-devel@nongnu.org; Wed, 06 Sep 2017 10:27:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dpbIg-0004oc-SB for qemu-devel@nongnu.org; Wed, 06 Sep 2017 10:27:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51092) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dpbIg-0004ng-JJ for qemu-devel@nongnu.org; Wed, 06 Sep 2017 10:27:30 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A578DC047B62; Wed, 6 Sep 2017 14:27:29 +0000 (UTC) Received: from localhost.localdomain (unknown [10.35.206.58]) by smtp.corp.redhat.com (Postfix) with ESMTP id D3C347DEFF; Wed, 6 Sep 2017 14:27:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com A578DC047B62 Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx07.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=marcel@redhat.com From: Marcel Apfelbaum To: qemu-devel@nongnu.org Date: Wed, 6 Sep 2017 17:26:58 +0300 Message-Id: <20170906142658.58298-3-marcel@redhat.com> In-Reply-To: <20170906142658.58298-1-marcel@redhat.com> References: <20170906142658.58298-1-marcel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Wed, 06 Sep 2017 14:27:29 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 2/2] hw/pcie: disable IO port fwd by default for pcie-root-port X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marcel@redhat.com, pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com, mst@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" For most cases the devices attached to PCIe Root Ports do not need IO ports range, add an 'enable-io-fwd' property making it false by default, but keeping it true for older machines. Signed-off-by: Marcel Apfelbaum --- hw/pci-bridge/gen_pcie_root_port.c | 38 ++++++++++++++++++++++++++++++++++= ++++ include/hw/compat.h | 6 +++++- 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_ro= ot_port.c index cb694d6da5..cbdeb73e2c 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -20,12 +20,26 @@ #define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100 #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR 1 =20 +#define GEN_PCIE_ROOT_PORT(obj) \ + OBJECT_CHECK(GenPCIERootPort, (obj), TYPE_GEN_PCIE_ROOT_PORT) +#define GEN_PCIE_ROOT_PORT_CLASS(klass) \ + OBJECT_CLASS_CHECK(GenPCIERootPortClass, (klass), TYPE_GEN_PCIE_ROOT_= PORT) +#define GEN_PCIE_ROOT_PORT_GET_CLASS(obj) \ + OBJECT_GET_CLASS(GenPCIERootPortClass, (obj), TYPE_GEN_PCIE_ROOT_PORT) + +typedef struct GenPCIERootPortClass { + PCIERootPortClass parent_class; + + DeviceRealize parent_realize; +} GenPCIERootPortClass; + typedef struct GenPCIERootPort { /*< private >*/ PCIESlot parent_obj; /*< public >*/ =20 bool migrate_msix; + bool enable_io_fwd; } GenPCIERootPort; =20 static uint8_t gen_rp_aer_vector(const PCIDevice *d) @@ -60,6 +74,25 @@ static bool gen_rp_test_migrate_msix(void *opaque, int v= ersion_id) return rp->migrate_msix; } =20 +static void gen_rp_realize(DeviceState *d, Error **errp) +{ + GenPCIERootPortClass *grpc =3D GEN_PCIE_ROOT_PORT_GET_CLASS(d); + GenPCIERootPort *grp =3D GEN_PCIE_ROOT_PORT(d); + PCIDevice *pci_dev =3D PCI_DEVICE(d); + + grpc->parent_realize(DEVICE(d), errp); + if (*errp) { + return; + } + + if (!grp->enable_io_fwd) { + pci_word_test_and_clear_mask(pci_dev->wmask + PCI_COMMAND, + PCI_COMMAND_IO); + pci_dev->wmask[PCI_IO_BASE] =3D 0; + pci_dev->wmask[PCI_IO_LIMIT] =3D 0; + } +} + static const VMStateDescription vmstate_rp_dev =3D { .name =3D "pcie-root-port", .version_id =3D 1, @@ -78,6 +111,7 @@ static const VMStateDescription vmstate_rp_dev =3D { =20 static Property gen_rp_props[] =3D { DEFINE_PROP_BOOL("x-migrate-msix", GenPCIERootPort, migrate_msix, true= ), + DEFINE_PROP_BOOL("enable-io-fwd", GenPCIERootPort, enable_io_fwd, fals= e), DEFINE_PROP_END_OF_LIST() }; =20 @@ -86,6 +120,7 @@ static void gen_rp_dev_class_init(ObjectClass *klass, vo= id *data) DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); PCIERootPortClass *rpc =3D PCIE_ROOT_PORT_CLASS(klass); + GenPCIERootPortClass *grpc =3D GEN_PCIE_ROOT_PORT_CLASS(klass); =20 k->vendor_id =3D PCI_VENDOR_ID_REDHAT; k->device_id =3D PCI_DEVICE_ID_REDHAT_PCIE_RP; @@ -96,6 +131,8 @@ static void gen_rp_dev_class_init(ObjectClass *klass, vo= id *data) rpc->interrupts_init =3D gen_rp_interrupts_init; rpc->interrupts_uninit =3D gen_rp_interrupts_uninit; rpc->aer_offset =3D GEN_PCIE_ROOT_PORT_AER_OFFSET; + grpc->parent_realize =3D dc->realize; + dc->realize =3D gen_rp_realize; } =20 static const TypeInfo gen_rp_dev_info =3D { @@ -103,6 +140,7 @@ static const TypeInfo gen_rp_dev_info =3D { .parent =3D TYPE_PCIE_ROOT_PORT, .instance_size =3D sizeof(GenPCIERootPort), .class_init =3D gen_rp_dev_class_init, + .class_size =3D sizeof(GenPCIERootPortClass), }; =20 static void gen_rp_register_types(void) diff --git a/include/hw/compat.h b/include/hw/compat.h index 3e101f8f67..843bf4a3a5 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -2,7 +2,11 @@ #define HW_COMPAT_H =20 #define HW_COMPAT_2_10 \ - /* empty */ + {\ + .driver =3D "pcie-root-port",\ + .property =3D "enable-io-fwd",\ + .value =3D "true",\ + }, =20 #define HW_COMPAT_2_9 \ {\ --=20 2.13.5