From nobody Wed Nov 5 08:32:58 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1504278723561196.0105544981344; Fri, 1 Sep 2017 08:12:03 -0700 (PDT) Received: from localhost ([::1]:45032 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dnnc2-0007eu-BP for importer@patchew.org; Fri, 01 Sep 2017 11:12:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40849) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dnnU5-0007z4-48 for qemu-devel@nongnu.org; Fri, 01 Sep 2017 11:03:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dnnU0-0002xv-A7 for qemu-devel@nongnu.org; Fri, 01 Sep 2017 11:03:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:5187) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dnnU0-0002xf-0B for qemu-devel@nongnu.org; Fri, 01 Sep 2017 11:03:44 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id DDC19369C4; Fri, 1 Sep 2017 15:03:42 +0000 (UTC) Received: from localhost (ovpn-116-66.gru2.redhat.com [10.97.116.66]) by smtp.corp.redhat.com (Postfix) with ESMTP id 26C77A63B6; Fri, 1 Sep 2017 15:03:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com DDC19369C4 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=ehabkost@redhat.com From: Eduardo Habkost To: Peter Maydell Date: Fri, 1 Sep 2017 12:02:56 -0300 Message-Id: <20170901150317.10380-9-ehabkost@redhat.com> In-Reply-To: <20170901150317.10380-1-ehabkost@redhat.com> References: <20170901150317.10380-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 01 Sep 2017 15:03:43 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 08/29] sparc: convert cpu features to qdev properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Igor Mammedov SPARC is the last target that uses legacy way of parsing and initializing cpu features, drop legacy approach and convert features to properties so that SPARC could as minimum benefit from generic cpu_generic_init(), common with x86 +-feat parser PS: the main purpose is to remove legacy way of cpu creation as a blocker for unifying cpu creation code across targets. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost Tested-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <1503592308-93913-5-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost --- target/sparc/cpu.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 66 insertions(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 281a99f8dd..82ab5ad8d9 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -22,6 +22,8 @@ #include "cpu.h" #include "qemu/error-report.h" #include "exec/exec-all.h" +#include "hw/qdev-properties.h" +#include "qapi/visitor.h" =20 //#define DEBUG_FEATURES =20 @@ -852,6 +854,69 @@ static void sparc_cpu_initfn(Object *obj) } } =20 +static void sparc_get_nwindows(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + SPARCCPU *cpu =3D SPARC_CPU(obj); + int64_t value =3D cpu->env.def.nwindows; + + visit_type_int(v, name, &value, errp); +} + +static void sparc_set_nwindows(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + const int64_t min =3D MIN_NWINDOWS; + const int64_t max =3D MAX_NWINDOWS; + SPARCCPU *cpu =3D SPARC_CPU(obj); + Error *err =3D NULL; + int64_t value; + + visit_type_int(v, name, &value, &err); + if (err) { + error_propagate(errp, err); + return; + } + + if (value < min || value > max) { + error_setg(errp, "Property %s.%s doesn't take value %" PRId64 + " (minimum: %" PRId64 ", maximum: %" PRId64 ")", + object_get_typename(obj), name ? name : "null", + value, min, max); + return; + } + cpu->env.def.nwindows =3D value; +} + +static PropertyInfo qdev_prop_nwindows =3D { + .name =3D "int", + .get =3D sparc_get_nwindows, + .set =3D sparc_set_nwindows, +}; + +static Property sparc_cpu_properties[] =3D { + DEFINE_PROP_BIT("float", SPARCCPU, env.def.features, 0, false), + DEFINE_PROP_BIT("float128", SPARCCPU, env.def.features, 1, false), + DEFINE_PROP_BIT("swap", SPARCCPU, env.def.features, 2, false), + DEFINE_PROP_BIT("mul", SPARCCPU, env.def.features, 3, false), + DEFINE_PROP_BIT("div", SPARCCPU, env.def.features, 4, false), + DEFINE_PROP_BIT("flush", SPARCCPU, env.def.features, 5, false), + DEFINE_PROP_BIT("fsqrt", SPARCCPU, env.def.features, 6, false), + DEFINE_PROP_BIT("fmul", SPARCCPU, env.def.features, 7, false), + DEFINE_PROP_BIT("vis1", SPARCCPU, env.def.features, 8, false), + DEFINE_PROP_BIT("vis2", SPARCCPU, env.def.features, 9, false), + DEFINE_PROP_BIT("fsmuld", SPARCCPU, env.def.features, 10, false), + DEFINE_PROP_BIT("hypv", SPARCCPU, env.def.features, 11, false), + DEFINE_PROP_BIT("cmt", SPARCCPU, env.def.features, 12, false), + DEFINE_PROP_BIT("gl", SPARCCPU, env.def.features, 13, false), + DEFINE_PROP_UNSIGNED("iu-version", SPARCCPU, env.def.iu_version, 0, + qdev_prop_uint64, target_ulong), + DEFINE_PROP_UINT32("fpu-version", SPARCCPU, env.def.fpu_version, 0), + DEFINE_PROP_UINT32("mmu-version", SPARCCPU, env.def.mmu_version, 0), + { .name =3D "nwindows", .info =3D &qdev_prop_nwindows }, + DEFINE_PROP_END_OF_LIST() +}; + static void sparc_cpu_class_init(ObjectClass *oc, void *data) { SPARCCPUClass *scc =3D SPARC_CPU_CLASS(oc); @@ -860,6 +925,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void = *data) =20 scc->parent_realize =3D dc->realize; dc->realize =3D sparc_cpu_realizefn; + dc->props =3D sparc_cpu_properties; =20 scc->parent_reset =3D cc->reset; cc->reset =3D sparc_cpu_reset; --=20 2.13.5