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X-Received-From: 2a00:1450:400c:c0c::22e Subject: [Qemu-devel] [RFC PATCH 3/9] tcg: generate ptrs to vector registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 As we operate directly on the vectors in memory we pass around the address for TCG_TYPE_VECTOR. Currently only helpers ever see these values but if we were to generate simd backend instructions they would load directly from the backing store. We also need to ensure when copying from one temp register to the other the right size is used. Signed-off-by: Alex Benn=C3=A9e --- tcg/tcg.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 35598296c5..e16811d68d 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2034,7 +2034,21 @@ static void temp_load(TCGContext *s, TCGTemp *ts, TC= GRegSet desired_regs, break; case TEMP_VAL_MEM: reg =3D tcg_reg_alloc(s, desired_regs, allocated_regs, ts->indirec= t_base); - tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset); + if (ts->type =3D=3D TCG_TYPE_VECTOR) { + /* Vector registers are ptr's to the memory representation */ + TCGArg args[TCG_MAX_OP_ARGS]; + int const_args[TCG_MAX_OP_ARGS]; + args[0] =3D reg; + args[1] =3D ts->mem_base->reg; + args[2] =3D ts->mem_offset; + const_args[0] =3D 0; + const_args[1] =3D 0; + const_args[2] =3D 1; + /* FIXME: needs to by host_ptr centric */ + tcg_out_op(s, INDEX_op_add_i64, args, const_args); + } else { + tcg_out_ld(s, ts->type, reg, ts->mem_base->reg, ts->mem_offset= ); + } ts->mem_coherent =3D 1; break; case TEMP_VAL_DEAD: @@ -2196,6 +2210,10 @@ static void tcg_reg_alloc_mov(TCGContext *s, const T= CGOpDef *def, ots->reg =3D tcg_reg_alloc(s, tcg_target_available_regs[ot= ype], allocated_regs, ots->indirect_bas= e); } + /* For the purposes of moving stuff about it is a host ptr */ + if (otype =3D=3D TCG_TYPE_VECTOR) { + otype =3D TCG_TYPE_PTR; + } tcg_out_mov(s, otype, ots->reg, ts->reg); } ots->val_type =3D TEMP_VAL_REG; @@ -2440,7 +2458,11 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb= _oargs, int nb_iargs, =20 if (ts->val_type =3D=3D TEMP_VAL_REG) { if (ts->reg !=3D reg) { - tcg_out_mov(s, ts->type, reg, ts->reg); + if (ts->type =3D=3D TCG_TYPE_VECTOR) { + tcg_out_mov(s, TCG_TYPE_PTR, reg, ts->reg); + } else { + tcg_out_mov(s, ts->type, reg, ts->reg); + } } } else { TCGRegSet arg_set; --=20 2.13.0