From nobody Mon Feb 9 02:12:21 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1502217616837339.25895430945025; Tue, 8 Aug 2017 11:40:16 -0700 (PDT) Received: from localhost ([::1]:44048 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1df9QN-0003Pv-KY for importer@patchew.org; Tue, 08 Aug 2017 14:40:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58120) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1df9Jh-00064i-FQ for qemu-devel@nongnu.org; Tue, 08 Aug 2017 14:33:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1df9Jf-0002S4-Qz for qemu-devel@nongnu.org; Tue, 08 Aug 2017 14:33:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58546) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1df9JZ-0002M6-Nv; Tue, 08 Aug 2017 14:33:13 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BCCBC4081F; Tue, 8 Aug 2017 18:33:12 +0000 (UTC) Received: from probe.redhat.com (ovpn-123-63.rdu2.redhat.com [10.10.123.63]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3DA1460464; Tue, 8 Aug 2017 18:33:12 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com BCCBC4081F Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=jsnow@redhat.com From: John Snow To: qemu-block@nongnu.org Date: Tue, 8 Aug 2017 14:32:59 -0400 Message-Id: <20170808183306.27474-3-jsnow@redhat.com> In-Reply-To: <20170808183306.27474-1-jsnow@redhat.com> References: <20170808183306.27474-1-jsnow@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Tue, 08 Aug 2017 18:33:12 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 2/9] IDE: Add register hints to tracing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: John Snow , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Name the registers for tracing purposes. Signed-off-by: John Snow Reviewed-by: Eric Blake Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/ide/core.c | 88 +++++++++++++++++++++++++++++++++++++++++--------= ---- hw/ide/trace-events | 4 +-- 2 files changed, 70 insertions(+), 22 deletions(-) diff --git a/hw/ide/core.c b/hw/ide/core.c index 53fa084..6235bdf 100644 --- a/hw/ide/core.c +++ b/hw/ide/core.c @@ -1177,13 +1177,37 @@ static void ide_clear_hob(IDEBus *bus) bus->ifs[1].select &=3D ~(1 << 7); } =20 +/* IOport [W]rite [R]egisters */ +enum ATA_IOPORT_WR { + ATA_IOPORT_WR_DATA =3D 0, + ATA_IOPORT_WR_FEATURES =3D 1, + ATA_IOPORT_WR_SECTOR_COUNT =3D 2, + ATA_IOPORT_WR_SECTOR_NUMBER =3D 3, + ATA_IOPORT_WR_CYLINDER_LOW =3D 4, + ATA_IOPORT_WR_CYLINDER_HIGH =3D 5, + ATA_IOPORT_WR_DEVICE_HEAD =3D 6, + ATA_IOPORT_WR_COMMAND =3D 7, + ATA_IOPORT_WR_NUM_REGISTERS, +}; + +const char *ATA_IOPORT_WR_lookup[ATA_IOPORT_WR_NUM_REGISTERS] =3D { + [ATA_IOPORT_WR_DATA] =3D "Data", + [ATA_IOPORT_WR_FEATURES] =3D "Features", + [ATA_IOPORT_WR_SECTOR_COUNT] =3D "Sector Count", + [ATA_IOPORT_WR_SECTOR_NUMBER] =3D "Sector Number", + [ATA_IOPORT_WR_CYLINDER_LOW] =3D "Cylinder Low", + [ATA_IOPORT_WR_CYLINDER_HIGH] =3D "Cylinder High", + [ATA_IOPORT_WR_DEVICE_HEAD] =3D "Device/Head", + [ATA_IOPORT_WR_COMMAND] =3D "Command" +}; + void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) { IDEBus *bus =3D opaque; IDEState *s =3D idebus_active_if(bus); int reg_num =3D addr & 7; =20 - trace_ide_ioport_write(addr, val, bus, s); + trace_ide_ioport_write(addr, ATA_IOPORT_WR_lookup[reg_num], val, bus, = s); =20 /* ignore writes to command block while busy with previous command */ if (reg_num !=3D 7 && (s->status & (BUSY_STAT|DRQ_STAT))) { @@ -1193,43 +1217,43 @@ void ide_ioport_write(void *opaque, uint32_t addr, = uint32_t val) switch(reg_num) { case 0: break; - case 1: - ide_clear_hob(bus); + case ATA_IOPORT_WR_FEATURES: + ide_clear_hob(bus); /* NOTE: data is written to the two drives */ - bus->ifs[0].hob_feature =3D bus->ifs[0].feature; - bus->ifs[1].hob_feature =3D bus->ifs[1].feature; + bus->ifs[0].hob_feature =3D bus->ifs[0].feature; + bus->ifs[1].hob_feature =3D bus->ifs[1].feature; bus->ifs[0].feature =3D val; bus->ifs[1].feature =3D val; break; - case 2: + case ATA_IOPORT_WR_SECTOR_COUNT: ide_clear_hob(bus); bus->ifs[0].hob_nsector =3D bus->ifs[0].nsector; bus->ifs[1].hob_nsector =3D bus->ifs[1].nsector; bus->ifs[0].nsector =3D val; bus->ifs[1].nsector =3D val; break; - case 3: + case ATA_IOPORT_WR_SECTOR_NUMBER: ide_clear_hob(bus); bus->ifs[0].hob_sector =3D bus->ifs[0].sector; bus->ifs[1].hob_sector =3D bus->ifs[1].sector; bus->ifs[0].sector =3D val; bus->ifs[1].sector =3D val; break; - case 4: + case ATA_IOPORT_WR_CYLINDER_LOW: ide_clear_hob(bus); bus->ifs[0].hob_lcyl =3D bus->ifs[0].lcyl; bus->ifs[1].hob_lcyl =3D bus->ifs[1].lcyl; bus->ifs[0].lcyl =3D val; bus->ifs[1].lcyl =3D val; break; - case 5: + case ATA_IOPORT_WR_CYLINDER_HIGH: ide_clear_hob(bus); bus->ifs[0].hob_hcyl =3D bus->ifs[0].hcyl; bus->ifs[1].hob_hcyl =3D bus->ifs[1].hcyl; bus->ifs[0].hcyl =3D val; bus->ifs[1].hcyl =3D val; break; - case 6: + case ATA_IOPORT_WR_DEVICE_HEAD: /* FIXME: HOB readback uses bit 7 */ bus->ifs[0].select =3D (val & ~0x10) | 0xa0; bus->ifs[1].select =3D (val | 0x10) | 0xa0; @@ -1237,7 +1261,7 @@ void ide_ioport_write(void *opaque, uint32_t addr, ui= nt32_t val) bus->unit =3D (val >> 4) & 1; break; default: - case 7: + case ATA_IOPORT_WR_COMMAND: /* command */ ide_exec_cmd(bus, val); break; @@ -2044,6 +2068,30 @@ void ide_exec_cmd(IDEBus *bus, uint32_t val) } } =20 +/* IOport [R]ead [R]egisters */ +enum ATA_IOPORT_RR { + ATA_IOPORT_RR_DATA =3D 0, + ATA_IOPORT_RR_ERROR =3D 1, + ATA_IOPORT_RR_SECTOR_COUNT =3D 2, + ATA_IOPORT_RR_SECTOR_NUMBER =3D 3, + ATA_IOPORT_RR_CYLINDER_LOW =3D 4, + ATA_IOPORT_RR_CYLINDER_HIGH =3D 5, + ATA_IOPORT_RR_DEVICE_HEAD =3D 6, + ATA_IOPORT_RR_STATUS =3D 7, + ATA_IOPORT_RR_NUM_REGISTERS, +}; + +const char *ATA_IOPORT_RR_lookup[ATA_IOPORT_RR_NUM_REGISTERS] =3D { + [ATA_IOPORT_RR_DATA] =3D "Data", + [ATA_IOPORT_RR_ERROR] =3D "Error", + [ATA_IOPORT_RR_SECTOR_COUNT] =3D "Sector Count", + [ATA_IOPORT_RR_SECTOR_NUMBER] =3D "Sector Number", + [ATA_IOPORT_RR_CYLINDER_LOW] =3D "Cylinder Low", + [ATA_IOPORT_RR_CYLINDER_HIGH] =3D "Cylinder High", + [ATA_IOPORT_RR_DEVICE_HEAD] =3D "Device/Head", + [ATA_IOPORT_RR_STATUS] =3D "Status" +}; + uint32_t ide_ioport_read(void *opaque, uint32_t addr) { IDEBus *bus =3D opaque; @@ -2056,10 +2104,10 @@ uint32_t ide_ioport_read(void *opaque, uint32_t add= r) //hob =3D s->select & (1 << 7); hob =3D 0; switch(reg_num) { - case 0: + case ATA_IOPORT_RR_DATA: ret =3D 0xff; break; - case 1: + case ATA_IOPORT_RR_ERROR: if ((!bus->ifs[0].blk && !bus->ifs[1].blk) || (s !=3D bus->ifs && !s->blk)) { ret =3D 0; @@ -2069,7 +2117,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) ret =3D s->hob_feature; } break; - case 2: + case ATA_IOPORT_RR_SECTOR_COUNT: if (!bus->ifs[0].blk && !bus->ifs[1].blk) { ret =3D 0; } else if (!hob) { @@ -2078,7 +2126,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) ret =3D s->hob_nsector; } break; - case 3: + case ATA_IOPORT_RR_SECTOR_NUMBER: if (!bus->ifs[0].blk && !bus->ifs[1].blk) { ret =3D 0; } else if (!hob) { @@ -2087,7 +2135,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) ret =3D s->hob_sector; } break; - case 4: + case ATA_IOPORT_RR_CYLINDER_LOW: if (!bus->ifs[0].blk && !bus->ifs[1].blk) { ret =3D 0; } else if (!hob) { @@ -2096,7 +2144,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) ret =3D s->hob_lcyl; } break; - case 5: + case ATA_IOPORT_RR_CYLINDER_HIGH: if (!bus->ifs[0].blk && !bus->ifs[1].blk) { ret =3D 0; } else if (!hob) { @@ -2105,7 +2153,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) ret =3D s->hob_hcyl; } break; - case 6: + case ATA_IOPORT_RR_DEVICE_HEAD: if (!bus->ifs[0].blk && !bus->ifs[1].blk) { ret =3D 0; } else { @@ -2113,7 +2161,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) } break; default: - case 7: + case ATA_IOPORT_RR_STATUS: if ((!bus->ifs[0].blk && !bus->ifs[1].blk) || (s !=3D bus->ifs && !s->blk)) { ret =3D 0; @@ -2124,7 +2172,7 @@ uint32_t ide_ioport_read(void *opaque, uint32_t addr) break; } =20 - trace_ide_ioport_read(addr, ret, bus, s); + trace_ide_ioport_read(addr, ATA_IOPORT_RR_lookup[reg_num], ret, bus, s= ); return ret; } =20 diff --git a/hw/ide/trace-events b/hw/ide/trace-events index 68ad96a..6c156ac 100644 --- a/hw/ide/trace-events +++ b/hw/ide/trace-events @@ -2,8 +2,8 @@ =20 # hw/ide/core.c # portio -ide_ioport_read(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO= rd @ 0x%"PRIx32"; val 0x%02"PRIx32"; bus %p IDEState %p" -ide_ioport_write(uint32_t addr, uint32_t val, void *bus, void *s) "IDE PIO= wr @ 0x%"PRIx32"; val 0x%02"PRIx32"; bus %p IDEState %p" +ide_ioport_read(uint32_t addr, const char *reg, uint32_t val, void *bus, v= oid *s) "IDE PIO rd @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState= %p" +ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, = void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState= %p" ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) = "IDE PIO rd @ 0x%"PRIx32" (Alt Status); val 0x%02"PRIx32"; bus %p;= IDEState %p" ide_cmd_write(uint32_t addr, uint32_t val, void *bus) = "IDE PIO wr @ 0x%"PRIx32" (Device Control); val 0x%02"PRIx32"; bus= %p" # misc --=20 2.9.4