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X-Received-From: 2a00:1450:400c:c09::236 Subject: [Qemu-devel] [RFC PATCH for 2.11 17/23] fpu/softfloat2a: implement propagateFloat16NaN X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, Aurelien Jarno , rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 This will be required when expanding the MINMAX() macro for 16 bit/half-precision operations. Signed-off-by: Alex Benn=C3=A9e --- fpu/softfloat2a/softfloat-specialize.h | 43 ++++++++++++++++++++++++++++++= ++++ 1 file changed, 43 insertions(+) diff --git a/fpu/softfloat2a/softfloat-specialize.h b/fpu/softfloat2a/softf= loat-specialize.h index de2c5d5702..c8282b8bf7 100644 --- a/fpu/softfloat2a/softfloat-specialize.h +++ b/fpu/softfloat2a/softfloat-specialize.h @@ -686,6 +686,49 @@ static int pickNaNMulAdd(flag aIsQNaN, flag aIsSNaN, f= lag bIsQNaN, flag bIsSNaN, #endif =20 /*------------------------------------------------------------------------= ---- +| Takes two half-precision floating-point values `a' and `b', one of which +| is a NaN, and returns the appropriate NaN result. If either `a' or `b' = is a +| signaling NaN, the invalid exception is raised. +*-------------------------------------------------------------------------= ---*/ + +static float16 propagateFloat16NaN(float16 a, float16 b, float_status *sta= tus) +{ + flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN; + flag aIsLargerSignificand; + uint16_t av, bv; + + aIsQuietNaN =3D float16_is_quiet_nan(a, status); + aIsSignalingNaN =3D float16_is_signaling_nan(a, status); + bIsQuietNaN =3D float16_is_quiet_nan(b, status); + bIsSignalingNaN =3D float16_is_signaling_nan(b, status); + av =3D float16_val(a); + bv =3D float16_val(b); + + if (aIsSignalingNaN | bIsSignalingNaN) { + float_raise(float_flag_invalid, status); + } + + if (status->default_nan_mode) { + return float16_default_nan(status); + } + + if ((uint16_t)(av << 1) < (uint16_t)(bv << 1)) { + aIsLargerSignificand =3D 0; + } else if ((uint16_t)(bv << 1) < (uint16_t)(av << 1)) { + aIsLargerSignificand =3D 1; + } else { + aIsLargerSignificand =3D (av < bv) ? 1 : 0; + } + + if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN, + aIsLargerSignificand)) { + return float16_maybe_silence_nan(b, status); + } else { + return float16_maybe_silence_nan(a, status); + } +} + +/*------------------------------------------------------------------------= ---- | Takes two single-precision floating-point values `a' and `b', one of whi= ch | is a NaN, and returns the appropriate NaN result. If either `a' or `b' = is a | signaling NaN, the invalid exception is raised. --=20 2.13.0