From nobody Wed Nov 5 09:06:19 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1499748073121141.672042199285; Mon, 10 Jul 2017 21:41:13 -0700 (PDT) Received: from localhost ([::1]:44117 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dUmz1-0003lA-US for importer@patchew.org; Tue, 11 Jul 2017 00:41:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40567) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dUmxM-0002IO-0r for qemu-devel@nongnu.org; Tue, 11 Jul 2017 00:39:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dUmxK-0007T1-Nn for qemu-devel@nongnu.org; Tue, 11 Jul 2017 00:39:27 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:43103) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dUmxK-0007SB-BM; Tue, 11 Jul 2017 00:39:26 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 3x68Vx2VwFz9t1m; Tue, 11 Jul 2017 14:39:21 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1499747961; bh=VJGGKNAqQtRpqHsU8tqQmWzn8KJxalMkIUid9Up1LxU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EsaK4dJpd3O5V47h1FeCVcvjO3n37aZqVIHbsaAU50GqlwiTJ3kxqiiJBDAJUsRvy 1f21Fai79XFldZd2aziOL2BETFxP7UGgr/uFeScWc4GRPKMRLNQbGEIIYvvbSmJJh6 b72LnJtExBmh79UTwhGQ1L0NeustFMJRquszL5Rs= From: David Gibson To: peter.maydell@linaro.org Date: Tue, 11 Jul 2017 14:39:07 +1000 Message-Id: <20170711043917.1757-8-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170711043917.1757-1-david@gibson.dropbear.id.au> References: <20170711043917.1757-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PULL 07/17] spapr: Uniform DRC reset paths X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, qemu-devel@nongnu.org, mdroth@linux.vnet.ibm.com, surajjs@au1.ibm.com, aik@ozlabs.ru, sbobroff@au1.ibm.com, groug@kaod.org, agraf@suse.de, qemu-ppc@nongnu.org, bharata@linux.vnet.ibm.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" DRC objects have a regular device reset method. However, it only gets called in the usual way for PCI DRCs. Because of where CPU and LMB DRCs are in the QOM tree, their device reset method isn't automatically called. So, the machine manually registers reset handlers to call device_reset(). This patch removes the device reset method, and instead always explicitly registers the reset handler from realize(). This means the callers don't have to worry about the two cases, and we always get proper resets. Signed-off-by: David Gibson Reviewed-by: Greg Kurz Reviewed-by: Laurent Vivier --- hw/ppc/spapr.c | 31 ++++--------------------------- hw/ppc/spapr_drc.c | 6 +++--- 2 files changed, 7 insertions(+), 30 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 5acfb47..4fa982d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1967,24 +1967,6 @@ static void spapr_boot_set(void *opaque, const char = *boot_device, machine->boot_order =3D g_strdup(boot_device); } =20 -/* - * Reset routine for LMB DR devices. - * - * Unlike PCI DR devices, LMB DR devices explicitly register this reset - * routine. Reset for PCI DR devices will be handled by PHB reset routine - * when it walks all its children devices. LMB devices reset occurs - * as part of ppc_spapr_reset(). - */ -static void spapr_drc_reset(void *opaque) -{ - sPAPRDRConnector *drc =3D opaque; - DeviceState *d =3D DEVICE(drc); - - if (d) { - device_reset(d); - } -} - static void spapr_create_lmb_dr_connectors(sPAPRMachineState *spapr) { MachineState *machine =3D MACHINE(spapr); @@ -1993,13 +1975,11 @@ static void spapr_create_lmb_dr_connectors(sPAPRMac= hineState *spapr) int i; =20 for (i =3D 0; i < nr_lmbs; i++) { - sPAPRDRConnector *drc; uint64_t addr; =20 addr =3D i * lmb_size + spapr->hotplug_memory.base; - drc =3D spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_LMB, - addr/lmb_size); - qemu_register_reset(spapr_drc_reset, drc); + spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_LMB, + addr / lmb_size); } } =20 @@ -2093,11 +2073,8 @@ static void spapr_init_cpus(sPAPRMachineState *spapr) int core_id =3D i * smp_threads; =20 if (mc->has_hotpluggable_cpus) { - sPAPRDRConnector *drc =3D - spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_CPU, - (core_id / smp_threads) * smt); - - qemu_register_reset(spapr_drc_reset, drc); + spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_CPU, + (core_id / smp_threads) * smt); } =20 if (i < boot_cores_nr) { diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_drc.c index 22d4d81..c831aa3 100644 --- a/hw/ppc/spapr_drc.c +++ b/hw/ppc/spapr_drc.c @@ -426,9 +426,9 @@ static bool release_pending(sPAPRDRConnector *drc) return drc->awaiting_release; } =20 -static void reset(DeviceState *d) +static void drc_reset(void *opaque) { - sPAPRDRConnector *drc =3D SPAPR_DR_CONNECTOR(d); + sPAPRDRConnector *drc =3D SPAPR_DR_CONNECTOR(opaque); =20 trace_spapr_drc_reset(spapr_drc_index(drc)); =20 @@ -538,6 +538,7 @@ static void realize(DeviceState *d, Error **errp) g_free(child_name); vmstate_register(DEVICE(drc), spapr_drc_index(drc), &vmstate_spapr_drc, drc); + qemu_register_reset(drc_reset, drc); trace_spapr_drc_realize_complete(spapr_drc_index(drc)); } =20 @@ -596,7 +597,6 @@ static void spapr_dr_connector_class_init(ObjectClass *= k, void *data) DeviceClass *dk =3D DEVICE_CLASS(k); sPAPRDRConnectorClass *drck =3D SPAPR_DR_CONNECTOR_CLASS(k); =20 - dk->reset =3D reset; dk->realize =3D realize; dk->unrealize =3D unrealize; drck->release_pending =3D release_pending; --=20 2.9.4