From nobody Wed Nov 5 09:12:26 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149970200912785.23995133179346; Mon, 10 Jul 2017 08:53:29 -0700 (PDT) Received: from localhost ([::1]:41533 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dUb02-0002N0-Oj for importer@patchew.org; Mon, 10 Jul 2017 11:53:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:32893) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dUavl-0006jR-QR for qemu-devel@nongnu.org; Mon, 10 Jul 2017 11:49:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dUavi-0004Ai-Mz for qemu-devel@nongnu.org; Mon, 10 Jul 2017 11:49:01 -0400 Received: from mail-wr0-f177.google.com ([209.85.128.177]:36318) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dUavi-0004AQ-Gd for qemu-devel@nongnu.org; Mon, 10 Jul 2017 11:48:58 -0400 Received: by mail-wr0-f177.google.com with SMTP id c11so144113337wrc.3 for ; Mon, 10 Jul 2017 08:48:58 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id n71sm10820242wrb.62.2017.07.10.08.47.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Jul 2017 08:47:52 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 8B83C3E0641; Mon, 10 Jul 2017 16:47:49 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LsuhQWEAyocl0g3jXFez4wFNmW3AINMa1lQKC+nMR34=; b=HAdy5DkGWqNrMEI3rV9UKeOqNL9HlJPor/RKO4NcR1eqMuOlRh1yEOGNLBTwXOoHto ThrW4ZM0/T941yhupw01Q6Oa2AlZlfvlOg6154cKqiFGYzK3gvVSUIgJqd3kvs3QrdoO 0qwxPRb3MiTz1oEn/+LijwfRtX5f7xMfge128= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LsuhQWEAyocl0g3jXFez4wFNmW3AINMa1lQKC+nMR34=; b=R4tyL5nxXVTFoIjD9pqI8tGqTMl79gF5lOzCd27RJTnrLsEtWawoI2zWakS0Cotc/S 2iZJKtTa8ctuQty3yPiP+J/iXYV9sbvSy2KrKwktEsyc8yBEISIFiLHXR8hzvHuBZfWM 1X35whCoZBwY6gsxDr4jf7w02GqJXxBFf2+ze7pDvOHU521s6/JnWp5o3vG0BJGax9Ac zvbvdG126OdPOk7R2QMmn1caOpnq9HU3UCWJOzafkAjxb1GmMAN3iviFs9lZNXrXqfWp NLwtuTyp2dAVkj22Rtw0J+jZERxeiEM8pyFx872eZ61KYdw11JPPKWBPPDalDSjv7lg9 csww== X-Gm-Message-State: AIVw111td6Pg1sfMaGFSFP2lATNnlGoMOmSjkYIzr4B5MtamHKaWmZlm 8GQ4rpCVqMh5Ljeg X-Received: by 10.28.0.84 with SMTP id 81mr8316068wma.58.1499701677347; Mon, 10 Jul 2017 08:47:57 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: peter.maydell@linaro.org, rth@twiddle.net, cota@braap.org Date: Mon, 10 Jul 2017 16:47:46 +0100 Message-Id: <20170710154749.13624-4-alex.bennee@linaro.org> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170710154749.13624-1-alex.bennee@linaro.org> References: <20170710154749.13624-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.177 Subject: [Qemu-devel] [PATCH v1 3/6] target/arm/translate-a64: make DISAS_UPDATE match declared semantics X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:ARM" , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 DISAS_UPDATE should be used when the wider CPU state other than just the PC has been updated and we should therefor exit the TCG runtime and return to the main execution loop rather assuming DISAS_JUMP would do that. As some DISAS_UPDATE users may update the PC dynamically via a helper we also push the updating to the PC to the call sites which set ->is_jmp to DISAS_UPDATE. Signed-off-by: Alex Benn=C3=A9e --- target/arm/translate-a64.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index e55547d95d..fe1c49b565 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1393,6 +1393,7 @@ static void handle_sync(DisasContext *s, uint32_t ins= n, * a self-modified code correctly and also to take * any pending interrupts immediately. */ + gen_a64_set_pc_im(s->pc); s->is_jmp =3D DISAS_UPDATE; return; default: @@ -1593,12 +1594,14 @@ static void handle_sys(DisasContext *s, uint32_t in= sn, bool isread, if ((s->tb->cflags & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) { /* I/O operations must end the TB here (whether read or write) */ gen_io_end(); + gen_a64_set_pc_im(s->pc); s->is_jmp =3D DISAS_UPDATE; } else if (!isread && !(ri->type & ARM_CP_SUPPRESS_TB_END)) { /* We default to ending the TB on a coprocessor register write, * but allow this to be suppressed by the register definition * (usually only necessary to work around guest bugs). */ + gen_a64_set_pc_im(s->pc); s->is_jmp =3D DISAS_UPDATE; } } @@ -11364,16 +11367,9 @@ void gen_intermediate_code_a64(ARMCPU *cpu, Transl= ationBlock *tb) case DISAS_NEXT: gen_goto_tb(dc, 1, dc->pc); break; - default: - case DISAS_UPDATE: - gen_a64_set_pc_im(dc->pc); - /* fall through */ case DISAS_JUMP: tcg_gen_lookup_and_goto_ptr(cpu_pc); break; - case DISAS_EXIT: - tcg_gen_exit_tb(0); - break; case DISAS_TB_JUMP: case DISAS_EXC: case DISAS_SWI: @@ -11397,6 +11393,11 @@ void gen_intermediate_code_a64(ARMCPU *cpu, Transl= ationBlock *tb) */ tcg_gen_exit_tb(0); break; + case DISAS_UPDATE: + case DISAS_EXIT: + default: + tcg_gen_exit_tb(0); + break; } } =20 --=20 2.13.0