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[66.91.136.156]) by smtp.gmail.com with ESMTPSA id u85sm371825qku.42.2017.07.05.17.24.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Jul 2017 17:24:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=loaGOXqQPSIwMsQbSfcyUWu+AfoCneWBOsKNgHULlnQ=; b=deUzxq1akeuT7eK+AgXJ4QZeKEWJQMxgqijS+VSX8MOtJtVFIUWhA7e04IyVr16Eiq CIyu6VuLaiyBLF4H7lHw7eYMHTqwTSIidZL1RNEsam/zpyLTcIhHRf8yFD9KcWjBRKpF WjZxNb0Co8bz/ZnveKCTYSZu79/kiweZ2//mrAhKi1NrEN9EKXib/t3OrNIlasVSICAo hroO3EknLt7xC5qcHmYsR3DJ23xf/0clt/zlU7ikRvm3iMTVXURN7gThFvm7rmWM3YqX KYe2pfJCyx6i9SjnUMCH0hw0yV6oN0zaC0D3QuziVG6q7f/IGF6ojSV76cwpb5UmqG3h bsgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=loaGOXqQPSIwMsQbSfcyUWu+AfoCneWBOsKNgHULlnQ=; b=URUerQBdIdN47p3ZHVzGxDEIr/OQjWXIrh8ehlfCjIDitWrimk0B8Qqro0VK4LcHrl KJSpS1ttNN7O3isH675h2N7N5VoFI5Nrk6I4NqKcxbHo0nhhjOufggn4eFFb9bu0Bndi wDhGCxAPLJW3BiuUMIIKuhvMuDSsxc3d8AL1f5qEtsCwB6C7fUuDHTW/GD87m6kNDfdx icv1XFPWhMSdIfqCobBSLRhnY9Eu2GG2n6iwNH4sZIXXv6nuNieLqicCi+KzUeujxXFf FSCuESVf27OERIAi3SbhFz7W/1lFL1+w6rEBzucPtT+lyS/7j5RDWI43xMdCZ735tjH1 0o6Q== X-Gm-Message-State: AKS2vOz+2VbRabfXB0tyJvIqXfXSr22rECwp1stxG9egWLhzPiXqr9x6 RTzzOOO8ip9/OA7nfZ8= X-Received: by 10.55.20.30 with SMTP id e30mr52941319qkh.51.1499300692270; Wed, 05 Jul 2017 17:24:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 5 Jul 2017 14:24:00 -1000 Message-Id: <20170706002401.10507-11-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170706002401.10507-1-rth@twiddle.net> References: <20170706002401.10507-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::243 Subject: [Qemu-devel] [PATCH 10/11] target/sh4: Hoist fp bank selection X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bruno@clisp.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/sh4/translate.c | 34 +++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 7f015c3..a45d0ee 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -37,6 +37,7 @@ typedef struct DisasContext { struct TranslationBlock *tb; TCGv *gregs; /* active bank */ TCGv *altregs; /* inactive, alternate, bank */ + TCGv *fregs; /* active bank */ target_ulong pc; uint16_t opcode; uint32_t tbflags; /* should stay unmodified during the TB translati= on */ @@ -72,7 +73,7 @@ static TCGv cpu_pc, cpu_ssr, cpu_spc, cpu_gbr; static TCGv cpu_vbr, cpu_sgr, cpu_dbr, cpu_mach, cpu_macl; static TCGv cpu_pr, cpu_fpscr, cpu_fpul; static TCGv cpu_lock_addr, cpu_lock_value; -static TCGv cpu_fregs[32]; +static TCGv cpu_fregs[2][16]; =20 /* internal register indexes */ static TCGv cpu_flags, cpu_delayed_pc, cpu_delayed_cond; @@ -176,10 +177,18 @@ void sh4_translate_init(void) offsetof(CPUSH4State, lock_value), "_lock_value_"); =20 - for (i =3D 0; i < 32; i++) - cpu_fregs[i] =3D tcg_global_mem_new_i32(cpu_env, - offsetof(CPUSH4State, fregs[= i]), - fregnames[i]); + for (i =3D 0; i < 16; i++) { + cpu_fregs[0][i] + =3D tcg_global_mem_new_i32(cpu_env, + offsetof(CPUSH4State, fregs[i]), + fregnames[i]); + } + for (i =3D 16; i < 32; i++) { + cpu_fregs[1][i - 16] + =3D tcg_global_mem_new_i32(cpu_env, + offsetof(CPUSH4State, fregs[i]), + fregnames[i]); + } =20 done_init =3D 1; } @@ -365,12 +374,12 @@ static void gen_delayed_conditional_jump(DisasContext= * ctx) low register means we can't crash the translator for REG=3D=3D15. */ static void gen_load_fpr64(DisasContext *ctx, TCGv_i64 t, int reg) { - tcg_gen_concat_i32_i64(t, cpu_fregs[reg | 1], cpu_fregs[reg]); + tcg_gen_concat_i32_i64(t, ctx->fregs[reg | 1], ctx->fregs[reg]); } =20 static void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg) { - tcg_gen_extr_i64_i32(cpu_fregs[reg | 1], cpu_fregs[reg], t); + tcg_gen_extr_i64_i32(ctx->fregs[reg | 1], ctx->fregs[reg], t); } =20 #define B3_0 (ctx->opcode & 0xf) @@ -386,10 +395,10 @@ static void gen_store_fpr64(DisasContext *ctx, TCGv_i= 64 t, int reg) #define REG(x) ctx->gregs[x] #define ALTREG(x) ctx->altregs[x] =20 -#define FREG(x) cpu_fregs[ctx->tbflags & FPSCR_FR ? (x) ^ 0x10 : (x)] -#define XHACK(x) ((((x) & 1 ) << 4) | ((x) & 0xe)) -#define XREG(x) FREG(XHACK(x)) -#define DREG(x) (ctx->tbflags & FPSCR_FR ? (x) ^ 0x10 : (x)) +#define FREG(x) ctx->fregs[x] +#define XHACK(x) ((((x) & 1 ) << 4) | ((x) & 0xe)) +#define XREG(x) FREG(XHACK(x)) +#define DREG(x) (x) =20 #define CHECK_NOT_DELAY_SLOT \ if (ctx->envflags & DELAY_SLOT_MASK) { \ @@ -2230,6 +2239,9 @@ void gen_intermediate_code(CPUSH4State * env, struct = TranslationBlock *tb) ctx.gregs =3D cpu_gregs[bank]; ctx.altregs =3D cpu_gregs[bank ^ 1]; =20 + bank =3D (ctx.tbflags & FPSCR_FR) !=3D 0; + ctx.fregs =3D cpu_fregs[bank]; + max_insns =3D tb->cflags & CF_COUNT_MASK; if (max_insns =3D=3D 0) { max_insns =3D CF_COUNT_MASK; --=20 2.9.4