From nobody Sat May 4 15:24:16 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1499062927346297.044397162334; Sun, 2 Jul 2017 23:22:07 -0700 (PDT) Received: from localhost ([::1]:60530 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dRukI-0000xr-3W for importer@patchew.org; Mon, 03 Jul 2017 02:22:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59714) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dRuiM-00088v-MB for qemu-devel@nongnu.org; Mon, 03 Jul 2017 02:20:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dRuiL-0001K6-NF for qemu-devel@nongnu.org; Mon, 03 Jul 2017 02:20:06 -0400 Received: from mail-pf0-x241.google.com ([2607:f8b0:400e:c00::241]:36819) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dRuiI-0001HG-As; Mon, 03 Jul 2017 02:20:02 -0400 Received: by mail-pf0-x241.google.com with SMTP id z6so24683854pfk.3; Sun, 02 Jul 2017 23:20:02 -0700 (PDT) Received: from surajjs1.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id k18sm27313106pgf.5.2017.07.02.23.19.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Jul 2017 23:20:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=p/0tO4njJ1h0Ue1UPRHURUqXkPEmwcaw9sTbFDgi/P0=; b=HsT+Nva1JA7aVrXPO+7uOLUo5yszFgpJ/LLv3ivG2umxcW/DqtZUUjFOl+N5/oZI+y dRRTM7G21cXHASF+RWo+Y6s7MugjbUAvwPYezOaTcXe1RQ/ym10gSoQcRbSLnq0tj/uz HeDbBFK76aZmpaRWdOIKmykHuspgJxNZ24xanH8mHrBQjWPlaQqWDkQnkxGiqCTTQEZZ OPgn7/AHxXyxTK0U4BL/QNpTKjYQ70b65z02uFu5sgoc+08ocEhPpFM1geN4tdpiudvO msrfhHMC3/+WOUsHaP4QRQeGElvwZiR4YXMXpH/+MoJ5jNNhHFoY3e5/6rYL+t4wqsHR ri2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=p/0tO4njJ1h0Ue1UPRHURUqXkPEmwcaw9sTbFDgi/P0=; b=Pyirw/UO0llMYI+YcRggthku/gxAsIi293O2ayikkWYzC4r+cchazumOlSPN2actev 6IC9tiurYf5NFPtM8uHGroScXkjLjX6pQ4Vdv3OEIou4fRlsLBMCVwymKO0LVNU+yzkm 0SY1g0BmkPldimr/XSqPHYw2Tp2umdLu9lSDeNOCiB921ammcmd0bXG8iw2gS15qffc8 OXkoeiZ/z8L9li73tt4jf9b7jsXYcBD1fwXVDXbyPyyWIGnE3/sUe/1CLJKWt0L4ZcYj 7zcRAx8n/alVnsDQ1ahzkoi/DfFtlF590KAE2Yuub4HePp70Jvtm3Ez2Q+K2SnUm1N3Q NzxQ== X-Gm-Message-State: AIVw111XMEgg8l8TRDGDpey+Cn6KBzkLumQCKU43gteKcxe9QVvochBz M4DfjFGuwej4XQDQ X-Received: by 10.84.131.74 with SMTP id 68mr8768884pld.8.1499062801282; Sun, 02 Jul 2017 23:20:01 -0700 (PDT) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Mon, 3 Jul 2017 16:19:46 +1000 Message-Id: <20170703061948.18220-2-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170703061948.18220-1-sjitindarsingh@gmail.com> References: <20170703061948.18220-1-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [Qemu-PPC] [PATCH 1/3] target/ppc: Refactor tcg radix mmu code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, bsingharora@gmail.com, agraf@suse.de, Suraj Jitindar Singh , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The mmu-radix64.c file implements functions to enable the radix mmu emulation in tcg mode. There is a function ppc_radix64_walk_tree() which performs the radix tree walk and also implicitly checks the pte protection. Move the protection checking of the pte from the ppc_radix64_walk_tree() function into the caller. This means the ppc_radix64_walk_tree() function can be used without protection checking which is useful for debugging. ppc_radix64_walk_tree() no longer needs to take the rwx and prot variables. Signed-off-by: Suraj Jitindar Singh --- target/ppc/mmu-radix64.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 69fde65..1a650fd 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -147,11 +147,10 @@ static void ppc_radix64_set_rc(PowerPCCPU *cpu, int r= wx, uint64_t pte, } } =20 -static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, int rwx, vaddr eadd= r, +static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, vaddr eaddr, uint64_t base_addr, uint64_t nls, hwaddr *raddr, int *psize, - int *fault_cause, int *prot, - hwaddr *pte_addr) + int *fault_cause, hwaddr *pte_addr) { CPUState *cs =3D CPU(cpu); uint64_t index, pde; @@ -177,10 +176,6 @@ static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu,= int rwx, vaddr eaddr, uint64_t rpn =3D pde & R_PTE_RPN; uint64_t mask =3D (1UL << *psize) - 1; =20 - if (ppc_radix64_check_prot(cpu, rwx, pde, fault_cause, prot)) { - return 0; /* Protection Denied Access */ - } - /* Or high bits of rpn and low bits to ea to form whole real addr = */ *raddr =3D (rpn & ~mask) | (eaddr & mask); *pte_addr =3D base_addr + (index * sizeof(pde)); @@ -188,9 +183,8 @@ static uint64_t ppc_radix64_walk_tree(PowerPCCPU *cpu, = int rwx, vaddr eaddr, } =20 /* Next Level of Radix Tree */ - return ppc_radix64_walk_tree(cpu, rwx, eaddr, pde & R_PDE_NLB, - pde & R_PDE_NLS, raddr, psize, - fault_cause, prot, pte_addr); + return ppc_radix64_walk_tree(cpu, eaddr, pde & R_PDE_NLB, pde & R_PDE_= NLS, + raddr, psize, fault_cause, pte_addr); } =20 int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, @@ -241,11 +235,11 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vad= dr eaddr, int rwx, =20 /* Walk Radix Tree from Process Table Entry to Convert EA to RA */ page_size =3D PRTBE_R_GET_RTS(prtbe0); - pte =3D ppc_radix64_walk_tree(cpu, rwx, eaddr & R_EADDR_MASK, + pte =3D ppc_radix64_walk_tree(cpu, eaddr & R_EADDR_MASK, prtbe0 & PRTBE_R_RPDB, prtbe0 & PRTBE_R_RP= DS, - &raddr, &page_size, &fault_cause, &prot, - &pte_addr); - if (!pte) { + &raddr, &page_size, &fault_cause, &pte_add= r); + if (!pte || ppc_radix64_check_prot(cpu, rwx, pte, &fault_cause, &prot)= ) { + /* Couldn't get pte or access denied due to protection */ ppc_radix64_raise_si(cpu, rwx, eaddr, fault_cause); return 1; } --=20 2.9.4 From nobody Sat May 4 15:24:16 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149906300762410.429701178482219; Sun, 2 Jul 2017 23:23:27 -0700 (PDT) Received: from localhost ([::1]:60543 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dRula-0001s7-FA for importer@patchew.org; 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Sun, 02 Jul 2017 23:20:04 -0700 (PDT) From: Suraj Jitindar Singh To: qemu-ppc@nongnu.org Date: Mon, 3 Jul 2017 16:19:47 +1000 Message-Id: <20170703061948.18220-3-sjitindarsingh@gmail.com> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170703061948.18220-1-sjitindarsingh@gmail.com> References: <20170703061948.18220-1-sjitindarsingh@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [Qemu-PPC] [PATCH 2/3] target/ppc: Add debug function for radix mmu translation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, bsingharora@gmail.com, agraf@suse.de, Suraj Jitindar Singh , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" In target/ppc/mmu-hash64.c there already exists the function ppc_hash64_get_phys_page_debug() to get the physical (real) address for a given effective address in hash mode. Implement the function ppc_radix64_get_phys_page_debug() to allow a real address to be obtained for a given effective address in radix mode. This is used when a debugger is attached to qemu. Previously we just had a comment saying this is unimplemented which then fell through to the default case and caused an abort due to unrecognised mmu model as the default had no case for the V3 mmu, which was misleading at best. We reuse ppc_radix64_walk_tree() which is used by the radix fault handler since the process of walking the radix tree is identical. Reported-by: Balbir Singh Signed-off-by: Suraj Jitindar Singh --- target/ppc/mmu-radix64.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ target/ppc/mmu-radix64.h | 1 + target/ppc/mmu_helper.c | 3 ++- 3 files changed, 48 insertions(+), 1 deletion(-) diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 1a650fd..bbd37e3 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -251,3 +251,48 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vadd= r eaddr, int rwx, prot, mmu_idx, 1UL << page_size); return 0; } + +hwaddr ppc_radix64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong eaddr) +{ + CPUState *cs =3D CPU(cpu); + CPUPPCState *env =3D &cpu->env; + PPCVirtualHypervisorClass *vhc =3D + PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); + hwaddr raddr, pte_addr; + uint64_t lpid =3D 0, pid =3D 0, offset, size, patbe, prtbe0, pte; + int page_size, fault_cause =3D 0; + + /* Handle Real Mode */ + if (msr_dr =3D=3D 0) { + /* In real mode top 4 effective addr bits (mostly) ignored */ + return eaddr & 0x0FFFFFFFFFFFFFFFULL; + } + + /* Virtual Mode Access - get the fully qualified address */ + if (!ppc_radix64_get_fully_qualified_addr(env, eaddr, &lpid, &pid)) { + return -1; + } + + /* Get Process Table */ + patbe =3D vhc->get_patbe(cpu->vhyp); + + /* Index Process Table by PID to Find Corresponding Process Table Entr= y */ + offset =3D pid * sizeof(struct prtb_entry); + size =3D 1ULL << ((patbe & PATBE1_R_PRTS) + 12); + if (offset >=3D size) { + /* offset exceeds size of the process table */ + return -1; + } + prtbe0 =3D ldq_phys(cs->as, (patbe & PATBE1_R_PRTB) + offset); + + /* Walk Radix Tree from Process Table Entry to Convert EA to RA */ + page_size =3D PRTBE_R_GET_RTS(prtbe0); + pte =3D ppc_radix64_walk_tree(cpu, eaddr & R_EADDR_MASK, + prtbe0 & PRTBE_R_RPDB, prtbe0 & PRTBE_R_RP= DS, + &raddr, &page_size, &fault_cause, &pte_add= r); + if (!pte) { + return -1; + } + + return raddr & TARGET_PAGE_MASK; +} diff --git a/target/ppc/mmu-radix64.h b/target/ppc/mmu-radix64.h index 1d5c7cf..0ecf063 100644 --- a/target/ppc/mmu-radix64.h +++ b/target/ppc/mmu-radix64.h @@ -46,6 +46,7 @@ =20 int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx); +hwaddr ppc_radix64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr); =20 static inline int ppc_radix64_get_prot_eaa(uint64_t pte) { diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index 65d1c86..b7b9088 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -30,6 +30,7 @@ #include "helper_regs.h" #include "qemu/error-report.h" #include "mmu-book3s-v3.h" +#include "mmu-radix64.h" =20 //#define DEBUG_MMU //#define DEBUG_BATS @@ -1432,7 +1433,7 @@ hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vadd= r addr) return ppc_hash64_get_phys_page_debug(cpu, addr); case POWERPC_MMU_VER_3_00: if (ppc64_radix_guest(ppc_env_get_cpu(env))) { - /* TODO - Unsupported */ + return ppc_radix64_get_phys_page_debug(cpu, addr); } else { return ppc_hash64_get_phys_page_debug(cpu, addr); } --=20 2.9.4 From nobody Sat May 4 15:24:16 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [Qemu-PPC] [PATCH 3/3] target/ppc: Add debug function to dump radix mmu translations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, bsingharora@gmail.com, agraf@suse.de, Suraj Jitindar Singh , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" In target/ppc/mmu-hash64.c there already exists the function dump_slb() to dump the hash translation entries (for effective to virtual translation at least). Implement the function ppc_radix64_dump() to allow all the kernel effective to real address mappings and corresponding ptes to be dumped. This is called when "info tlb" is invoked in the qemu console. Previously this command had no output when invoked with a radix guest. Signed-off-by: Suraj Jitindar Singh --- target/ppc/mmu-radix64.c | 49 ++++++++++++++++++++++++++++++++++++++++++++= ++++ target/ppc/mmu-radix64.h | 1 + target/ppc/mmu_helper.c | 2 +- 3 files changed, 51 insertions(+), 1 deletion(-) diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index bbd37e3..f7eeead 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -296,3 +296,52 @@ hwaddr ppc_radix64_get_phys_page_debug(PowerPCCPU *cpu= , target_ulong eaddr) =20 return raddr & TARGET_PAGE_MASK; } + +static void ppc_radix64_dump_level(FILE *f, fprintf_function cpu_fprintf, + PowerPCCPU *cpu, uint64_t eaddr, + uint64_t base_addr, uint64_t nls, + uint64_t psize, int *num) +{ + CPUState *cs =3D CPU(cpu); + uint64_t i, pte; + + for (i =3D 0; i < (1 << nls); i++) { + eaddr &=3D ~((1ULL << psize) - 1); /* Clear the low bits */ + eaddr |=3D (i << (psize - nls)); + + pte =3D ldq_phys(cs->as, base_addr + (i * sizeof(pte))); + if (!(pte & R_PTE_VALID)) { /* Invalid Entry */ + continue; + } + + if (pte & R_PTE_LEAF) { + uint64_t mask =3D (1ULL << (psize - nls)) - 1; + cpu_fprintf(f, "%d\t0x%.16" PRIx64 " -> 0x%.16" PRIx64 + " pte: 0x%.16" PRIx64 "\n", (*num)++, + eaddr, pte & R_PTE_RPN & ~mask, pte); + } else { + ppc_radix64_dump_level(f, cpu_fprintf, cpu, eaddr, pte & R_PDE= _NLB, + pte & R_PDE_NLS, psize - nls, num); + } + } +} + +void ppc_radix64_dump(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *c= pu) +{ + CPUState *cs =3D CPU(cpu); + PPCVirtualHypervisorClass *vhc =3D + PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); + uint64_t patbe, prtbe0; + int num =3D 0; + + /* Get Process Table */ + patbe =3D vhc->get_patbe(cpu->vhyp); + + /* Load the first entry -> Guest kernel mappings (all we dump for now)= */ + prtbe0 =3D ldq_phys(cs->as, patbe & PATBE1_R_PRTB); + + cpu_fprintf(f, "\tEADDR\t\t RADDR\n"); + ppc_radix64_dump_level(f, cpu_fprintf, cpu, 0ULL, prtbe0 & PRTBE_R_RPD= B, + prtbe0 & PRTBE_R_RPDS, PRTBE_R_GET_RTS(prtbe0), + &num); +} diff --git a/target/ppc/mmu-radix64.h b/target/ppc/mmu-radix64.h index 0ecf063..c6c22bd 100644 --- a/target/ppc/mmu-radix64.h +++ b/target/ppc/mmu-radix64.h @@ -47,6 +47,7 @@ int ppc_radix64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx); hwaddr ppc_radix64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr); +void ppc_radix64_dump(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *c= pu); =20 static inline int ppc_radix64_get_prot_eaa(uint64_t pte) { diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index b7b9088..9587b07 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -1287,7 +1287,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, = CPUPPCState *env) break; case POWERPC_MMU_VER_3_00: if (ppc64_radix_guest(ppc_env_get_cpu(env))) { - /* TODO - Unsupported */ + ppc_radix64_dump(f, cpu_fprintf, ppc_env_get_cpu(env)); } else { dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); break; --=20 2.9.4