From nobody Wed May 1 00:57:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498682827474591.1374784653888; Wed, 28 Jun 2017 13:47:07 -0700 (PDT) Received: from localhost ([::1]:35593 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJrd-0000TI-VO for importer@patchew.org; Wed, 28 Jun 2017 16:47:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39734) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJnv-0005Sp-HH for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQJns-0003Sq-E0 for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:15 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:49383) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dQJns-0003SE-25 for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:12 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0LdmXT-1e9JbB0G1b-00j0qA; Wed, 28 Jun 2017 22:42:46 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 28 Jun 2017 22:42:35 +0200 Message-Id: <20170628204241.32106-2-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170628204241.32106-1-laurent@vivier.eu> References: <20170628204241.32106-1-laurent@vivier.eu> X-Provags-ID: V03:K0:fm2vO82xuy7HUhleAP4tNPXy0uKwb3wRJHiBqfHlmB4Xs5F92bA m4z7Dp07bheN4j6Nl1cF0ypXSqwA6Lg0sl5OgD6lqID+cqUcmQPAgzyXfmZ7H0PnYA5DCX0 D8y1usM4sYe9r84LQYyiTIj7rA50KSy1oTILbnHPjgt7uX054dAdOrLLSdQO25HXoufYiXj lzvaG5jo4+FOzNSJ/h63g== X-UI-Out-Filterresults: notjunk:1;V01:K0:AUmhmoinx84=:j6RI3wxCR4czvZK9akS487 hB+aPRozJiNzxk43CbUuKX0c5XS3MnhfohDZpWOhp9P7KNqWJEQuL/ToJNFZZLUXeKAKo1Sz1 qA+4t1Xvp4DB0u87SmR6lazlu6tlcIZMv2dYM1eozj2EevbwjMZAKtj5KObSYGd9XtEL3mS7x +Ri/zYiIF+NAxEJWqiYJ0xRaCCHlsXa3PtbxXiDcbnyv/7birl1fxTxD7X6DjdrVuczu/nwZf N0dYJhZ0Zh0ctQ3UhSpvpjjnIq8GsT2774eIJ45E2EGEMUuNuI4mOw2D+ybHzR5o4WE7Y9ZNK Vp6SH5WPkPVlOaN2V4xwaY2fraM7u7kNjD94Qj/VyA7ano/9CZGUUmJajXfskQ/QoJjf+Ma+M 0diVbIs2M6VKT4HAnewY0CQ4Oi6+kojSSv3JiHF1ZXgIAvANB25RUi67eqiCxtmnN7YBgv8vW MrKpn3ezUiQ2KTBt/HW71313LqUVVbpnSG9oCxulQsnIP7qNq3HvUFTbXJt0RsGotlbTzYuWn +Aot1b3crQ9tuT4otOX+hgYTHe9duiYfFilNUtKYR8HaIdulVYvF4FliF8QRftMDSCqpBKYF6 Pziee4ihBnhbNp+pqpg7wDGuCNQhOAnmDgKuXAZ/H1IzdCA/Gdw+0HOanWnB3cMgXaGs6Y3Pv e4QGRLlAu8whsC6kcOBnBCEYd6HV+BNgTHHibhdMGtXTt/3/h66riuh2yOAqfd/lAR0U= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PATCH v4 1/7] target/m68k: add fscc. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" use DisasCompare with FPU conditions in fscc and fbcc. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/translate.c | 210 ++++++++++++++++++++++++++++++--------------= ---- 1 file changed, 131 insertions(+), 79 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 7aa0fdc..5f4bedc 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4633,142 +4633,193 @@ undef: disas_undef_fpu(env, s, insn); } =20 -DISAS_INSN(fbcc) +static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond) { - uint32_t offset; - uint32_t addr; - TCGLabel *l1; - TCGv tmp, fpsr; - - addr =3D s->pc; - offset =3D cpu_ldsw_code(env, s->pc); - s->pc +=3D 2; - if (insn & (1 << 6)) { - offset =3D (offset << 16) | read_im16(env, s); - } + TCGv fpsr; =20 + c->g1 =3D 1; + c->v2 =3D tcg_const_i32(0); + c->g2 =3D 0; + /* TODO: Raise BSUN exception. */ fpsr =3D tcg_temp_new(); gen_load_fcr(s, fpsr, M68K_FPSR); - l1 =3D gen_new_label(); - /* TODO: Raise BSUN exception. */ - /* Jump to l1 if condition is true. */ - switch (insn & 0x3f) { + switch (cond) { case 0: /* False */ case 16: /* Signaling False */ + c->v1 =3D c->v2; + c->tcond =3D TCG_COND_NEVER; break; case 1: /* EQual Z */ case 17: /* Signaling EQual Z */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z); + c->tcond =3D TCG_COND_NE; break; case 2: /* Ordered Greater Than !(A || Z || N) */ case 18: /* Greater Than !(A || Z || N) */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->tcond =3D TCG_COND_EQ; break; case 3: /* Ordered Greater than or Equal Z || !(A || N) */ case 19: /* Greater than or Equal Z || !(A || N) */ - assert(FPSR_CC_A =3D=3D (FPSR_CC_N >> 3)); - tmp =3D tcg_temp_new(); - tcg_gen_shli_i32(tmp, fpsr, 3); - tcg_gen_or_i32(tmp, tmp, fpsr); - tcg_gen_xori_i32(tmp, tmp, FPSR_CC_N); - tcg_gen_andi_i32(tmp, tmp, FPSR_CC_N | FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A); + tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_A)= ); + tcg_gen_andi_i32(fpsr, fpsr, FPSR_CC_Z | FPSR_CC_N); + tcg_gen_or_i32(c->v1, c->v1, fpsr); + tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N); + c->tcond =3D TCG_COND_NE; break; case 4: /* Ordered Less Than !(!N || A || Z); */ case 20: /* Less Than !(!N || A || Z); */ - tmp =3D tcg_temp_new(); - tcg_gen_xori_i32(tmp, fpsr, FPSR_CC_N); - tcg_gen_andi_i32(tmp, tmp, FPSR_CC_N | FPSR_CC_A | FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_xori_i32(c->v1, fpsr, FPSR_CC_N); + tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_N | FPSR_CC_A | FPSR_CC_Z); + c->tcond =3D TCG_COND_EQ; break; case 5: /* Ordered Less than or Equal Z || (N && !A) */ case 21: /* Less than or Equal Z || (N && !A) */ - assert(FPSR_CC_A =3D=3D (FPSR_CC_N >> 3)); - tmp =3D tcg_temp_new(); - tcg_gen_xori_i32(tmp, fpsr, FPSR_CC_A); - tcg_gen_shli_i32(tmp, tmp, 3); - tcg_gen_ori_i32(tmp, tmp, FPSR_CC_Z); - tcg_gen_and_i32(tmp, tmp, fpsr); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A); + tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_A)= ); + tcg_gen_andc_i32(c->v1, fpsr, c->v1); + tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_Z | FPSR_CC_N); + c->tcond =3D TCG_COND_NE; break; case 6: /* Ordered Greater or Less than !(A || Z) */ case 22: /* Greater or Less than !(A || Z) */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z); + c->tcond =3D TCG_COND_EQ; break; case 7: /* Ordered !A */ case 23: /* Greater, Less or Equal !A */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A); + c->tcond =3D TCG_COND_EQ; break; case 8: /* Unordered A */ case 24: /* Not Greater, Less or Equal A */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A); + c->tcond =3D TCG_COND_NE; break; case 9: /* Unordered or Equal A || Z */ case 25: /* Not Greater or Less then A || Z */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z); + c->tcond =3D TCG_COND_NE; break; case 10: /* Unordered or Greater Than A || !(N || Z)) */ case 26: /* Not Less or Equal A || !(N || Z)) */ - assert(FPSR_CC_Z =3D=3D (FPSR_CC_N >> 1)); - tmp =3D tcg_temp_new(); - tcg_gen_shli_i32(tmp, fpsr, 1); - tcg_gen_or_i32(tmp, tmp, fpsr); - tcg_gen_xori_i32(tmp, tmp, FPSR_CC_N); - tcg_gen_andi_i32(tmp, tmp, FPSR_CC_N | FPSR_CC_A); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z); + tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_Z)= ); + tcg_gen_andi_i32(fpsr, fpsr, FPSR_CC_A | FPSR_CC_N); + tcg_gen_or_i32(c->v1, c->v1, fpsr); + tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N); + c->tcond =3D TCG_COND_NE; break; case 11: /* Unordered or Greater or Equal A || Z || !N */ case 27: /* Not Less Than A || Z || !N */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); - tcg_gen_xori_i32(tmp, tmp, FPSR_CC_N); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); + tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N); + c->tcond =3D TCG_COND_NE; break; case 12: /* Unordered or Less Than A || (N && !Z) */ case 28: /* Not Greater than or Equal A || (N && !Z) */ - assert(FPSR_CC_Z =3D=3D (FPSR_CC_N >> 1)); - tmp =3D tcg_temp_new(); - tcg_gen_xori_i32(tmp, fpsr, FPSR_CC_Z); - tcg_gen_shli_i32(tmp, tmp, 1); - tcg_gen_ori_i32(tmp, tmp, FPSR_CC_A); - tcg_gen_and_i32(tmp, tmp, fpsr); - tcg_gen_andi_i32(tmp, tmp, FPSR_CC_A | FPSR_CC_N); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z); + tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_Z)= ); + tcg_gen_andc_i32(c->v1, fpsr, c->v1); + tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_A | FPSR_CC_N); + c->tcond =3D TCG_COND_NE; break; case 13: /* Unordered or Less or Equal A || Z || N */ case 29: /* Not Greater Than A || Z || N */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); + c->tcond =3D TCG_COND_NE; break; case 14: /* Not Equal !Z */ case 30: /* Signaling Not Equal !Z */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z); + c->tcond =3D TCG_COND_EQ; break; case 15: /* True */ case 31: /* Signaling True */ - tcg_gen_br(l1); + c->v1 =3D c->v2; + c->tcond =3D TCG_COND_ALWAYS; break; } tcg_temp_free(fpsr); +} + +static void gen_fjmpcc(DisasContext *s, int cond, TCGLabel *l1) +{ + DisasCompare c; + + gen_fcc_cond(&c, s, cond); + tcg_gen_brcond_i32(c.tcond, c.v1, c.v2, l1); + free_cond(&c); +} + +DISAS_INSN(fbcc) +{ + uint32_t offset; + uint32_t base; + TCGLabel *l1; + + base =3D s->pc; + offset =3D (int16_t)read_im16(env, s); + if (insn & (1 << 6)) { + offset =3D (offset << 16) | read_im16(env, s); + } + + l1 =3D gen_new_label(); + update_cc_op(s); + gen_fjmpcc(s, insn & 0x3f, l1); gen_jmp_tb(s, 0, s->pc); gen_set_label(l1); - gen_jmp_tb(s, 1, addr + offset); + gen_jmp_tb(s, 1, base + offset); +} + +DISAS_INSN(fscc) +{ + DisasCompare c; + int cond; + TCGv tmp; + uint16_t ext; + + ext =3D read_im16(env, s); + cond =3D ext & 0x3f; + gen_fcc_cond(&c, s, cond); + + tmp =3D tcg_temp_new(); + tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); + free_cond(&c); + + tcg_gen_neg_i32(tmp, tmp); + DEST_EA(env, insn, OS_BYTE, tmp, NULL); + tcg_temp_free(tmp); } =20 DISAS_INSN(frestore) @@ -5349,6 +5400,7 @@ void register_m68k_insns (CPUM68KState *env) INSN(frestore, f340, ffc0, CF_FPU); INSN(fsave, f300, ffc0, CF_FPU); INSN(fpu, f200, ffc0, FPU); + INSN(fscc, f240, ffc0, FPU); INSN(fbcc, f280, ff80, FPU); INSN(frestore, f340, ffc0, FPU); INSN(fsave, f300, ffc0, FPU); --=20 2.9.4 From nobody Wed May 1 00:57:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Wed, 28 Jun 2017 22:42:47 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 28 Jun 2017 22:42:36 +0200 Message-Id: <20170628204241.32106-3-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170628204241.32106-1-laurent@vivier.eu> References: <20170628204241.32106-1-laurent@vivier.eu> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K0:HgPjIycXY+eyi4gFAUQZHTM97wiOgTfnkdD33ih3TjbeCysnUFD NU6AYJ9DDW6HSSk15jt5qSBPA50bgA1SgI+szMHA2cj7f7+fPcyNE7y9QDHN98B7Lc+NX9h omnFEkkopDSn/6A+AdEkH/hUJuAtyaTZf23UKnZNTdXWZyUgJh0mIFPNsYCCnaE7xnhZ4Eb It/KyfWqxNSzqMtXDMhxQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:M2OZa0+SsHU=:0Btv5sVhZaUrg35UK0UzNY rCi8j0LwIIakAc/Z801o9S9qBxF5QnReNJj0Sr8AlXF4wUvR6RJ34XEdBoBht0Vr/Cn6QA9dt VEP0uXd3DWnvsyht3LWMBDnq0Dq0F5UT8ZZyIIT7m29zkUXOLC3HHogkjhrqziMqlXU0sNvOh m/R+WaZc9hJPRgRlkRBXtO3Vu95lIx4ysmpKoeHSBphmFPkGj8WHesynr9ApFF9PnMZ0gIi84 wV8K2/1o3eSyAdPyNefaeYc2iHGSgPr2Wsnucj1bB43ku9XzDT6BaZ0lnD9QmjtGF4YsEBCzW qDCadxCwyliVS4Er6WrZaYhDpxOn7M0Qk46845r5WiSo5zCBJjLMIau8qiW3xafzIclGYI5BU WWUlqX9Yq7T7K4QVTiLgzNAOzq6UxOtTQFctIgnUZVD47l/O9JK1Ont0bvuhZIhZY0BxW8MDE cNtoBQDeoZrPf/D7XDGU6ulxAPSdx36+yfvSVvjz3cTgf8zn8vSXCOFNgWXk6l8272dNAql39 r62RAmSxkJt2w65ZKTXPrImAkaZ9dGZvf1x1u1dwYnouicLIFDVtdDWPcsfVDwrqodNK+L5pH WNMz8o6JMsFaYsmoTGMMLkWW6fQsIHckLX5zHko9M/Kge2gOHbFDe0zS5dZeo/ZuOSLtdlKIA snE416i0a1MDpFD3eFMt3eRym6xdJ1Kp3IN2FZYqY7xPY+k7CBSSpEdk1cm/ktLdqqdUS/7z8 xUu4TYYIyiYzfSSq X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.75 Subject: [Qemu-devel] [PATCH v4 2/7] target/m68k: add fmovecr X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 fmovecr moves a floating point constant from the FPU ROM to a floating point register. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/m68k/fpu_helper.c | 34 ++++++++++++++++++++++++++++++++++ target/m68k/helper.h | 1 + target/m68k/translate.c | 13 ++++++++++++- 3 files changed, 47 insertions(+), 1 deletion(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index a9e17f5..4c14a1f 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -23,6 +23,35 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" =20 +/* Undefined offsets may be different on various FPU. + * On 68040 they return 0.0 (floatx80_zero) + */ + +static const floatx80 fpu_rom[128] =3D { + [0x00] =3D floatx80_pi, /* Pi */ + [0x0b] =3D make_floatx80(0x3ffd, 0x9a209a84fbcff798ULL), /* Log10(2) = */ + [0x0c] =3D make_floatx80(0x4000, 0xadf85458a2bb4a9aULL), /* e = */ + [0x0d] =3D make_floatx80(0x3fff, 0xb8aa3b295c17f0bcULL), /* Log2(e) = */ + [0x0e] =3D make_floatx80(0x3ffd, 0xde5bd8a937287195ULL), /* Log10(e) = */ + [0x0f] =3D floatx80_zero, /* Zero = */ + [0x30] =3D floatx80_ln2, /* ln(2) = */ + [0x31] =3D make_floatx80(0x4000, 0x935d8dddaaa8ac17ULL), /* ln(10) = */ + [0x32] =3D floatx80_one, /* 10^0 = */ + [0x33] =3D make_floatx80(0x4002, 0xa000000000000000ULL), /* 10^1 = */ + [0x34] =3D make_floatx80(0x4005, 0xc800000000000000ULL), /* 10^2 = */ + [0x35] =3D make_floatx80(0x400c, 0x9c40000000000000ULL), /* 10^4 = */ + [0x36] =3D make_floatx80(0x4019, 0xbebc200000000000ULL), /* 10^8 = */ + [0x37] =3D make_floatx80(0x4034, 0x8e1bc9bf04000000ULL), /* 10^16 = */ + [0x38] =3D make_floatx80(0x4069, 0x9dc5ada82b70b59eULL), /* 10^32 = */ + [0x39] =3D make_floatx80(0x40d3, 0xc2781f49ffcfa6d5ULL), /* 10^64 = */ + [0x3a] =3D make_floatx80(0x41a8, 0x93ba47c980e98ce0ULL), /* 10^128 = */ + [0x3b] =3D make_floatx80(0x4351, 0xaa7eebfb9df9de8eULL), /* 10^256 = */ + [0x3c] =3D make_floatx80(0x46a3, 0xe319a0aea60e91c7ULL), /* 10^512 = */ + [0x3d] =3D make_floatx80(0x4d48, 0xc976758681750c17ULL), /* 10^1024 = */ + [0x3e] =3D make_floatx80(0x5a92, 0x9e8b3b5dc53d5de5ULL), /* 10^2048 = */ + [0x3f] =3D make_floatx80(0x7525, 0xc46052028a20979bULL), /* 10^4096 = */ +}; + int32_t HELPER(reds32)(CPUM68KState *env, FPReg *val) { return floatx80_to_int32(val->d, &env->fp_status); @@ -204,3 +233,8 @@ void HELPER(ftst)(CPUM68KState *env, FPReg *val) } env->fpsr =3D (env->fpsr & ~FPSR_CC_MASK) | cc; } + +void HELPER(fconst)(CPUM68KState *env, FPReg *val, uint32_t offset) +{ + val->d =3D fpu_rom[offset]; +} diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 98cbf18..d6e80e4 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -35,6 +35,7 @@ DEF_HELPER_4(fdiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) +DEF_HELPER_3(fconst, void, env, fp, i32) =20 DEF_HELPER_3(mac_move, void, env, i32, i32) DEF_HELPER_3(macmulf, i64, env, i32, i32) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 5f4bedc..5b93d3f 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4518,10 +4518,21 @@ DISAS_INSN(fpu) ext =3D read_im16(env, s); opmode =3D ext & 0x7f; switch ((ext >> 13) & 7) { - case 0: case 2: + case 0: break; case 1: goto undef; + case 2: + if (insn =3D=3D 0xf200 && (ext & 0xfc00) =3D=3D 0x5c00) { + /* fmovecr */ + TCGv rom_offset =3D tcg_const_i32(opmode); + cpu_dest =3D gen_fp_ptr(REG(ext, 7)); + gen_helper_fconst(cpu_env, cpu_dest, rom_offset); + tcg_temp_free_ptr(cpu_dest); + tcg_temp_free(rom_offset); + return; + } + break; case 3: /* fmove out */ cpu_src =3D gen_fp_ptr(REG(ext, 7)); opsize =3D ext_opsize(ext, 10); --=20 2.9.4 From nobody Wed May 1 00:57:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498682719611848.7577076209235; Wed, 28 Jun 2017 13:45:19 -0700 (PDT) Received: from localhost ([::1]:35582 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJpt-0007Mo-0b for importer@patchew.org; Wed, 28 Jun 2017 16:45:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39802) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJo5-0005Yx-KB for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQJo2-0003Xd-Gm for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:25 -0400 Received: from mout.kundenserver.de ([217.72.192.75]:49389) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dQJo2-0003We-4f for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:22 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0LylIV-1dmGPI2NVf-016AQQ; Wed, 28 Jun 2017 22:42:47 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 28 Jun 2017 22:42:37 +0200 Message-Id: <20170628204241.32106-4-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170628204241.32106-1-laurent@vivier.eu> References: <20170628204241.32106-1-laurent@vivier.eu> X-Provags-ID: V03:K0:cxJmceDj4QJ3PmuOtxGlxFIXb/emOyO8vrdzrOurwwsLts0ZlPI AjoqW1vuszXDiFYMPToFvoMLjj2DZRuNaDBXbmyDQ01LJtRfD+xl/IRjp9UbQ+9NfMxC6Kl fxLecF2gKl6QuUoNOWBHsbuNxs2ZAHiVwGCWF4SAPMT2o8nO7snIZvhhjWYSGOFSh4ZZOm7 3LKsv8k2TRTPq3eidlPpA== X-UI-Out-Filterresults: notjunk:1;V01:K0:RBf5xMwWqYA=:oVIKKQJeMl2M4P43KrMmKZ So6hlcJJDub0XaIsmKgpVtP+bfcVUoLW25gkjG79ZhPt6OrTdu1DJ2BhK1F8338xuvmRICTJ1 x7uZEYXVcn/n484okkklT033QUGd6FMJz5j2AiFp9IZvXPA/zJ+X4cuhDfIQwjNwPw6Zj4O9x CQDbgH0I2GLDKGTMFNKo+PAznDevJ2kmePjd227C+oD2YGbdlr+ZneHJXhjlvIdGyEURn0yoC 61qfmn+m3qDpkTfSxEZCi/4izWAw3c4Q3m6N9PjvBI0KjUg6ZoCInil7c2vRrBp29IPTWiasU sPKXuuYMMC8cmjN73XVC4mOR3GuI6h8AmPaJIWdDCjC9ihmpKGt99UVAv6vJO+agYRjQbqAvV coCjSOSrZM5LdJ+FjxVXgAPkglIGKhRoOVFAYOSTGPFzFfitwa+ws/4SSfRDMcqOarGvn9TC5 Ch1p2Bs5gLKeDjYcKH5lOV6+UJZgGokY85ytNyFkYJAUkm0TRloCg7WRhYKMMswHmR5novlix UEvSr9ic+OndX+3df3gz0meERerB6HSdozNgax0Uwp7JlPdNJsHu/WGxHA2E5QzYANz+iHIUi QBxvG4AbaicgvrWSKfAtkhRU3F03HatJH/PuVlZ2+HLBtCM43MAfP0kghZKkS/5PNMrECm5f8 IU9UTLUlbljExf6kodqowfRjxEXQoDoKrhYEW4ae+JmwOFCiNFu+s5BkeoUD0R3ZFmJA= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.75 Subject: [Qemu-devel] [PATCH v4 3/7] target/m68k: add explicit single and double precision operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 80 ++++++++++++++++++++++++++++++++++++++++++++= ++++ target/m68k/helper.h | 10 ++++++ target/m68k/translate.c | 40 +++++++++++++++++++++--- 3 files changed, 125 insertions(+), 5 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 4c14a1f..3b53554 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -157,11 +157,35 @@ void HELPER(set_fpcr)(CPUM68KState *env, uint32_t val) cpu_m68k_set_fpcr(env, val); } =20 +#define PREC_BEGIN(prec) \ + do { \ + int old; \ + old =3D get_floatx80_rounding_precision(&env->fp_status); \ + set_floatx80_rounding_precision(prec, &env->fp_status) \ + +#define PREC_END() \ + set_floatx80_rounding_precision(old, &env->fp_status); \ + } while (0) + void HELPER(fsqrt)(CPUM68KState *env, FPReg *res, FPReg *val) { res->d =3D floatx80_sqrt(val->d, &env->fp_status); } =20 +void HELPER(fssqrt)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(32); + res->d =3D floatx80_sqrt(val->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdsqrt)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(64); + res->d =3D floatx80_sqrt(val->d, &env->fp_status); + PREC_END(); +} + void HELPER(fabs)(CPUM68KState *env, FPReg *res, FPReg *val) { res->d =3D floatx80_abs(val->d); @@ -177,21 +201,77 @@ void HELPER(fadd)(CPUM68KState *env, FPReg *res, FPRe= g *val0, FPReg *val1) res->d =3D floatx80_add(val0->d, val1->d, &env->fp_status); } =20 +void HELPER(fsadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d =3D floatx80_add(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d =3D floatx80_add(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + void HELPER(fsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d =3D floatx80_sub(val1->d, val0->d, &env->fp_status); } =20 +void HELPER(fssub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d =3D floatx80_sub(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d =3D floatx80_sub(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + void HELPER(fmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d =3D floatx80_mul(val0->d, val1->d, &env->fp_status); } =20 +void HELPER(fsmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d =3D floatx80_mul(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d =3D floatx80_mul(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d =3D floatx80_div(val1->d, val0->d, &env->fp_status); } =20 +void HELPER(fsdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d =3D floatx80_div(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d =3D floatx80_div(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + static int float_comp_to_cc(int float_compare) { switch (float_compare) { diff --git a/target/m68k/helper.h b/target/m68k/helper.h index d6e80e4..0c7f06f 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -26,12 +26,22 @@ DEF_HELPER_2(reds32, s32, env, fp) DEF_HELPER_3(firound, void, env, fp, fp) DEF_HELPER_3(fitrunc, void, env, fp, fp) DEF_HELPER_3(fsqrt, void, env, fp, fp) +DEF_HELPER_3(fssqrt, void, env, fp, fp) +DEF_HELPER_3(fdsqrt, void, env, fp, fp) DEF_HELPER_3(fabs, void, env, fp, fp) DEF_HELPER_3(fchs, void, env, fp, fp) DEF_HELPER_4(fadd, void, env, fp, fp, fp) +DEF_HELPER_4(fsadd, void, env, fp, fp, fp) +DEF_HELPER_4(fdadd, void, env, fp, fp, fp) DEF_HELPER_4(fsub, void, env, fp, fp, fp) +DEF_HELPER_4(fssub, void, env, fp, fp, fp) +DEF_HELPER_4(fdsub, void, env, fp, fp, fp) DEF_HELPER_4(fmul, void, env, fp, fp, fp) +DEF_HELPER_4(fsmul, void, env, fp, fp, fp) +DEF_HELPER_4(fdmul, void, env, fp, fp, fp) DEF_HELPER_4(fdiv, void, env, fp, fp, fp) +DEF_HELPER_4(fsdiv, void, env, fp, fp, fp) +DEF_HELPER_4(fddiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 5b93d3f..618abf6 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4604,27 +4604,57 @@ DISAS_INSN(fpu) case 3: /* fintrz */ gen_helper_fitrunc(cpu_env, cpu_dest, cpu_src); break; - case 4: case 0x41: case 0x45: /* fsqrt */ + case 4: /* fsqrt */ gen_helper_fsqrt(cpu_env, cpu_dest, cpu_src); break; + case 0x41: /* fssqrt */ + gen_helper_fssqrt(cpu_env, cpu_dest, cpu_src); + break; + case 0x45: /* fdsqrt */ + gen_helper_fdsqrt(cpu_env, cpu_dest, cpu_src); + break; case 0x18: case 0x58: case 0x5c: /* fabs */ gen_helper_fabs(cpu_env, cpu_dest, cpu_src); break; case 0x1a: case 0x5a: case 0x5e: /* fneg */ gen_helper_fchs(cpu_env, cpu_dest, cpu_src); break; - case 0x20: case 0x60: case 0x64: /* fdiv */ + case 0x20: /* fdiv */ gen_helper_fdiv(cpu_env, cpu_dest, cpu_src, cpu_dest); break; - case 0x22: case 0x62: case 0x66: /* fadd */ + case 0x60: /* fsdiv */ + gen_helper_fsdiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x64: /* fddiv */ + gen_helper_fddiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x22: /* fadd */ gen_helper_fadd(cpu_env, cpu_dest, cpu_src, cpu_dest); break; - case 0x23: case 0x63: case 0x67: /* fmul */ + case 0x62: /* fsadd */ + gen_helper_fsadd(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x66: /* fdadd */ + gen_helper_fdadd(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x23: /* fmul */ gen_helper_fmul(cpu_env, cpu_dest, cpu_src, cpu_dest); break; - case 0x28: case 0x68: case 0x6c: /* fsub */ + case 0x63: /* fsmul */ + gen_helper_fsmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x67: /* fdmul */ + gen_helper_fdmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x28: /* fsub */ gen_helper_fsub(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x68: /* fssub */ + gen_helper_fssub(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x6c: /* fdsub */ + gen_helper_fdsub(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x38: /* fcmp */ gen_helper_fcmp(cpu_env, cpu_src, cpu_dest); return; --=20 2.9.4 From nobody Wed May 1 00:57:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498682874704345.65015717850804; Wed, 28 Jun 2017 13:47:54 -0700 (PDT) Received: from localhost ([::1]:35596 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJsP-00016K-C4 for importer@patchew.org; Wed, 28 Jun 2017 16:47:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39810) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJo6-0005ZL-9V for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQJo3-0003Xz-7A for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:26 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:50845) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dQJo2-0003XB-Sh for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:23 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0McnL7-1d941p1O3l-00HxYu; Wed, 28 Jun 2017 22:42:48 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 28 Jun 2017 22:42:38 +0200 Message-Id: <20170628204241.32106-5-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170628204241.32106-1-laurent@vivier.eu> References: <20170628204241.32106-1-laurent@vivier.eu> X-Provags-ID: V03:K0:CjfD7kJwSzIoYgpSqN/HWQVMPHG8Rt2l7OhlVueqIROOsSYk92W QBNV7LsRWpQrhPH+AJ0EJdNj97zGxPlZqH8ssQFTyIKp3RDCWy/5ilx4H9HqIwrN9+aNd9v DOc8WyzbhmkycU6mkQraCWlkqERMhZ2v3BBNftSxKK4wH1hL3XZs7qcw/eSC8WfAA4LJ6A0 WfV/B7vCqJiSm5ngyyt8Q== X-UI-Out-Filterresults: notjunk:1;V01:K0:K0yRDwOYfc0=:0/H3CKH80ueTiDTBQ//gXI 2eaGFoMoRi+AlTGaEauBHs8yb6YT8laDIVn6Ff2uzPsX8mHGJ9Bm9FRSr8btRXTjcVvNaw76x zSANpDdzk3DNzjfEBgI1wA4mpOT3Lg2uVtfzXbMZuRV5s35VQRcqT/fKPFt4udyLruJ474ld7 9DeM9TbGt+69hxHcIbZ6Rf+k/3PMtqvsGNuDoMH/pfRobZwG+wBj6PcaN6sybd4w0IVKKR8ar 0ClBvRANjmT/oHz7EXve98zjAtTkKLBifOc4YnwO3SK5ktsmokVFOCOxcZSEXQZUDLmr/5z79 xxQ4rgOvd4Dk0dWKcLcf6zz2U6zTrgTexJZgejIFoFJvS38U8u8k/Xi4Y/uvjjjs4s9VpG2nT cewvZh9uxlo1Fm2xObsTfRNBBbK9UIoGIu6ifqIFsTPVu4R5uPiCK0bKVreiEBvHIeapabkRo pVL+xUPExuM2BNLqrfnoAqFgJyWHUeZE7reNUAf+8WnQWrhWhM6jV0cr3VSfwzBJiKPC3DdF1 xNeeN++IZNBmdak0U7wCMbG/IcxAGzqhKSIL4tM8uH73y5O2GkBJlv9CJhLBj+1T5ruKlGuDX JtlQEyVu2OJbD+OIpif/nR/pMt2HKBxBNkmXlGml20Lr52rsNc6UlpVPGtdhx0uXRJuQDtCkn cDSBQ+C1Lbym2T4uY+flvqviCgBwSRQcw2utmTl3OOBRh5dWlSa/EpBJlAJFNqLyaQAk= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.13 Subject: [Qemu-devel] [PATCH v4 4/7] softfloat: define floatx80_round() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add a function to round a floatx80 to the defined precision (floatx80_rounding_precision) Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Aurelien Jarno --- fpu/softfloat.c | 16 ++++++++++++++++ include/fpu/softfloat.h | 1 + 2 files changed, 17 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 7af14e2..433c5da 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -5086,6 +5086,22 @@ float128 floatx80_to_float128(floatx80 a, float_stat= us *status) } =20 /*------------------------------------------------------------------------= ---- +| Rounds the extended double-precision floating-point value `a' +| to the precision provided by floatx80_rounding_precision and returns the +| result as an extended double-precision floating-point value. +| The operation is performed according to the IEC/IEEE Standard for Binary +| Floating-Point Arithmetic. +*-------------------------------------------------------------------------= ---*/ + +floatx80 floatx80_round(floatx80 a, float_status *status) +{ + return roundAndPackFloatx80(status->floatx80_rounding_precision, + extractFloatx80Sign(a), + extractFloatx80Exp(a), + extractFloatx80Frac(a), 0, status); +} + +/*------------------------------------------------------------------------= ---- | Rounds the extended double-precision floating-point value `a' to an inte= ger, | and returns the result as an extended quadruple-precision floating-point | value. The operation is performed according to the IEC/IEEE Standard for diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index f1288ef..d9689ec 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -621,6 +621,7 @@ float128 floatx80_to_float128(floatx80, float_status *s= tatus); /*------------------------------------------------------------------------= ---- | Software IEC/IEEE extended double-precision operations. *-------------------------------------------------------------------------= ---*/ +floatx80 floatx80_round(floatx80 a, float_status *status); floatx80 floatx80_round_to_int(floatx80, float_status *status); floatx80 floatx80_add(floatx80, floatx80, float_status *status); floatx80 floatx80_sub(floatx80, floatx80, float_status *status); --=20 2.9.4 From nobody Wed May 1 00:57:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498682708280679.8600947540795; Wed, 28 Jun 2017 13:45:08 -0700 (PDT) Received: from localhost ([::1]:35581 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJpi-0007BH-GW for importer@patchew.org; Wed, 28 Jun 2017 16:45:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39747) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJo0-0005Vn-M9 for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQJnz-0003Ve-Ji for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:20 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:52684) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dQJnz-0003VA-7Y for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:19 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0MFsVa-1dUBQd09Go-00EtHb; Wed, 28 Jun 2017 22:42:49 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 28 Jun 2017 22:42:39 +0200 Message-Id: <20170628204241.32106-6-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170628204241.32106-1-laurent@vivier.eu> References: <20170628204241.32106-1-laurent@vivier.eu> X-Provags-ID: V03:K0:JMdwZKswZjJoIm5gO22KTXaIOAsP1LvWMOIY4xwLUH0zl50smP6 4Do78yyQWbreENnTrPWHst6Vym2+ker3rXj1HSThEPV0x5zbTbXv0rjCmVlsEAccoj32e9Y /iGuumZAMaLiUOsAHeZ6HAM5RMibhs1CW2v2CMKn4OoG5mSHt6WqvfBNWFuD2hTjCWMSsH5 Gm+kXX6RTRddmIWxqBNFA== X-UI-Out-Filterresults: notjunk:1;V01:K0:TSbN9EFDLjo=:eTFdqGXkKUaGG22VTO7At1 FJtt18EoXECWCfv5PMEDvd2EHOpYkFRbDPFTsu1db8E7/wNE0kZuMaoqNoL1xkpS6IRiRwVfK 3nGVhzzDwQkhQp81jmYM/z/6DMfxCJDMDuxKwXdiJc/qYGIN2zLvBsWNMTKG37Vh85ZA+6vTX 06NB1X6M79k9ZnXF3mNqu6k8TimQff6VOJzJ5MRVy6yJje0/zLsdU+TgcX8MB8rypxNX1bfYG JZryKgwuj/zNtiwhA2XkM4dSMki6jSAGcQwNOdfQB3T0RacbT1iT2zQoUQhRALdGbEuCNM9E5 KZHeEjH6D38Jqky7YZiJ5sbgXWQkaLpFKPp9kmhmV22AG7XSsM0nNPu2EvqxhDFYcg6DyT9nQ HL1mKy5ESf/hqOVWVD2Bzk9fRVSKAnwjuuR+Wo37rnaqpDuMxZKq0vZhKgqLuMrKX2965teRt 84TDY1Yj7rW+RqEG9sYMiZXeCNNHEJ8VbbH/Ny8GlpAgOUL8Gq7g8CrCq3W/MnP3s+m9VCOJC HB1AZIQLKX7MGzw7v+XksmLg7jnNZbJ1mQwqqWHToZF39hyO4Ha9j2IVoJCj+BSKwZEDVz5ir 5h6wnUWZW+lCbRQtWc/cXdw4Ftfy5P2VZwrMCCG1r2XguSpcrvTVl2IctiOPkUwdAtuC1X476 iy/GUOLgFL8iVWzfYWLhV+JwYlQgsy97vT3S/wrkZXl4xkmUXAb6OKvc8G3c8n+0yClQ= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PATCH v4 5/7] target/m68k: add fsglmul and fsgldiv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" fsglmul and fsgldiv truncate data to single precision before computing results. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 28 ++++++++++++++++++++++++++++ target/m68k/helper.h | 2 ++ target/m68k/translate.c | 6 ++++++ 3 files changed, 36 insertions(+) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 3b53554..600ae8a 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -253,6 +253,20 @@ void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPRe= g *val0, FPReg *val1) PREC_END(); } =20 +void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *va= l1) +{ + int rounding_mode =3D get_float_rounding_mode(&env->fp_status); + floatx80 a, b; + + PREC_BEGIN(32); + set_float_rounding_mode(float_round_to_zero, &env->fp_status); + a =3D floatx80_round(val0->d, &env->fp_status); + b =3D floatx80_round(val1->d, &env->fp_status); + set_float_rounding_mode(rounding_mode, &env->fp_status); + res->d =3D floatx80_mul(a, b, &env->fp_status); + PREC_END(); +} + void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d =3D floatx80_div(val1->d, val0->d, &env->fp_status); @@ -272,6 +286,20 @@ void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPRe= g *val0, FPReg *val1) PREC_END(); } =20 +void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *va= l1) +{ + int rounding_mode =3D get_float_rounding_mode(&env->fp_status); + floatx80 a, b; + + PREC_BEGIN(32); + set_float_rounding_mode(float_round_to_zero, &env->fp_status); + a =3D floatx80_round(val1->d, &env->fp_status); + b =3D floatx80_round(val0->d, &env->fp_status); + set_float_rounding_mode(rounding_mode, &env->fp_status); + res->d =3D floatx80_div(a, b, &env->fp_status); + PREC_END(); +} + static int float_comp_to_cc(int float_compare) { switch (float_compare) { diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 0c7f06f..f05191b 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -39,9 +39,11 @@ DEF_HELPER_4(fdsub, void, env, fp, fp, fp) DEF_HELPER_4(fmul, void, env, fp, fp, fp) DEF_HELPER_4(fsmul, void, env, fp, fp, fp) DEF_HELPER_4(fdmul, void, env, fp, fp, fp) +DEF_HELPER_4(fsglmul, void, env, fp, fp, fp) DEF_HELPER_4(fdiv, void, env, fp, fp, fp) DEF_HELPER_4(fsdiv, void, env, fp, fp, fp) DEF_HELPER_4(fddiv, void, env, fp, fp, fp) +DEF_HELPER_4(fsgldiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 618abf6..72c45de 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4646,6 +4646,12 @@ DISAS_INSN(fpu) case 0x67: /* fdmul */ gen_helper_fdmul(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x24: /* fsgldiv */ + gen_helper_fsgldiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x27: /* fsglmul */ + gen_helper_fsglmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x28: /* fsub */ gen_helper_fsub(cpu_env, cpu_dest, cpu_src, cpu_dest); break; --=20 2.9.4 From nobody Wed May 1 00:57:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498682861875839.7517140493484; Wed, 28 Jun 2017 13:47:41 -0700 (PDT) Received: from localhost ([::1]:35594 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJsC-0000vf-Cz for importer@patchew.org; Wed, 28 Jun 2017 16:47:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39759) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJo1-0005WF-FF for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQJo0-0003W2-9n for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:21 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:64570) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dQJnz-0003VM-TI for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:20 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0LbJZC-1eBFPH34qQ-00kwmR; Wed, 28 Jun 2017 22:42:50 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 28 Jun 2017 22:42:40 +0200 Message-Id: <20170628204241.32106-7-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170628204241.32106-1-laurent@vivier.eu> References: <20170628204241.32106-1-laurent@vivier.eu> X-Provags-ID: V03:K0:uIU6MGN5upbc7/9X/i/7dOjYtk7475ALqqlP2kPQ4Nka9y7ZYv9 wPZikFc27IeZrpFFATdxMUNJXhRUDMSxVbzWX+u5jmi7i5oOB6MfVx5YIbN0KMnPtmgUqya MRJaXDj5zsdgTlasypRfmndYV1kRakOLgfwieip9f/CUmOM9abdFIQZ5Bqb0i8VW56zHXtz PVyI+GmAyjtGWDYOc30OQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:mfCmjERIlG0=:fHVTHCooN8NqtdcCCYQy5q YSirLCME60nnAG8K9gYIDRMqTzKuK/cLQlOMcqNgR0kd2+llU0LCBdfti4mq6HvxYtfohUz2T F8y1haj5WgrdHff/xz75HBD0Gz4Rz5dFpfxomkxe7T4EcRVQOcmHcXDbne3XNu5mEOxWCqPyJ 67DPowiGIhM+YouBuqVzzAyshJ0Qbc5Bk26swpzbh5zRJ0yIE3JuzqsmXYfn7uDSDjcN8Zdkk vEpgshfJETTvaNlot8vizmD535TVvY2SEGj/mwS+JBoj94bU/UWbcCJNnNkKeJcxc66kKqXbK i2/JN5U/V5+/MA8kSyVT0xnLy0AXmCEVQbB5KHuqkQnKVrF1K3HrcjHPm75ON/LaDGPCTgag6 iOZPs8hOjUDiZnGocrByXHFRHFIJ3qcYAKWxC7oHUzAD+o/TDX1B7lDpjQ6B7tDJqpAwM2q9H cc/MQjFFNon+AfSgOy5t+NVdq0IRlFVNS9y7ofS1so3n+8G5DUwLNFqqgkq8Mi3by2XgvxYJw afbgy8CEY3fO7+rpTKLCVCL0oqubOQ0v+/BWsRZQkDZhf9qmB160/+j/tNuLPgjS88q6konDU 63mHFASNYQnCA2ppD7NkohC+zP6DLMT1NFx605FnOm//2rgJLL9gwBQwx7GkBhXH3pAchbPtj KahFJq2fStFOLQxxCfxoOuz+fMDE/Whp+yeGgJGQDrkgx5rAsKe8NpcMeUA5WfhSTLJ8= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PATCH v4 6/7] target/m68k: add explicit single and double precision operations (part 2) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add fsabs, fdabs, fsneg, fdneg, fsmove and fdmove. The value is converted using the new floatx80_round() function. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 48 ++++++++++++++++++++++++++++++++++++++++++++= +--- target/m68k/helper.h | 8 +++++++- target/m68k/translate.c | 26 ++++++++++++++++++++++---- 3 files changed, 74 insertions(+), 8 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 600ae8a..382fbc1 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -167,6 +167,20 @@ void HELPER(set_fpcr)(CPUM68KState *env, uint32_t val) set_floatx80_rounding_precision(old, &env->fp_status); \ } while (0) =20 +void HELPER(fsround)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(32); + res->d =3D floatx80_round(val->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdround)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(64); + res->d =3D floatx80_round(val->d, &env->fp_status); + PREC_END(); +} + void HELPER(fsqrt)(CPUM68KState *env, FPReg *res, FPReg *val) { res->d =3D floatx80_sqrt(val->d, &env->fp_status); @@ -188,12 +202,40 @@ void HELPER(fdsqrt)(CPUM68KState *env, FPReg *res, FP= Reg *val) =20 void HELPER(fabs)(CPUM68KState *env, FPReg *res, FPReg *val) { - res->d =3D floatx80_abs(val->d); + res->d =3D floatx80_round(floatx80_abs(val->d), &env->fp_status); +} + +void HELPER(fsabs)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(32); + res->d =3D floatx80_round(floatx80_abs(val->d), &env->fp_status); + PREC_END(); +} + +void HELPER(fdabs)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(64); + res->d =3D floatx80_round(floatx80_abs(val->d), &env->fp_status); + PREC_END(); +} + +void HELPER(fneg)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + res->d =3D floatx80_round(floatx80_chs(val->d), &env->fp_status); } =20 -void HELPER(fchs)(CPUM68KState *env, FPReg *res, FPReg *val) +void HELPER(fsneg)(CPUM68KState *env, FPReg *res, FPReg *val) { - res->d =3D floatx80_chs(val->d); + PREC_BEGIN(32); + res->d =3D floatx80_round(floatx80_chs(val->d), &env->fp_status); + PREC_END(); +} + +void HELPER(fdneg)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(64); + res->d =3D floatx80_round(floatx80_chs(val->d), &env->fp_status); + PREC_END(); } =20 void HELPER(fadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) diff --git a/target/m68k/helper.h b/target/m68k/helper.h index f05191b..b396899 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -23,13 +23,19 @@ DEF_HELPER_2(redf32, f32, env, fp) DEF_HELPER_2(redf64, f64, env, fp) DEF_HELPER_2(reds32, s32, env, fp) =20 +DEF_HELPER_3(fsround, void, env, fp, fp) +DEF_HELPER_3(fdround, void, env, fp, fp) DEF_HELPER_3(firound, void, env, fp, fp) DEF_HELPER_3(fitrunc, void, env, fp, fp) DEF_HELPER_3(fsqrt, void, env, fp, fp) DEF_HELPER_3(fssqrt, void, env, fp, fp) DEF_HELPER_3(fdsqrt, void, env, fp, fp) DEF_HELPER_3(fabs, void, env, fp, fp) -DEF_HELPER_3(fchs, void, env, fp, fp) +DEF_HELPER_3(fsabs, void, env, fp, fp) +DEF_HELPER_3(fdabs, void, env, fp, fp) +DEF_HELPER_3(fneg, void, env, fp, fp) +DEF_HELPER_3(fsneg, void, env, fp, fp) +DEF_HELPER_3(fdneg, void, env, fp, fp) DEF_HELPER_4(fadd, void, env, fp, fp, fp) DEF_HELPER_4(fsadd, void, env, fp, fp, fp) DEF_HELPER_4(fdadd, void, env, fp, fp, fp) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 72c45de..89ac2c7 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4595,9 +4595,15 @@ DISAS_INSN(fpu) } cpu_dest =3D gen_fp_ptr(REG(ext, 7)); switch (opmode) { - case 0: case 0x40: case 0x44: /* fmove */ + case 0: /* fmove */ gen_fp_move(cpu_dest, cpu_src); break; + case 0x40: /* fsmove */ + gen_helper_fsround(cpu_env, cpu_dest, cpu_src); + break; + case 0x44: /* fdmove */ + gen_helper_fdround(cpu_env, cpu_dest, cpu_src); + break; case 1: /* fint */ gen_helper_firound(cpu_env, cpu_dest, cpu_src); break; @@ -4613,11 +4619,23 @@ DISAS_INSN(fpu) case 0x45: /* fdsqrt */ gen_helper_fdsqrt(cpu_env, cpu_dest, cpu_src); break; - case 0x18: case 0x58: case 0x5c: /* fabs */ + case 0x18: /* fabs */ gen_helper_fabs(cpu_env, cpu_dest, cpu_src); break; - case 0x1a: case 0x5a: case 0x5e: /* fneg */ - gen_helper_fchs(cpu_env, cpu_dest, cpu_src); + case 0x58: /* fsabs */ + gen_helper_fsabs(cpu_env, cpu_dest, cpu_src); + break; + case 0x5c: /* fdabs */ + gen_helper_fdabs(cpu_env, cpu_dest, cpu_src); + break; + case 0x1a: /* fneg */ + gen_helper_fneg(cpu_env, cpu_dest, cpu_src); + break; + case 0x5a: /* fsneg */ + gen_helper_fsneg(cpu_env, cpu_dest, cpu_src); + break; + case 0x5e: /* fdneg */ + gen_helper_fdneg(cpu_env, cpu_dest, cpu_src); break; case 0x20: /* fdiv */ gen_helper_fdiv(cpu_env, cpu_dest, cpu_src, cpu_dest); --=20 2.9.4 From nobody Wed May 1 00:57:46 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498682998475758.8181924375892; Wed, 28 Jun 2017 13:49:58 -0700 (PDT) Received: from localhost ([::1]:35601 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJuO-0003Lg-PQ for importer@patchew.org; Wed, 28 Jun 2017 16:49:56 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39798) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQJo4-0005YG-OY for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQJo2-0003XO-5j for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:24 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:52377) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dQJo1-0003WV-Ps for qemu-devel@nongnu.org; Wed, 28 Jun 2017 16:43:22 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0LwZRP-1doTKf1sPX-018NLa; Wed, 28 Jun 2017 22:42:50 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Wed, 28 Jun 2017 22:42:41 +0200 Message-Id: <20170628204241.32106-8-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170628204241.32106-1-laurent@vivier.eu> References: <20170628204241.32106-1-laurent@vivier.eu> X-Provags-ID: V03:K0:sTho6ovVvCDj/3POfNHa7bK9MWl4Te2vQyExvljge1YvvFV/6Xy VDmw4n0RtsxBNgrXE+iBxiL8l1nHfzcy2vViRa4STAieUEe1J81t3e8OBEYYoZDUYeOZmsS R7ePDSiG7ut2TLBbGpjFOlLpbb3tsDi7feSw85wvCXHWP0tyfCxIk/469LdSwFfDR8N0BGq g9C2N8ESBla0kHnxTZFCw== X-UI-Out-Filterresults: notjunk:1;V01:K0:rDNRcHuKceQ=:HM+dvHjo9Ds2ccPo9BYyjJ dLY7wmfnzvRhdsjjGbf3sASjOZ9XyrvTDVLXZazMNhx998z8ACxp1xJCFiuQhkknRi4+ziwAX Yi2qeumoxM9mpR8xPciPaj29KAriPU0/kL4ftlANPeGnpi0awMuAjB5Nw/lFULzwaLgR+79VM Okm48KzGBlMcCOxWiDUPYGPq8T5GTzLMYGiTEJURAK2XoaTCLVCetso0Fl4T32iHJTetoyc5U UbTpjThRaT9SskqVpRHlfJlUOxi96taNI9mFZ0o4374HPgbRNjT9xniiLdLvcTL1fEThagNpH mN8jYN+aWPqBE1ZYZihaZtqMKOK9HLN2uIDL+G//ISc1r0A1sHS+yS+0/kvGRDiC1MKghiMWO +LzkJ4kSxBpGoc8dPHduGFsPMc0tNhf5bCibS42B/3j63ASXT+x836am0euP5kGc4IEeiE7Fz 9yV65ye7abOaCuVnyJccaPeY0c+m6cCXs9iCpevi/Z0Fw3Hp663/LG5Z9CLNN8TLteGxgJyi1 gflGLanYNFFDh19NXgpB6AuMiHtg2iG9w5yKSQYY7kF7XYmFXL5hvrx8tN3xFl4eWcsYnStGM /vQVYuFzv3N8bXpHNt6PmebSVU6hE8ZQsepskL2B/BI4rFzSt13MKKs5V++bhTXSI0Y1a6nx2 2TXvZ3+LWGDwchXZwtyH6dE2UFlGxCJRiB1H050rglOQQZbSfkDnf3rEc/tfEZCdTAuI= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PATCH v4 7/7] target/m68k: add fmovem X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 120 +++++++++++++++++++++++++++++++++++++++++++= ++++ target/m68k/helper.h | 6 +++ target/m68k/translate.c | 93 ++++++++++++++++++++++++------------ 3 files changed, 189 insertions(+), 30 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 382fbc1..bdfc537 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" =20 /* Undefined offsets may be different on various FPU. * On 68040 they return 0.0 (floatx80_zero) @@ -388,3 +389,122 @@ void HELPER(fconst)(CPUM68KState *env, FPReg *val, ui= nt32_t offset) { val->d =3D fpu_rom[offset]; } + +typedef int (*float_access)(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra); + +static uint32_t fmovem_predec(CPUM68KState *env, uint32_t addr, uint32_t m= ask, + float_access access) +{ + uintptr_t ra =3D GETPC(); + int i, size; + + for (i =3D 7; i >=3D 0; i--, mask <<=3D 1) { + if (mask & 0x80) { + size =3D access(env, addr, &env->fregs[i], ra); + if ((mask & 0xff) !=3D 0x80) { + addr -=3D size; + } + } + } + + return addr; +} + +static uint32_t fmovem_postinc(CPUM68KState *env, uint32_t addr, uint32_t = mask, + float_access access) +{ + uintptr_t ra =3D GETPC(); + int i, size; + + for (i =3D 0; i < 8; i++, mask <<=3D 1) { + if (mask & 0x80) { + size =3D access(env, addr, &env->fregs[i], ra); + addr +=3D size; + } + } + + return addr; +} + +static int cpu_ld_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + uint32_t high; + uint64_t low; + + high =3D cpu_ldl_data_ra(env, addr, ra); + low =3D cpu_ldq_data_ra(env, addr + 4, ra); + + fp->l.upper =3D high >> 16; + fp->l.lower =3D low; + + return 12; +} + +static int cpu_st_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + cpu_stl_data_ra(env, addr, fp->l.upper << 16, ra); + cpu_stq_data_ra(env, addr + 4, fp->l.lower, ra); + + return 12; +} + +static int cpu_ld_float64_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + uint64_t val; + + val =3D cpu_ldq_data_ra(env, addr, ra); + fp->d =3D float64_to_floatx80(*(float64 *)&val, &env->fp_status); + + return 8; +} + +static int cpu_st_float64_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + float64 val; + + val =3D floatx80_to_float64(fp->d, &env->fp_status); + cpu_stq_data_ra(env, addr, *(uint64_t *)&val, ra); + + return 8; +} + +uint32_t HELPER(fmovemx_st_predec)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_predec(env, addr, mask, cpu_st_floatx80_ra); +} + +uint32_t HELPER(fmovemx_st_postinc)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_postinc(env, addr, mask, cpu_st_floatx80_ra); +} + +uint32_t HELPER(fmovemx_ld_postinc)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_postinc(env, addr, mask, cpu_ld_floatx80_ra); +} + +uint32_t HELPER(fmovemd_st_predec)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_predec(env, addr, mask, cpu_st_float64_ra); +} + +uint32_t HELPER(fmovemd_st_postinc)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_postinc(env, addr, mask, cpu_st_float64_ra); +} + +uint32_t HELPER(fmovemd_ld_postinc)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_postinc(env, addr, mask, cpu_ld_float64_ra); +} diff --git a/target/m68k/helper.h b/target/m68k/helper.h index b396899..475a1f2 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -54,6 +54,12 @@ DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp,= fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) DEF_HELPER_3(fconst, void, env, fp, i32) +DEF_HELPER_3(fmovemx_st_predec, i32, env, i32, i32) +DEF_HELPER_3(fmovemx_st_postinc, i32, env, i32, i32) +DEF_HELPER_3(fmovemx_ld_postinc, i32, env, i32, i32) +DEF_HELPER_3(fmovemd_st_predec, i32, env, i32, i32) +DEF_HELPER_3(fmovemd_st_postinc, i32, env, i32, i32) +DEF_HELPER_3(fmovemd_ld_postinc, i32, env, i32, i32) =20 DEF_HELPER_3(mac_move, void, env, i32, i32) DEF_HELPER_3(macmulf, i64, env, i32, i32) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 89ac2c7..3a519b7 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4505,13 +4505,72 @@ static void gen_op_fmove_fcr(CPUM68KState *env, Dis= asContext *s, tcg_temp_free_i32(addr); } =20 +static void gen_op_fmovem(CPUM68KState *env, DisasContext *s, + uint32_t insn, uint32_t ext) +{ + int opsize; + TCGv addr, tmp; + int mode =3D (ext >> 11) & 0x3; + int is_load =3D ((ext & 0x2000) =3D=3D 0); + + if (m68k_feature(s->env, M68K_FEATURE_FPU)) { + opsize =3D OS_EXTENDED; + } else { + opsize =3D OS_DOUBLE; /* FIXME */ + } + + addr =3D gen_lea(env, s, insn, opsize); + if (IS_NULL_QREG(addr)) { + gen_addr_fault(s); + return; + } + + tmp =3D tcg_temp_new(); + if (mode & 0x1) { + /* Dynamic register list */ + tcg_gen_ext8u_i32(tmp, DREG(ext, 4)); + } else { + /* Static register list */ + tcg_gen_movi_i32(tmp, ext & 0xff); + } + + if (!is_load && (mode & 2) =3D=3D 0) { + /* predecrement addressing mode + * only available to store register to memory + */ + if (opsize =3D=3D OS_EXTENDED) { + gen_helper_fmovemx_st_predec(tmp, cpu_env, addr, tmp); + } else { + gen_helper_fmovemd_st_predec(tmp, cpu_env, addr, tmp); + } + } else { + /* postincrement addressing mode */ + if (opsize =3D=3D OS_EXTENDED) { + if (is_load) { + gen_helper_fmovemx_ld_postinc(tmp, cpu_env, addr, tmp); + } else { + gen_helper_fmovemx_st_postinc(tmp, cpu_env, addr, tmp); + } + } else { + if (is_load) { + gen_helper_fmovemd_ld_postinc(tmp, cpu_env, addr, tmp); + } else { + gen_helper_fmovemd_st_postinc(tmp, cpu_env, addr, tmp); + } + } + } + if ((insn & 070) =3D=3D 030 || (insn & 070) =3D=3D 040) { + tcg_gen_mov_i32(AREG(insn, 0), tmp); + } + tcg_temp_free(tmp); +} + /* ??? FP exceptions are not implemented. Most exceptions are deferred un= til immediately before the next FP instruction is executed. */ DISAS_INSN(fpu) { uint16_t ext; int opmode; - TCGv tmp32; int opsize; TCGv_ptr cpu_src, cpu_dest; =20 @@ -4548,36 +4607,10 @@ DISAS_INSN(fpu) return; case 6: /* fmovem */ case 7: - { - TCGv addr; - TCGv_ptr fp; - uint16_t mask; - int i; - if ((ext & 0x1f00) !=3D 0x1000 || (ext & 0xff) =3D=3D 0) - goto undef; - tmp32 =3D gen_lea(env, s, insn, OS_LONG); - if (IS_NULL_QREG(tmp32)) { - gen_addr_fault(s); - return; - } - addr =3D tcg_temp_new_i32(); - tcg_gen_mov_i32(addr, tmp32); - mask =3D 0x80; - fp =3D tcg_temp_new_ptr(); - for (i =3D 0; i < 8; i++) { - if (ext & mask) { - tcg_gen_addi_ptr(fp, cpu_env, - offsetof(CPUM68KState, fregs[i])); - gen_ldst_fp(s, OS_DOUBLE, addr, fp, - (ext & (1 << 13)) ? EA_STORE : EA_LOADS); - if (ext & (mask - 1)) - tcg_gen_addi_i32(addr, addr, 8); - } - mask >>=3D 1; - } - tcg_temp_free_i32(addr); - tcg_temp_free_ptr(fp); + if ((ext & 0x1000) =3D=3D 0 && !m68k_feature(s->env, M68K_FEATURE_= FPU)) { + goto undef; } + gen_op_fmovem(env, s, insn, ext); return; } if (ext & (1 << 14)) { --=20 2.9.4