From nobody Thu May 2 21:45:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498591011746242.83631522311805; Tue, 27 Jun 2017 12:16:51 -0700 (PDT) Received: from localhost ([::1]:57773 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvyk-0000oD-9n for importer@patchew.org; Tue, 27 Jun 2017 15:16:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39499) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvv5-0006Ow-NY for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPvv2-0001Oq-FM for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:03 -0400 Received: from mout.kundenserver.de ([217.72.192.73]:51580) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPvv2-0001OS-3K for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:00 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0MG9cl-1dV8Rg1O7j-00FBTT; Tue, 27 Jun 2017 21:12:27 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 27 Jun 2017 21:12:15 +0200 Message-Id: <20170627191221.31650-2-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170627191221.31650-1-laurent@vivier.eu> References: <20170627191221.31650-1-laurent@vivier.eu> X-Provags-ID: V03:K0:Mc1661UV9GLpTAB5IttkrBfe8bq6wrnAFSo0PO5yQPUEQIgULgv dlDgdz5URiRpVURzBwLLBsyqE2SbJkyfylgewnncsRAAeIrO82FlkyrYrlOrryJ22B1ditY xbaQz+k9RPkV62XfNNyX+CuUnBzZrWvwlx82ExNuwA6owDEKTBqFsGe7lWQFrmuO2g4kWyv CcVVs89Zsz3Gp8N2QURPQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:gappWQAeTRU=:4DPfhuureX1TupXFVXVOZ0 UyKDk0WG0n9pUN2ckeBHkoaGcrVB6Dda6Zf2HpHwsYGiS4FgABUiq2/z+s9QZyXw1nttN+eAN Wb13JpoRodA5NdDaM1rBBrEoeofyD7NId0u6SAn7UCV60cGR9HTqp7XD2k1/LWlsNytzwz2Hb C/+gT3OQJTDSVcth7savdmd3DH3rY+ElV47VhndHKnIIgutJoYKIjy+FkQEU2AX1Aev+sXbZi S8tm9cVYYVxNimykEkIX/3qaOH6V5xbhgacVPF7+inmeGLvf0efPBaaZ4V7MH9XyOuU6NSn3s mHvsYRQQDuQZXgQV0kSBTc6mcW8pWKvX+ImX04LfGjoM9dUoGYdPlxbUqIoMQXhZZlLMTzvoI +GgB4phkStoivA5C43yG7wbGj5cgX7JVsFIsoKC4YvU5RfYNyHaJ/eTG9eOvX4GmlMxAoMvsc s4GdJR7z49yeYlfbweAvJHWUmIRmDpFc02smNJ6kV+/RcRgucdJg57E0ld0/psaY+GUvgKfwA TdNkeSCsKlnlCq2ms8Q8flE0RciH7GRlULpvxWQP1k5dtyn/7nguj8EszBKRDiIy4GQP5wdOR 7zwXHO5yuTZluesLS2DjQgwP7iKLWfdbHvROJM6uxDGugXyz65jjVRYnw7V7InkdXMGRxRwag AJUiGX5ja8CsXFcZ8JzyufUEM3/adaKjwFsm/vyT+U6Jk2RfR7YJhebPwXBChaYVxTCg= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.73 Subject: [Qemu-devel] [PATCH v3 1/7] target/m68k: add fscc. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" use DisasCompare with FPU conditions in fscc and fbcc. Signed-off-by: Laurent Vivier --- target/m68k/translate.c | 211 ++++++++++++++++++++++++++++++--------------= ---- 1 file changed, 132 insertions(+), 79 deletions(-) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 7aa0fdc..dff604c 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4633,142 +4633,194 @@ undef: disas_undef_fpu(env, s, insn); } =20 -DISAS_INSN(fbcc) +static void gen_fcc_cond(DisasCompare *c, DisasContext *s, int cond) { - uint32_t offset; - uint32_t addr; - TCGLabel *l1; - TCGv tmp, fpsr; - - addr =3D s->pc; - offset =3D cpu_ldsw_code(env, s->pc); - s->pc +=3D 2; - if (insn & (1 << 6)) { - offset =3D (offset << 16) | read_im16(env, s); - } + TCGv fpsr; =20 + c->g1 =3D 1; + c->v2 =3D tcg_const_i32(0); + c->g2 =3D 0; + /* TODO: Raise BSUN exception. */ fpsr =3D tcg_temp_new(); gen_load_fcr(s, fpsr, M68K_FPSR); - l1 =3D gen_new_label(); - /* TODO: Raise BSUN exception. */ - /* Jump to l1 if condition is true. */ - switch (insn & 0x3f) { + switch (cond) { case 0: /* False */ case 16: /* Signaling False */ + c->v1 =3D c->v2; + c->tcond =3D TCG_COND_NEVER; break; case 1: /* EQual Z */ case 17: /* Signaling EQual Z */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z); + c->tcond =3D TCG_COND_NE; break; case 2: /* Ordered Greater Than !(A || Z || N) */ case 18: /* Greater Than !(A || Z || N) */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->tcond =3D TCG_COND_EQ; break; case 3: /* Ordered Greater than or Equal Z || !(A || N) */ case 19: /* Greater than or Equal Z || !(A || N) */ - assert(FPSR_CC_A =3D=3D (FPSR_CC_N >> 3)); - tmp =3D tcg_temp_new(); - tcg_gen_shli_i32(tmp, fpsr, 3); - tcg_gen_or_i32(tmp, tmp, fpsr); - tcg_gen_xori_i32(tmp, tmp, FPSR_CC_N); - tcg_gen_andi_i32(tmp, tmp, FPSR_CC_N | FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + g_assert(FPSR_CC_A =3D=3D (FPSR_CC_N >> 3)); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_shli_i32(c->v1, fpsr, 3); + tcg_gen_or_i32(c->v1, c->v1, fpsr); + tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N); + tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_N | FPSR_CC_Z); + c->tcond =3D TCG_COND_NE; break; case 4: /* Ordered Less Than !(!N || A || Z); */ case 20: /* Less Than !(!N || A || Z); */ - tmp =3D tcg_temp_new(); - tcg_gen_xori_i32(tmp, fpsr, FPSR_CC_N); - tcg_gen_andi_i32(tmp, tmp, FPSR_CC_N | FPSR_CC_A | FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_xori_i32(c->v1, fpsr, FPSR_CC_N); + tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_N | FPSR_CC_A | FPSR_CC_Z); + c->tcond =3D TCG_COND_EQ; break; case 5: /* Ordered Less than or Equal Z || (N && !A) */ case 21: /* Less than or Equal Z || (N && !A) */ - assert(FPSR_CC_A =3D=3D (FPSR_CC_N >> 3)); - tmp =3D tcg_temp_new(); - tcg_gen_xori_i32(tmp, fpsr, FPSR_CC_A); - tcg_gen_shli_i32(tmp, tmp, 3); - tcg_gen_ori_i32(tmp, tmp, FPSR_CC_Z); - tcg_gen_and_i32(tmp, tmp, fpsr); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + g_assert(FPSR_CC_A =3D=3D (FPSR_CC_N >> 3)); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_xori_i32(c->v1, fpsr, FPSR_CC_A); + tcg_gen_shli_i32(c->v1, c->v1, 3); + tcg_gen_ori_i32(c->v1, c->v1, FPSR_CC_Z); + tcg_gen_and_i32(c->v1, c->v1, fpsr); + c->tcond =3D TCG_COND_NE; break; case 6: /* Ordered Greater or Less than !(A || Z) */ case 22: /* Greater or Less than !(A || Z) */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z); + c->tcond =3D TCG_COND_EQ; break; case 7: /* Ordered !A */ case 23: /* Greater, Less or Equal !A */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A); + c->tcond =3D TCG_COND_EQ; break; case 8: /* Unordered A */ case 24: /* Not Greater, Less or Equal A */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A); + c->tcond =3D TCG_COND_NE; break; case 9: /* Unordered or Equal A || Z */ case 25: /* Not Greater or Less then A || Z */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z); + c->tcond =3D TCG_COND_NE; break; case 10: /* Unordered or Greater Than A || !(N || Z)) */ case 26: /* Not Less or Equal A || !(N || Z)) */ - assert(FPSR_CC_Z =3D=3D (FPSR_CC_N >> 1)); - tmp =3D tcg_temp_new(); - tcg_gen_shli_i32(tmp, fpsr, 1); - tcg_gen_or_i32(tmp, tmp, fpsr); - tcg_gen_xori_i32(tmp, tmp, FPSR_CC_N); - tcg_gen_andi_i32(tmp, tmp, FPSR_CC_N | FPSR_CC_A); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + g_assert(FPSR_CC_Z =3D=3D (FPSR_CC_N >> 1)); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_shli_i32(c->v1, fpsr, 1); + tcg_gen_or_i32(c->v1, c->v1, fpsr); + tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N); + tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_N | FPSR_CC_A); + c->tcond =3D TCG_COND_NE; break; case 11: /* Unordered or Greater or Equal A || Z || !N */ case 27: /* Not Less Than A || Z || !N */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); - tcg_gen_xori_i32(tmp, tmp, FPSR_CC_N); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); + tcg_gen_xori_i32(c->v1, c->v1, FPSR_CC_N); + c->tcond =3D TCG_COND_NE; break; case 12: /* Unordered or Less Than A || (N && !Z) */ case 28: /* Not Greater than or Equal A || (N && !Z) */ - assert(FPSR_CC_Z =3D=3D (FPSR_CC_N >> 1)); - tmp =3D tcg_temp_new(); - tcg_gen_xori_i32(tmp, fpsr, FPSR_CC_Z); - tcg_gen_shli_i32(tmp, tmp, 1); - tcg_gen_ori_i32(tmp, tmp, FPSR_CC_A); - tcg_gen_and_i32(tmp, tmp, fpsr); - tcg_gen_andi_i32(tmp, tmp, FPSR_CC_A | FPSR_CC_N); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z); + tcg_gen_shli_i32(c->v1, c->v1, ctz32(FPSR_CC_N) - ctz32(FPSR_CC_Z)= ); + tcg_gen_andc_i32(c->v1, fpsr, c->v1); + tcg_gen_andi_i32(c->v1, c->v1, FPSR_CC_A | FPSR_CC_N); + c->tcond =3D TCG_COND_NE; break; case 13: /* Unordered or Less or Equal A || Z || N */ case 29: /* Not Greater Than A || Z || N */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); - tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_A | FPSR_CC_Z | FPSR_CC_N); + c->tcond =3D TCG_COND_NE; break; case 14: /* Not Equal !Z */ case 30: /* Signaling Not Equal !Z */ - tmp =3D tcg_temp_new(); - tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_Z); - tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, l1); + c->v1 =3D tcg_temp_new(); + c->g1 =3D 0; + tcg_gen_andi_i32(c->v1, fpsr, FPSR_CC_Z); + c->tcond =3D TCG_COND_EQ; break; case 15: /* True */ case 31: /* Signaling True */ - tcg_gen_br(l1); + c->v1 =3D c->v2; + c->tcond =3D TCG_COND_ALWAYS; break; } tcg_temp_free(fpsr); +} + +static void gen_fjmpcc(DisasContext *s, int cond, TCGLabel *l1) +{ + DisasCompare c; + + gen_fcc_cond(&c, s, cond); + tcg_gen_brcond_i32(c.tcond, c.v1, c.v2, l1); + free_cond(&c); +} + +DISAS_INSN(fbcc) +{ + uint32_t offset; + uint32_t base; + TCGLabel *l1; + + base =3D s->pc; + offset =3D (int16_t)read_im16(env, s); + if (insn & (1 << 6)) { + offset =3D (offset << 16) | read_im16(env, s); + } + + l1 =3D gen_new_label(); + update_cc_op(s); + gen_fjmpcc(s, insn & 0x3f, l1); gen_jmp_tb(s, 0, s->pc); gen_set_label(l1); - gen_jmp_tb(s, 1, addr + offset); + gen_jmp_tb(s, 1, base + offset); +} + +DISAS_INSN(fscc) +{ + DisasCompare c; + int cond; + TCGv tmp; + uint16_t ext; + + ext =3D read_im16(env, s); + cond =3D ext & 0x3f; + gen_fcc_cond(&c, s, cond); + + tmp =3D tcg_temp_new(); + tcg_gen_setcond_i32(c.tcond, tmp, c.v1, c.v2); + free_cond(&c); + + tcg_gen_neg_i32(tmp, tmp); + DEST_EA(env, insn, OS_BYTE, tmp, NULL); + tcg_temp_free(tmp); } =20 DISAS_INSN(frestore) @@ -5349,6 +5401,7 @@ void register_m68k_insns (CPUM68KState *env) INSN(frestore, f340, ffc0, CF_FPU); INSN(fsave, f300, ffc0, CF_FPU); INSN(fpu, f200, ffc0, FPU); + INSN(fscc, f240, ffc0, FPU); INSN(fbcc, f280, ff80, FPU); INSN(frestore, f340, ffc0, FPU); INSN(fsave, f300, ffc0, FPU); --=20 2.9.4 From nobody Thu May 2 21:45:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498590889484555.1601592306674; Tue, 27 Jun 2017 12:14:49 -0700 (PDT) Received: from localhost ([::1]:57763 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvwl-0007rH-LH for importer@patchew.org; Tue, 27 Jun 2017 15:14:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39505) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvv6-0006Ox-6u for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPvv3-0001PH-0V for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:04 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:53882) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPvv2-0001Oc-Ku for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:00 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0Lzadu-1dlIJq0d9e-014ogk; Tue, 27 Jun 2017 21:12:28 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 27 Jun 2017 21:12:16 +0200 Message-Id: <20170627191221.31650-3-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170627191221.31650-1-laurent@vivier.eu> References: <20170627191221.31650-1-laurent@vivier.eu> X-Provags-ID: V03:K0:Tnvshibwi6yjsa+19NfqV/G92vuNbaIdVuUU0bb8ONVUU8+PIMF 1nVeMkGQOyuM7adH7RNV+pINopZwobucgRzR5PVaMf0cgxafOFZhRRn2++q/Faxj0sO71KL x6RDX4TLak60cuCXA6r5Awky1+tySDDD9x4If4gTLldbwwK7NSA5JvqTYilzU88qS1j+P6B EGpqikiOaTKgtgaAeByXQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:2hpxrjqbWrw=:2JaAuB5Q/UbxXgtaZ8jeuE 57r3+Pt7k78JsYKXC+RmBLm1BNinYOCp7ppfTkxdO+7FlOCxrp9yul0ThKioLYDDRgFKeex5Z PsVO/8YGquj9gBsJnCZNcDtbRuegVYiwgqzSo0HnBDV7pxFjeb7S/tJ+Ybb8snSJAVz03Kyh2 K18+mSIIqzT0++MYAThAnREXkm7pfAOIvawhTMFjuWLeysX58ZswmNo4++DZkf9U0l0BPi1bo J7f9GhAKFcpeJsodYw8Cm2aPBa5t+l5ualjq41i08zTLwAObYn1kRD+4zc7RPWyWUqyNua/yK JQ03UufnXjlfriqLvlY41T6FVZB32H1bM9599RSwEhvA+oPhvS+uT4B8WHIY0ADwwOR3WZ02u NBvYSRZx7/r58h+Jj1KHbVd0+oCnP1WNGky4A8pMgGpr53FHJ5O/fQ4oaQllh/8Obe5Ag8fqC NpjiSBU4ku9gE+Yo31a3dBY1Z6tH3Ajf4e2IhMM6/Gac9/2TSjM5+7itCSfA9SnK7GQaUKUKH SWhIba98F6W5l2pIw9BWcMC3451jMPQ9LE3kHzm+4wtBmVIQ/CQ6oxPC1x3ASBYF13V3Xip3Z tPaMagAx2EsUrz/mteBTlwZBZ+1yiN19RhC25lJFbHnxXoLJq7Kgb+M6QubKvt944qyh2NNhs QXbgE1SBI6SJfcIhFos+CaaFdLZ8fSLem8gUQXEpbomT4FtpH1iozN68lo6x1TC9rvpQ= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.13 Subject: [Qemu-devel] [PATCH v3 2/7] target/m68k: add fmovecr X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" fmovecr moves a floating point constant from the FPU ROM to a floating point register. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/m68k/fpu_helper.c | 30 ++++++++++++++++++++++++++++++ target/m68k/helper.h | 1 + target/m68k/translate.c | 13 ++++++++++++- 3 files changed, 43 insertions(+), 1 deletion(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index a9e17f5..912c0b7 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -23,6 +23,31 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" =20 +static const floatx80 fpu_rom[128] =3D { + [0x00] =3D floatx80_pi, /* Pi */ + [0x0b] =3D make_floatx80(0x3ffd, 0x9a209a84fbcff798ULL), /* Log10(2) = */ + [0x0c] =3D make_floatx80(0x4000, 0xadf85458a2bb4a9aULL), /* e = */ + [0x0d] =3D make_floatx80(0x3fff, 0xb8aa3b295c17f0bcULL), /* Log2(e) = */ + [0x0e] =3D make_floatx80(0x3ffd, 0xde5bd8a937287195ULL), /* Log10(e) = */ + [0x0f] =3D floatx80_zero, /* Zero = */ + [0x30] =3D floatx80_ln2, /* ln(2) = */ + [0x31] =3D make_floatx80(0x4000, 0x935d8dddaaa8ac17ULL), /* ln(10) = */ + [0x32] =3D floatx80_one, /* 10^0 = */ + [0x33] =3D make_floatx80(0x4002, 0xa000000000000000ULL), /* 10^1 = */ + [0x34] =3D make_floatx80(0x4005, 0xc800000000000000ULL), /* 10^2 = */ + [0x35] =3D make_floatx80(0x400c, 0x9c40000000000000ULL), /* 10^4 = */ + [0x36] =3D make_floatx80(0x4019, 0xbebc200000000000ULL), /* 10^8 = */ + [0x37] =3D make_floatx80(0x4034, 0x8e1bc9bf04000000ULL), /* 10^16 = */ + [0x38] =3D make_floatx80(0x4069, 0x9dc5ada82b70b59eULL), /* 10^32 = */ + [0x39] =3D make_floatx80(0x40d3, 0xc2781f49ffcfa6d5ULL), /* 10^64 = */ + [0x3a] =3D make_floatx80(0x41a8, 0x93ba47c980e98ce0ULL), /* 10^128 = */ + [0x3b] =3D make_floatx80(0x4351, 0xaa7eebfb9df9de8eULL), /* 10^256 = */ + [0x3c] =3D make_floatx80(0x46a3, 0xe319a0aea60e91c7ULL), /* 10^512 = */ + [0x3d] =3D make_floatx80(0x4d48, 0xc976758681750c17ULL), /* 10^1024 = */ + [0x3e] =3D make_floatx80(0x5a92, 0x9e8b3b5dc53d5de5ULL), /* 10^2048 = */ + [0x3f] =3D make_floatx80(0x7525, 0xc46052028a20979bULL), /* 10^4096 = */ +}; + int32_t HELPER(reds32)(CPUM68KState *env, FPReg *val) { return floatx80_to_int32(val->d, &env->fp_status); @@ -204,3 +229,8 @@ void HELPER(ftst)(CPUM68KState *env, FPReg *val) } env->fpsr =3D (env->fpsr & ~FPSR_CC_MASK) | cc; } + +void HELPER(fconst)(CPUM68KState *env, FPReg *val, uint32_t offset) +{ + val->d =3D fpu_rom[offset]; +} diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 98cbf18..d6e80e4 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -35,6 +35,7 @@ DEF_HELPER_4(fdiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) +DEF_HELPER_3(fconst, void, env, fp, i32) =20 DEF_HELPER_3(mac_move, void, env, i32, i32) DEF_HELPER_3(macmulf, i64, env, i32, i32) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index dff604c..0bb3300 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4518,10 +4518,21 @@ DISAS_INSN(fpu) ext =3D read_im16(env, s); opmode =3D ext & 0x7f; switch ((ext >> 13) & 7) { - case 0: case 2: + case 0: break; case 1: goto undef; + case 2: + if (insn =3D=3D 0xf200 && (ext & 0xfc00) =3D=3D 0x5c00) { + /* fmovecr */ + TCGv rom_offset =3D tcg_const_i32(opmode); + cpu_dest =3D gen_fp_ptr(REG(ext, 7)); + gen_helper_fconst(cpu_env, cpu_dest, rom_offset); + tcg_temp_free_ptr(cpu_dest); + tcg_temp_free(rom_offset); + return; + } + break; case 3: /* fmove out */ cpu_src =3D gen_fp_ptr(REG(ext, 7)); opsize =3D ext_opsize(ext, 10); --=20 2.9.4 From nobody Thu May 2 21:45:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498591136011448.6366939066828; Tue, 27 Jun 2017 12:18:56 -0700 (PDT) Received: from localhost ([::1]:57784 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPw0k-0002hO-O5 for importer@patchew.org; Tue, 27 Jun 2017 15:18:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39498) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvv5-0006Ov-Na for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPvv4-0001QX-30 for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:03 -0400 Received: from mout.kundenserver.de ([217.72.192.73]:63850) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPvv3-0001Oz-OK for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:02 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0M7Jry-1ddcny3eDe-00x4vm; Tue, 27 Jun 2017 21:12:29 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 27 Jun 2017 21:12:17 +0200 Message-Id: <20170627191221.31650-4-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170627191221.31650-1-laurent@vivier.eu> References: <20170627191221.31650-1-laurent@vivier.eu> X-Provags-ID: V03:K0:9AAfolztoAsG9Oe1L6X3Tn/zUvn+/Us2EizWO0kVgTByMJgYlsy Bdyj3wuIuP+bML52amH2Ot5pBUuMam8vamqg1qIWDedQgERX3WARg3Wx6r5DcqJ/u7YvMr1 d9HVx7h5eL9jrCHND+kwYLm1xci3pEzxfrXjCMOHQj/WEyN37zfdn2U513RcXLnh2ln8Xo6 FK3FQ1s6Eudll08z9+Gwg== X-UI-Out-Filterresults: notjunk:1;V01:K0:+zpEnaolTcA=:r9hjDyRuxadUcYoYV/h20X uUH8dTEctnEfnpNaI6i0XQYRXCBVaPprBG6rmRF1Pf17x1l2ciRx2RaPKn58Xzq9i8Hkh8Dkt 294wriAXZuIVs/i2xrGEEAOgFzRJm6vk8uq0+/+7JU0xtyDruyBlOwH7MNuyrtPGQBs7bIgVY LKR+r/xKmAApH26Id2aDvwS8h9Tx7XiC/28TTERxetBpKun4Cc2Rj1Xk3/yH8vMaaNjYypU8q OgDxbQfDebQfTeDkpjqiBT5VcsMlv4Q+vf4K5Hh9YOwg7rC1ydRlY/noXrPIiCbzSRaEl43kM 3tVzCs37GFB6crgPYtTy1/6eTNnwl0vv/isLhDExfT6fcLVxfKISBWw4zS0bR0mC7jIeEEgwC oNnmqBPw7l+jRIXHabDuEWcWBoANBf9V0A3Ku4ZpdImpEbpXsmn5isKo+gQ9tt/NvNYqqt/Ai CE9K8pfRTJ+4Z9mjiSF9I8iN2teRVZ5MvWq15xLCboAryAcJ1ddTbVGZ+336g5UoUIuM7Tu7v gm63EoxkEIGwn+WxBinlshi8wMT3mJmbXq7CwG3oienLtaiyhMj43GcPAkVy/DNxgxWNVIEWZ IeRWoMIyoKdOvu2LCikleMJfXfwstIkjCiD5TLb7459z2O75CcnzUjl4BRGlkhk1Ig/PxQGjW DFeyZ7YS2W5MDT86kh2iIKl9K7pao5dP1pFGQg31B9xMXtwMxLxCKzGSFixxEdFp+W4s= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.73 Subject: [Qemu-devel] [PATCH v3 3/7] target/m68k: add explicit single and double precision operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add fssqrt, fdsqrt, fsadd, fdadd, fssub, fdsub, fsmul, fdmul, fsdiv, fddiv. The precision is managed using set_floatx80_rounding_precision(). Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 80 ++++++++++++++++++++++++++++++++++++++++++++= ++++ target/m68k/helper.h | 10 ++++++ target/m68k/translate.c | 40 +++++++++++++++++++++--- 3 files changed, 125 insertions(+), 5 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 912c0b7..f6b6788 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -153,11 +153,35 @@ void HELPER(set_fpcr)(CPUM68KState *env, uint32_t val) cpu_m68k_set_fpcr(env, val); } =20 +#define PREC_BEGIN(prec) \ + do { \ + int old; \ + old =3D get_floatx80_rounding_precision(&env->fp_status); \ + set_floatx80_rounding_precision(prec, &env->fp_status) \ + +#define PREC_END() \ + set_floatx80_rounding_precision(old, &env->fp_status); \ + } while (0) + void HELPER(fsqrt)(CPUM68KState *env, FPReg *res, FPReg *val) { res->d =3D floatx80_sqrt(val->d, &env->fp_status); } =20 +void HELPER(fssqrt)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(32); + res->d =3D floatx80_sqrt(val->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdsqrt)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(64); + res->d =3D floatx80_sqrt(val->d, &env->fp_status); + PREC_END(); +} + void HELPER(fabs)(CPUM68KState *env, FPReg *res, FPReg *val) { res->d =3D floatx80_abs(val->d); @@ -173,21 +197,77 @@ void HELPER(fadd)(CPUM68KState *env, FPReg *res, FPRe= g *val0, FPReg *val1) res->d =3D floatx80_add(val0->d, val1->d, &env->fp_status); } =20 +void HELPER(fsadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d =3D floatx80_add(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d =3D floatx80_add(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + void HELPER(fsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d =3D floatx80_sub(val1->d, val0->d, &env->fp_status); } =20 +void HELPER(fssub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d =3D floatx80_sub(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdsub)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d =3D floatx80_sub(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + void HELPER(fmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d =3D floatx80_mul(val0->d, val1->d, &env->fp_status); } =20 +void HELPER(fsmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d =3D floatx80_mul(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d =3D floatx80_mul(val0->d, val1->d, &env->fp_status); + PREC_END(); +} + void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d =3D floatx80_div(val1->d, val0->d, &env->fp_status); } =20 +void HELPER(fsdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(32); + res->d =3D floatx80_div(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) +{ + PREC_BEGIN(64); + res->d =3D floatx80_div(val1->d, val0->d, &env->fp_status); + PREC_END(); +} + static int float_comp_to_cc(int float_compare) { switch (float_compare) { diff --git a/target/m68k/helper.h b/target/m68k/helper.h index d6e80e4..0c7f06f 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -26,12 +26,22 @@ DEF_HELPER_2(reds32, s32, env, fp) DEF_HELPER_3(firound, void, env, fp, fp) DEF_HELPER_3(fitrunc, void, env, fp, fp) DEF_HELPER_3(fsqrt, void, env, fp, fp) +DEF_HELPER_3(fssqrt, void, env, fp, fp) +DEF_HELPER_3(fdsqrt, void, env, fp, fp) DEF_HELPER_3(fabs, void, env, fp, fp) DEF_HELPER_3(fchs, void, env, fp, fp) DEF_HELPER_4(fadd, void, env, fp, fp, fp) +DEF_HELPER_4(fsadd, void, env, fp, fp, fp) +DEF_HELPER_4(fdadd, void, env, fp, fp, fp) DEF_HELPER_4(fsub, void, env, fp, fp, fp) +DEF_HELPER_4(fssub, void, env, fp, fp, fp) +DEF_HELPER_4(fdsub, void, env, fp, fp, fp) DEF_HELPER_4(fmul, void, env, fp, fp, fp) +DEF_HELPER_4(fsmul, void, env, fp, fp, fp) +DEF_HELPER_4(fdmul, void, env, fp, fp, fp) DEF_HELPER_4(fdiv, void, env, fp, fp, fp) +DEF_HELPER_4(fsdiv, void, env, fp, fp, fp) +DEF_HELPER_4(fddiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 0bb3300..84f78f9 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4604,27 +4604,57 @@ DISAS_INSN(fpu) case 3: /* fintrz */ gen_helper_fitrunc(cpu_env, cpu_dest, cpu_src); break; - case 4: case 0x41: case 0x45: /* fsqrt */ + case 4: /* fsqrt */ gen_helper_fsqrt(cpu_env, cpu_dest, cpu_src); break; + case 0x41: /* fssqrt */ + gen_helper_fssqrt(cpu_env, cpu_dest, cpu_src); + break; + case 0x45: /* fdsqrt */ + gen_helper_fdsqrt(cpu_env, cpu_dest, cpu_src); + break; case 0x18: case 0x58: case 0x5c: /* fabs */ gen_helper_fabs(cpu_env, cpu_dest, cpu_src); break; case 0x1a: case 0x5a: case 0x5e: /* fneg */ gen_helper_fchs(cpu_env, cpu_dest, cpu_src); break; - case 0x20: case 0x60: case 0x64: /* fdiv */ + case 0x20: /* fdiv */ gen_helper_fdiv(cpu_env, cpu_dest, cpu_src, cpu_dest); break; - case 0x22: case 0x62: case 0x66: /* fadd */ + case 0x60: /* fsdiv */ + gen_helper_fsdiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x64: /* fddiv */ + gen_helper_fddiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x22: /* fadd */ gen_helper_fadd(cpu_env, cpu_dest, cpu_src, cpu_dest); break; - case 0x23: case 0x63: case 0x67: /* fmul */ + case 0x62: /* fsadd */ + gen_helper_fsadd(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x66: /* fdadd */ + gen_helper_fdadd(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x23: /* fmul */ gen_helper_fmul(cpu_env, cpu_dest, cpu_src, cpu_dest); break; - case 0x28: case 0x68: case 0x6c: /* fsub */ + case 0x63: /* fsmul */ + gen_helper_fsmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x67: /* fdmul */ + gen_helper_fdmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x28: /* fsub */ gen_helper_fsub(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x68: /* fssub */ + gen_helper_fssub(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x6c: /* fdsub */ + gen_helper_fdsub(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x38: /* fcmp */ gen_helper_fcmp(cpu_env, cpu_src, cpu_dest); return; --=20 2.9.4 From nobody Thu May 2 21:45:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149859086609837.65878815545068; Tue, 27 Jun 2017 12:14:26 -0700 (PDT) Received: from localhost ([::1]:57760 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvwN-0007aC-LT for importer@patchew.org; Tue, 27 Jun 2017 15:14:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39472) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvuv-0006KM-01 for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:12:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPvur-0001Mr-QO for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:12:52 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:50871) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPvur-0001LH-Gf for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:12:49 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0LbJZC-1e9OkR2ffe-00kvJy; Tue, 27 Jun 2017 21:12:29 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 27 Jun 2017 21:12:18 +0200 Message-Id: <20170627191221.31650-5-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170627191221.31650-1-laurent@vivier.eu> References: <20170627191221.31650-1-laurent@vivier.eu> X-Provags-ID: V03:K0:kghYLlKh/o4qSbHNXr4sfUx+wtcUGFFwxD1Qf6k8zsLRohIOGAl zCrImexBM5EElAk0YdWxhKoKbyXoulCn03HDEGujogljJYfMs5B6Kh3ilMfgvZbKRmyZNOO nXPi6GCXpHcQQioP8zpD0GV2lmjXtk9yE+En69rn2OIcOzloyZhZMeXD80tk58KQRBX6vZV Ad0kVFq5uJG5Ugu+D6VSw== X-UI-Out-Filterresults: notjunk:1;V01:K0:EfOnvb9gxrE=:TCsrMYFIoeDsvzRiok/pg/ RONZ/TlzrAkxSIEVK3F0c5NGiHna4vEKmFA+pfDjTc+8uerw4y9kiXVjccTeU+DXw1Vw9DAkT SWUVj3+NBiV5wLqcLulGaqHksk/N3jFrhhzprFjpG7tbm3pJCxmmAqikUYhkDl6RpKxdOopD3 SdAtqlo+POp0YNaWdooUaKUm3N86EeyCCOmHirFQpbkM+PLKwq/Ns35IBUmmJ3wpYf2b/cjqo wmtl3R80dsxt/u2R3lRIUOD/fKbBpdnYDRWeoqM84tHfXC8ljA1Mx44jpvR7JB/4xamSSd0VA yfnu09LxYTUHLrSFjCxroGvh8wCt72Hq/nuVwDY5pgf2tAYO3NOyriFkK79+UBioitl7VDKEC Jy+5oeso9OjpNBsmOCUDgF787QSz43mbym7SYqrEAgE0TL0adIUWODbK3g3evm29usXabeHvK BFxpOdql5QddPrEI37KvhmPv22+nqpytM9JCkIlbQTZlXg0x6jU2mrB/aaUyp4kc8It3CXxTC ngm0BBGXG7R76vxR2OG3AGtcAAirEsHl+IG8qxYIejLAXbHyihSMgySbdMUORwmO+RduvcDzF +0valQUMUDwUwUkg3Z/KNY96P7oCb5EgJbme1KNKaZLxd84VREmEe+F3VvOxERcVHH+tfvC8a tJ3z4buVOUSbLPNlZRJk8aygLosiVsKtBWNbVHf2jcbDK8V7eCX/cvNgR0nwKm4obWjU= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.13 Subject: [Qemu-devel] [PATCH v3 4/7] softfloat: define floatx80_round() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add a function to round a floatx80 to the defined precision (floatx80_rounding_precision) Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Reviewed-by: Aurelien Jarno --- fpu/softfloat.c | 15 +++++++++++++++ include/fpu/softfloat.h | 1 + 2 files changed, 16 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 7af14e2..e9bf359 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -5086,6 +5086,21 @@ float128 floatx80_to_float128(floatx80 a, float_stat= us *status) } =20 /*------------------------------------------------------------------------= ---- +| Rounds the extended double-precision floating-point value `a' +| and returns the result as an extended double-precision floating-point +| value. The operation is performed according to the IEC/IEEE Standard for +| Binary Floating-Point Arithmetic. +*-------------------------------------------------------------------------= ---*/ + +floatx80 floatx80_round(floatx80 a, float_status *status) +{ + return roundAndPackFloatx80(status->floatx80_rounding_precision, + extractFloatx80Sign(a), + extractFloatx80Exp(a), + extractFloatx80Frac(a), 0, status); +} + +/*------------------------------------------------------------------------= ---- | Rounds the extended double-precision floating-point value `a' to an inte= ger, | and returns the result as an extended quadruple-precision floating-point | value. The operation is performed according to the IEC/IEEE Standard for diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index f1288ef..d9689ec 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -621,6 +621,7 @@ float128 floatx80_to_float128(floatx80, float_status *s= tatus); /*------------------------------------------------------------------------= ---- | Software IEC/IEEE extended double-precision operations. *-------------------------------------------------------------------------= ---*/ +floatx80 floatx80_round(floatx80 a, float_status *status); floatx80 floatx80_round_to_int(floatx80, float_status *status); floatx80 floatx80_add(floatx80, floatx80, float_status *status); floatx80 floatx80_sub(floatx80, floatx80, float_status *status); --=20 2.9.4 From nobody Thu May 2 21:45:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149859103184868.78465454978266; Tue, 27 Jun 2017 12:17:11 -0700 (PDT) Received: from localhost ([::1]:57774 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvz4-00014b-Eu for importer@patchew.org; Tue, 27 Jun 2017 15:17:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39542) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvv8-0006Pp-P5 for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPvv5-0001SZ-Gi for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:06 -0400 Received: from mout.kundenserver.de ([212.227.17.24]:58156) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPvv5-0001Qh-4d for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:03 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0Ma2zH-1dBPjF1Qat-00LnAd; Tue, 27 Jun 2017 21:12:30 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 27 Jun 2017 21:12:19 +0200 Message-Id: <20170627191221.31650-6-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170627191221.31650-1-laurent@vivier.eu> References: <20170627191221.31650-1-laurent@vivier.eu> X-Provags-ID: V03:K0:xT0eSLcInHwlE3dflQa3PD/i/tOOkOky9rH0BKWS4JJzgQRr4Lc K5v4RSyz7lEKTkH20jD/C04VI7oci5aoPIsFjHTx0DwgHn7GUvMeq0LU9qT49/f2bB7cTgT wQk75Toq5HBG4dPovWYvRI24b27KAX7L979LJQ9Fzh9e3HW9xp2ZtUay6tikoMVaPNEj3ff ooPlQKSswns7pB9j/gmYQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:Rv2+LqCpflY=:O+lfFsZjeUbUorSkFBXeM7 MRBPlYdbRoOo6kv3ivE8L9uvO5rOp+2gfaWrflQItWEKLl2tOJ1frSdOP6ULgtQguhpLq+yZ2 ZZ3rGcbU3UVG9PnUnqUdkl/sblccGTtX8PtsZRHYI0OLCtojch4cHncjXTMqguAG54Ta4Zi+K SCG6vR5fjDcDkZNrRPg3YVRoXIqrbAFT5hNlj9vaANTnRoS5p5B01cONppN5zFXFA5/V0ttnW zp1bwpDSkWuby2Jj2cmlfWPfEt5TZQN+ftsmTAhuBfcgByBwRS/GDjPX2cauV6768+Vf4t1Of UyDIvA3zuDAWEXDbXC3eKuUfnHtknE7fJhadwUNobcuGfujshAvoQOfrm5JigHhH+DCLfEvDx 82UMkRNAV0oHt/4l7rRTDfwqiDZlNqcUXHLUHB483A3cKvjaW7EEfO6tgRI3iMHJ2LW6H9I4B 5e2wXiV0T98++KUvBFwWwmfI9F+2PXbmardzjcQE+7SFomEVvpN59ZGxKsAuKf4ZfQb1XC6rm VGs91uGpdXnSAV1lNIv0wcX0aQ5FfVJ5IerEGpAvw9Fvy/zwu9fiplS2TUPYwyA2eaOqTafUf kb/CXtr7rI9qqTS/EnmLBSQCERTvkTCB18F9slOveWHMuTnKzMvAMHdeXf1KjE+63FIdsO8rr HsWXfLOPdCdN5yuLNxK+8WFV2M0ZwH5lj5QJ3uaTUE29+b/Q5Jupznf0B+l6LLP2NNME= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.24 Subject: [Qemu-devel] [PATCH v3 5/7] target/m68k: add fsglmul and fsgldiv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" fsglmul and fsgldiv truncate data to single precision before computing results. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 28 ++++++++++++++++++++++++++++ target/m68k/helper.h | 2 ++ target/m68k/translate.c | 6 ++++++ 3 files changed, 36 insertions(+) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index f6b6788..0daad4a 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -249,6 +249,20 @@ void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPRe= g *val0, FPReg *val1) PREC_END(); } =20 +void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *va= l1) +{ + int rounding_mode =3D get_float_rounding_mode(&env->fp_status); + floatx80 a, b; + + PREC_BEGIN(32); + set_float_rounding_mode(float_round_to_zero, &env->fp_status); + a =3D floatx80_round(val0->d, &env->fp_status); + b =3D floatx80_round(val1->d, &env->fp_status); + set_float_rounding_mode(rounding_mode, &env->fp_status); + res->d =3D floatx80_mul(a, b, &env->fp_status); + PREC_END(); +} + void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) { res->d =3D floatx80_div(val1->d, val0->d, &env->fp_status); @@ -268,6 +282,20 @@ void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPRe= g *val0, FPReg *val1) PREC_END(); } =20 +void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *va= l1) +{ + int rounding_mode =3D get_float_rounding_mode(&env->fp_status); + floatx80 a, b; + + PREC_BEGIN(32); + set_float_rounding_mode(float_round_to_zero, &env->fp_status); + a =3D floatx80_round(val1->d, &env->fp_status); + b =3D floatx80_round(val0->d, &env->fp_status); + set_float_rounding_mode(rounding_mode, &env->fp_status); + res->d =3D floatx80_div(a, b, &env->fp_status); + PREC_END(); +} + static int float_comp_to_cc(int float_compare) { switch (float_compare) { diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 0c7f06f..f05191b 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -39,9 +39,11 @@ DEF_HELPER_4(fdsub, void, env, fp, fp, fp) DEF_HELPER_4(fmul, void, env, fp, fp, fp) DEF_HELPER_4(fsmul, void, env, fp, fp, fp) DEF_HELPER_4(fdmul, void, env, fp, fp, fp) +DEF_HELPER_4(fsglmul, void, env, fp, fp, fp) DEF_HELPER_4(fdiv, void, env, fp, fp, fp) DEF_HELPER_4(fsdiv, void, env, fp, fp, fp) DEF_HELPER_4(fddiv, void, env, fp, fp, fp) +DEF_HELPER_4(fsgldiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 84f78f9..4775770 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4646,6 +4646,12 @@ DISAS_INSN(fpu) case 0x67: /* fdmul */ gen_helper_fdmul(cpu_env, cpu_dest, cpu_src, cpu_dest); break; + case 0x24: /* fsgldiv */ + gen_helper_fsgldiv(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; + case 0x27: /* fsglmul */ + gen_helper_fsglmul(cpu_env, cpu_dest, cpu_src, cpu_dest); + break; case 0x28: /* fsub */ gen_helper_fsub(cpu_env, cpu_dest, cpu_src, cpu_dest); break; --=20 2.9.4 From nobody Thu May 2 21:45:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498590894901721.7177118776196; Tue, 27 Jun 2017 12:14:54 -0700 (PDT) Received: from localhost ([::1]:57764 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvwr-0007tL-Iu for importer@patchew.org; Tue, 27 Jun 2017 15:14:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39552) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvv9-0006QV-I0 for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPvv6-0001Tz-C9 for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:07 -0400 Received: from mout.kundenserver.de ([217.72.192.74]:53125) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPvv5-0001Rj-VB for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:04 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0M0ACi-1dkkc70ANI-00uIyS; Tue, 27 Jun 2017 21:12:31 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 27 Jun 2017 21:12:20 +0200 Message-Id: <20170627191221.31650-7-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170627191221.31650-1-laurent@vivier.eu> References: <20170627191221.31650-1-laurent@vivier.eu> X-Provags-ID: V03:K0:SXO9IsMS4prHTz7NtIlSBgKZ63ygO78pln8M2pOzTn+kfhYhBMd a6Jk4Kd8jMUaRks5Zj3vS+XBnvEJAVcbTmg64SvoozX4IdVIO30vLW/3ZznyOv2AmtdyVZT ZeqZyKonOdvbRo6btZ9QdME9IV9q9h1dSwCAj2WWWtaOVulcB9hM1EoYMz+TjuND2MxYyr0 k3cgsHY9UuQ2x8Uf9FjSg== X-UI-Out-Filterresults: notjunk:1;V01:K0:03PsTyS6lrY=:bFm9RuvvcCiEKRET3advpz qehiLvep/euNRhApwE0sQVCAu8a3V39ZzfULhUE8UBsCZZfu+h35kxMbs5+QiBQ0mfDI/6ASS 9OPXYbkvVzT66pCpavTmFeX4Iso1cjRkVr4mQeEtrGVBVypluahEVoodtKepNrQnFlFSzYCE7 H9OXVQ38Tt/Q8xTZZ0xCLd3gykOym82OVqGdAL9j/i5BKWPxQPNXeqNdjohnkhiekU7e3V3R2 3SeRRLMnP3K+lauIRfBrRqqV/bJYqwxOo72TuD4J1fYyqlISJxs10MKL+q++yX23PYMm2iNub e4zYMtWr6hunif/s/Icty5Sf3AhEDRtyVfgwzKw3UEhNcpDnyPphRQHAmmUT9fiOWf0brcnqb wZ4TQL5CKL0bCCzLGpKzE7E403kF+sjq67SaPozi0kOJ4jsOF01BtDhQDDz3H8ykJm+Pv2lx9 1+XqP4Mww/b1+Im+r4dl3364/d54zIjp0VqxuMqaXjCCGmQaPLJ5tUJEMHGCImzrOw8SLLus9 P+sa6oiyv8k+lDZfg1uBJmSMFHRifsN6DeQH3ZfPtAmO8p2i+9r+aeZOiSQwyeOYXNkpnaUEO Z88CTwznD1fUHgmcLe1nn+24QRMF/Qcv5F4JpFcoctJ2m9OZLHzYQ90CmCXvJbwc8jWP4NoHK SVjBRjGAHpZ+S+RuPwqvVzbVsKzNAt9AvoaAQ6sqSlb2BlVw+QyfXnkS3AxpiBaGeBZo= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 217.72.192.74 Subject: [Qemu-devel] [PATCH v3 6/7] target/m68k: add explicit single and double precision operations (part 2) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add fsabs, fdabs, fsneg, fdneg, fsmove and fdmove. The value is converted using the new floatx80_round() function. Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 48 ++++++++++++++++++++++++++++++++++++++++++++= +--- target/m68k/helper.h | 8 +++++++- target/m68k/translate.c | 26 ++++++++++++++++++++++---- 3 files changed, 74 insertions(+), 8 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 0daad4a..41ab5ce 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -163,6 +163,20 @@ void HELPER(set_fpcr)(CPUM68KState *env, uint32_t val) set_floatx80_rounding_precision(old, &env->fp_status); \ } while (0) =20 +void HELPER(fsround)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(32); + res->d =3D floatx80_round(val->d, &env->fp_status); + PREC_END(); +} + +void HELPER(fdround)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(64); + res->d =3D floatx80_round(val->d, &env->fp_status); + PREC_END(); +} + void HELPER(fsqrt)(CPUM68KState *env, FPReg *res, FPReg *val) { res->d =3D floatx80_sqrt(val->d, &env->fp_status); @@ -184,12 +198,40 @@ void HELPER(fdsqrt)(CPUM68KState *env, FPReg *res, FP= Reg *val) =20 void HELPER(fabs)(CPUM68KState *env, FPReg *res, FPReg *val) { - res->d =3D floatx80_abs(val->d); + res->d =3D floatx80_round(floatx80_abs(val->d), &env->fp_status); +} + +void HELPER(fsabs)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(32); + res->d =3D floatx80_round(floatx80_abs(val->d), &env->fp_status); + PREC_END(); +} + +void HELPER(fdabs)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(64); + res->d =3D floatx80_round(floatx80_abs(val->d), &env->fp_status); + PREC_END(); +} + +void HELPER(fneg)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + res->d =3D floatx80_round(floatx80_chs(val->d), &env->fp_status); } =20 -void HELPER(fchs)(CPUM68KState *env, FPReg *res, FPReg *val) +void HELPER(fsneg)(CPUM68KState *env, FPReg *res, FPReg *val) { - res->d =3D floatx80_chs(val->d); + PREC_BEGIN(32); + res->d =3D floatx80_round(floatx80_chs(val->d), &env->fp_status); + PREC_END(); +} + +void HELPER(fdneg)(CPUM68KState *env, FPReg *res, FPReg *val) +{ + PREC_BEGIN(64); + res->d =3D floatx80_round(floatx80_chs(val->d), &env->fp_status); + PREC_END(); } =20 void HELPER(fadd)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1) diff --git a/target/m68k/helper.h b/target/m68k/helper.h index f05191b..b396899 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -23,13 +23,19 @@ DEF_HELPER_2(redf32, f32, env, fp) DEF_HELPER_2(redf64, f64, env, fp) DEF_HELPER_2(reds32, s32, env, fp) =20 +DEF_HELPER_3(fsround, void, env, fp, fp) +DEF_HELPER_3(fdround, void, env, fp, fp) DEF_HELPER_3(firound, void, env, fp, fp) DEF_HELPER_3(fitrunc, void, env, fp, fp) DEF_HELPER_3(fsqrt, void, env, fp, fp) DEF_HELPER_3(fssqrt, void, env, fp, fp) DEF_HELPER_3(fdsqrt, void, env, fp, fp) DEF_HELPER_3(fabs, void, env, fp, fp) -DEF_HELPER_3(fchs, void, env, fp, fp) +DEF_HELPER_3(fsabs, void, env, fp, fp) +DEF_HELPER_3(fdabs, void, env, fp, fp) +DEF_HELPER_3(fneg, void, env, fp, fp) +DEF_HELPER_3(fsneg, void, env, fp, fp) +DEF_HELPER_3(fdneg, void, env, fp, fp) DEF_HELPER_4(fadd, void, env, fp, fp, fp) DEF_HELPER_4(fsadd, void, env, fp, fp, fp) DEF_HELPER_4(fdadd, void, env, fp, fp, fp) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 4775770..836b80d 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4595,9 +4595,15 @@ DISAS_INSN(fpu) } cpu_dest =3D gen_fp_ptr(REG(ext, 7)); switch (opmode) { - case 0: case 0x40: case 0x44: /* fmove */ + case 0: /* fmove */ gen_fp_move(cpu_dest, cpu_src); break; + case 0x40: /* fsmove */ + gen_helper_fsround(cpu_env, cpu_dest, cpu_src); + break; + case 0x44: /* fdmove */ + gen_helper_fdround(cpu_env, cpu_dest, cpu_src); + break; case 1: /* fint */ gen_helper_firound(cpu_env, cpu_dest, cpu_src); break; @@ -4613,11 +4619,23 @@ DISAS_INSN(fpu) case 0x45: /* fdsqrt */ gen_helper_fdsqrt(cpu_env, cpu_dest, cpu_src); break; - case 0x18: case 0x58: case 0x5c: /* fabs */ + case 0x18: /* fabs */ gen_helper_fabs(cpu_env, cpu_dest, cpu_src); break; - case 0x1a: case 0x5a: case 0x5e: /* fneg */ - gen_helper_fchs(cpu_env, cpu_dest, cpu_src); + case 0x58: /* fsabs */ + gen_helper_fsabs(cpu_env, cpu_dest, cpu_src); + break; + case 0x5c: /* fdabs */ + gen_helper_fdabs(cpu_env, cpu_dest, cpu_src); + break; + case 0x1a: /* fneg */ + gen_helper_fneg(cpu_env, cpu_dest, cpu_src); + break; + case 0x5a: /* fsneg */ + gen_helper_fsneg(cpu_env, cpu_dest, cpu_src); + break; + case 0x5e: /* fdneg */ + gen_helper_fdneg(cpu_env, cpu_dest, cpu_src); break; case 0x20: /* fdiv */ gen_helper_fdiv(cpu_env, cpu_dest, cpu_src, cpu_dest); --=20 2.9.4 From nobody Thu May 2 21:45:59 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498591253942840.9030102215748; Tue, 27 Jun 2017 12:20:53 -0700 (PDT) Received: from localhost ([::1]:57793 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPw2e-00040C-FY for importer@patchew.org; Tue, 27 Jun 2017 15:20:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39529) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dPvv7-0006Oy-Ae for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dPvv5-0001Sz-Ly for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:05 -0400 Received: from mout.kundenserver.de ([212.227.17.13]:55747) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dPvv5-0001Qm-9u for qemu-devel@nongnu.org; Tue, 27 Jun 2017 15:13:03 -0400 Received: from localhost.localdomain ([78.238.229.36]) by mrelayeu.kundenserver.de (mreue104 [212.227.15.183]) with ESMTPSA (Nemesis) id 0MBSfG-1dZF3B3BKw-00AUdi; Tue, 27 Jun 2017 21:12:32 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Date: Tue, 27 Jun 2017 21:12:21 +0200 Message-Id: <20170627191221.31650-8-laurent@vivier.eu> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170627191221.31650-1-laurent@vivier.eu> References: <20170627191221.31650-1-laurent@vivier.eu> X-Provags-ID: V03:K0:EGiNzG2HD+DLm8+XTQ2rFWsl78utrOZ2jAvWHqzVYa1Mcx6txQ4 yqioSZ2r5GKTbT/T8S5jtZsNyXAbSOFsasIqZZf63VbS6L1YfDxEJ8PbMlGyo0BjysmJddz KMhokm7MqMd143YNE2mEVXUrjvWxfu4L9K7TCaLeTCfMQ5utyt4AdRPjaSxb4d6IAtu3mcC DDbem3iGL/hABZmgK9paw== X-UI-Out-Filterresults: notjunk:1;V01:K0:975d5uGQ2RA=:m02d0KN28e1bCgZPxI+URA Xt868U3Rc/Yczl7zJmd+il3fiiAr31BCQioeT+za5RCf6l8CNEQHpKXCGIKXGQxEM81QyoyKM 3DfGUZZ+UTLxtpfHcKZZE/JiIUZQNhhBOIbGKEOFOkD/zDtzwz1Ly1mGShGs8wIBACR32myjp hwPL/isnJqrZ/ZXJ7kHWm++HbAjN+HCJ5ptszqRFGqVBz1jLBUxuAG13nU0KZy85dTKAhJ1IX dSfRtwymkIE8p+I/Bcmwzs86vdSVSUCZve6Zaj1zbvAIsrCeSVG46hKYEvoboyZ9e+oQZIJJs 834Qs54r2oe+aqKatDG5P5cQYKa1HBCFeQZTweF28IJXu+eqEQ/G5URoKgif7xzL4sqZYId5K DHIbqe9Rz/61Bi6OBGX4oMVTZl/jOmUY1ENa6x3EVnIqfKm9hYHvriMXUwKNWiACEA5TkJBk/ MBD91nah8jOI6cgoIGwzqbvX2NrhzseURFDgBQLcgloxGkwVdWtV154rn3t7CmWVItmyXg2/M k/KTdkyAK0zFKNI/aWsW8SUnBDztZW4nF7OVgDmq4ms5zRZKL+BFcFdKIW3/zCgduFye58dzH LxK8WqLgJFL+ckRt5ZTJ5fgKC7yDP9fGEHbPnojq+7flrnuyH2piUrYKLI5Hh7ZvOAKcFCOmK dDxJzWuQE+iWeyIaLUIbB3G3vIzAdSb4cxovSgcgldb3NN/RLx2P3rI177AsKgAUvoe4= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 212.227.17.13 Subject: [Qemu-devel] [PATCH v3 7/7] target/m68k: add fmovem X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target/m68k/fpu_helper.c | 120 +++++++++++++++++++++++++++++++++++++++++++= ++++ target/m68k/helper.h | 6 +++ target/m68k/translate.c | 93 ++++++++++++++++++++++++------------ 3 files changed, 189 insertions(+), 30 deletions(-) diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index 41ab5ce..60b11ce 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/cpu_ldst.h" =20 static const floatx80 fpu_rom[128] =3D { [0x00] =3D floatx80_pi, /* Pi */ @@ -384,3 +385,122 @@ void HELPER(fconst)(CPUM68KState *env, FPReg *val, ui= nt32_t offset) { val->d =3D fpu_rom[offset]; } + +typedef int (*float_access)(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra); + +static uint32_t fmovem_predec(CPUM68KState *env, uint32_t addr, uint32_t m= ask, + float_access access) +{ + uintptr_t ra =3D GETPC(); + int i, size; + + for (i =3D 7; i >=3D 0; i--, mask <<=3D 1) { + if (mask & 0x80) { + size =3D access(env, addr, &env->fregs[i], ra); + if ((mask & 0xff) !=3D 0x80) { + addr -=3D size; + } + } + } + + return addr; +} + +static uint32_t fmovem_postinc(CPUM68KState *env, uint32_t addr, uint32_t = mask, + float_access access) +{ + uintptr_t ra =3D GETPC(); + int i, size; + + for (i =3D 0; i < 8; i++, mask <<=3D 1) { + if (mask & 0x80) { + size =3D access(env, addr, &env->fregs[i], ra); + addr +=3D size; + } + } + + return addr; +} + +static int cpu_ld_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + uint32_t high; + uint64_t low; + + high =3D cpu_ldl_data_ra(env, addr, ra); + low =3D cpu_ldq_data_ra(env, addr + 4, ra); + + fp->l.upper =3D high >> 16; + fp->l.lower =3D low; + + return 12; +} + +static int cpu_st_floatx80_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + cpu_stl_data_ra(env, addr, fp->l.upper << 16, ra); + cpu_stq_data_ra(env, addr + 4, fp->l.lower, ra); + + return 12; +} + +static int cpu_ld_float64_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + uint64_t val; + + val =3D cpu_ldq_data_ra(env, addr, ra); + fp->d =3D float64_to_floatx80(*(float64 *)&val, &env->fp_status); + + return 8; +} + +static int cpu_st_float64_ra(CPUM68KState *env, uint32_t addr, FPReg *fp, + uintptr_t ra) +{ + float64 val; + + val =3D floatx80_to_float64(fp->d, &env->fp_status); + cpu_stq_data_ra(env, addr, *(uint64_t *)&val, ra); + + return 8; +} + +uint32_t HELPER(fmovemx_st_predec)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_predec(env, addr, mask, cpu_st_floatx80_ra); +} + +uint32_t HELPER(fmovemx_st_postinc)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_postinc(env, addr, mask, cpu_st_floatx80_ra); +} + +uint32_t HELPER(fmovemx_ld_postinc)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_postinc(env, addr, mask, cpu_ld_floatx80_ra); +} + +uint32_t HELPER(fmovemd_st_predec)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_predec(env, addr, mask, cpu_st_float64_ra); +} + +uint32_t HELPER(fmovemd_st_postinc)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_postinc(env, addr, mask, cpu_st_float64_ra); +} + +uint32_t HELPER(fmovemd_ld_postinc)(CPUM68KState *env, uint32_t addr, + uint32_t mask) +{ + return fmovem_postinc(env, addr, mask, cpu_ld_float64_ra); +} diff --git a/target/m68k/helper.h b/target/m68k/helper.h index b396899..475a1f2 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -54,6 +54,12 @@ DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp,= fp) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) DEF_HELPER_3(fconst, void, env, fp, i32) +DEF_HELPER_3(fmovemx_st_predec, i32, env, i32, i32) +DEF_HELPER_3(fmovemx_st_postinc, i32, env, i32, i32) +DEF_HELPER_3(fmovemx_ld_postinc, i32, env, i32, i32) +DEF_HELPER_3(fmovemd_st_predec, i32, env, i32, i32) +DEF_HELPER_3(fmovemd_st_postinc, i32, env, i32, i32) +DEF_HELPER_3(fmovemd_ld_postinc, i32, env, i32, i32) =20 DEF_HELPER_3(mac_move, void, env, i32, i32) DEF_HELPER_3(macmulf, i64, env, i32, i32) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 836b80d..1c60664 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4505,13 +4505,72 @@ static void gen_op_fmove_fcr(CPUM68KState *env, Dis= asContext *s, tcg_temp_free_i32(addr); } =20 +static void gen_op_fmovem(CPUM68KState *env, DisasContext *s, + uint32_t insn, uint32_t ext) +{ + int opsize; + TCGv addr, tmp; + int mode =3D (ext >> 11) & 0x3; + int is_load =3D ((ext & 0x2000) =3D=3D 0); + + if (m68k_feature(s->env, M68K_FEATURE_FPU)) { + opsize =3D OS_EXTENDED; + } else { + opsize =3D OS_DOUBLE; /* FIXME */ + } + + addr =3D gen_lea(env, s, insn, opsize); + if (IS_NULL_QREG(addr)) { + gen_addr_fault(s); + return; + } + + tmp =3D tcg_temp_new(); + if (mode & 0x1) { + /* Dynamic register list */ + tcg_gen_ext8u_i32(tmp, DREG(ext, 4)); + } else { + /* Static register list */ + tcg_gen_movi_i32(tmp, ext & 0xff); + } + + if (!is_load && (mode & 2) =3D=3D 0) { + /* predecrement addressing mode + * only available to store register to memory + */ + if (opsize =3D=3D OS_EXTENDED) { + gen_helper_fmovemx_st_predec(tmp, cpu_env, addr, tmp); + } else { + gen_helper_fmovemd_st_predec(tmp, cpu_env, addr, tmp); + } + } else { + /* postincrement addressing mode */ + if (opsize =3D=3D OS_EXTENDED) { + if (is_load) { + gen_helper_fmovemx_ld_postinc(tmp, cpu_env, addr, tmp); + } else { + gen_helper_fmovemx_st_postinc(tmp, cpu_env, addr, tmp); + } + } else { + if (is_load) { + gen_helper_fmovemd_ld_postinc(tmp, cpu_env, addr, tmp); + } else { + gen_helper_fmovemd_st_postinc(tmp, cpu_env, addr, tmp); + } + } + } + if ((insn & 070) =3D=3D 030 || (insn & 070) =3D=3D 040) { + tcg_gen_mov_i32(AREG(insn, 0), tmp); + } + tcg_temp_free(tmp); +} + /* ??? FP exceptions are not implemented. Most exceptions are deferred un= til immediately before the next FP instruction is executed. */ DISAS_INSN(fpu) { uint16_t ext; int opmode; - TCGv tmp32; int opsize; TCGv_ptr cpu_src, cpu_dest; =20 @@ -4548,36 +4607,10 @@ DISAS_INSN(fpu) return; case 6: /* fmovem */ case 7: - { - TCGv addr; - TCGv_ptr fp; - uint16_t mask; - int i; - if ((ext & 0x1f00) !=3D 0x1000 || (ext & 0xff) =3D=3D 0) - goto undef; - tmp32 =3D gen_lea(env, s, insn, OS_LONG); - if (IS_NULL_QREG(tmp32)) { - gen_addr_fault(s); - return; - } - addr =3D tcg_temp_new_i32(); - tcg_gen_mov_i32(addr, tmp32); - mask =3D 0x80; - fp =3D tcg_temp_new_ptr(); - for (i =3D 0; i < 8; i++) { - if (ext & mask) { - tcg_gen_addi_ptr(fp, cpu_env, - offsetof(CPUM68KState, fregs[i])); - gen_ldst_fp(s, OS_DOUBLE, addr, fp, - (ext & (1 << 13)) ? EA_STORE : EA_LOADS); - if (ext & (mask - 1)) - tcg_gen_addi_i32(addr, addr, 8); - } - mask >>=3D 1; - } - tcg_temp_free_i32(addr); - tcg_temp_free_ptr(fp); + if ((ext & 0x1000) =3D=3D 0 && !m68k_feature(s->env, M68K_FEATURE_= FPU)) { + goto undef; } + gen_op_fmovem(env, s, insn, ext); return; } if (ext & (1 << 14)) { --=20 2.9.4