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X-Received-From: 2607:f8b0:400e:c00::241 Subject: [Qemu-devel] [PATCH] xsave_helper: pull xsave and xrstor out of kvm.c into helper function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , "open list:X86" , Marcelo Tosatti , "open list:All patches CC here" , Sergio Andres Gomez Del Real , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch pulls out of kvm.c and into the new files the implementation for the xsave and xrstor instructions. This so they can be shared by kvm and hvf. Signed-off-by: Sergio Andres Gomez Del Real --- target/i386/Makefile.objs | 1 + target/i386/cpu.h | 2 + target/i386/kvm.c | 91 ++---------------------------------- target/i386/xsave_helper.c | 114 +++++++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 120 insertions(+), 88 deletions(-) create mode 100644 target/i386/xsave_helper.c diff --git a/target/i386/Makefile.objs b/target/i386/Makefile.objs index 4fcb7f3df0..ca3bd21cfc 100644 --- a/target/i386/Makefile.objs +++ b/target/i386/Makefile.objs @@ -1,6 +1,7 @@ obj-y +=3D translate.o helper.o cpu.o bpt_helper.o obj-y +=3D excp_helper.o fpu_helper.o cc_helper.o int_helper.o svm_helper.o obj-y +=3D smm_helper.o misc_helper.o mem_helper.o seg_helper.o mpx_helper= .o +obj-y +=3D xsave_helper.o obj-y +=3D gdbstub.o obj-$(CONFIG_SOFTMMU) +=3D machine.o arch_memory_mapping.o arch_dump.o mon= itor.o obj-$(CONFIG_KVM) +=3D kvm.o hyperv.o diff --git a/target/i386/cpu.h b/target/i386/cpu.h index de0551f775..c5e143e8ef 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1697,4 +1697,6 @@ void x86_cpu_dump_local_apic_state(CPUState *cs, FILE= *f, /* cpu.c */ bool cpu_is_bsp(X86CPU *cpu); =20 +void x86_cpu_xrstor_all_areas(X86CPU *cpu, const X86XSaveArea *buf); +void x86_cpu_xsave_all_areas(X86CPU *cpu, X86XSaveArea *buf); #endif /* I386_CPU_H */ diff --git a/target/i386/kvm.c b/target/i386/kvm.c index ee36502789..f84a49d366 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -1433,56 +1433,12 @@ static int kvm_put_xsave(X86CPU *cpu) { CPUX86State *env =3D &cpu->env; X86XSaveArea *xsave =3D env->kvm_xsave_buf; - uint16_t cwd, swd, twd; - int i; =20 if (!has_xsave) { return kvm_put_fpu(cpu); } + x86_cpu_xsave_all_areas(cpu, xsave); =20 - memset(xsave, 0, sizeof(struct kvm_xsave)); - twd =3D 0; - swd =3D env->fpus & ~(7 << 11); - swd |=3D (env->fpstt & 7) << 11; - cwd =3D env->fpuc; - for (i =3D 0; i < 8; ++i) { - twd |=3D (!env->fptags[i]) << i; - } - xsave->legacy.fcw =3D cwd; - xsave->legacy.fsw =3D swd; - xsave->legacy.ftw =3D twd; - xsave->legacy.fpop =3D env->fpop; - xsave->legacy.fpip =3D env->fpip; - xsave->legacy.fpdp =3D env->fpdp; - memcpy(&xsave->legacy.fpregs, env->fpregs, - sizeof env->fpregs); - xsave->legacy.mxcsr =3D env->mxcsr; - xsave->header.xstate_bv =3D env->xstate_bv; - memcpy(&xsave->bndreg_state.bnd_regs, env->bnd_regs, - sizeof env->bnd_regs); - xsave->bndcsr_state.bndcsr =3D env->bndcs_regs; - memcpy(&xsave->opmask_state.opmask_regs, env->opmask_regs, - sizeof env->opmask_regs); - - for (i =3D 0; i < CPU_NB_REGS; i++) { - uint8_t *xmm =3D xsave->legacy.xmm_regs[i]; - uint8_t *ymmh =3D xsave->avx_state.ymmh[i]; - uint8_t *zmmh =3D xsave->zmm_hi256_state.zmm_hi256[i]; - stq_p(xmm, env->xmm_regs[i].ZMM_Q(0)); - stq_p(xmm+8, env->xmm_regs[i].ZMM_Q(1)); - stq_p(ymmh, env->xmm_regs[i].ZMM_Q(2)); - stq_p(ymmh+8, env->xmm_regs[i].ZMM_Q(3)); - stq_p(zmmh, env->xmm_regs[i].ZMM_Q(4)); - stq_p(zmmh+8, env->xmm_regs[i].ZMM_Q(5)); - stq_p(zmmh+16, env->xmm_regs[i].ZMM_Q(6)); - stq_p(zmmh+24, env->xmm_regs[i].ZMM_Q(7)); - } - -#ifdef TARGET_X86_64 - memcpy(&xsave->hi16_zmm_state.hi16_zmm, &env->xmm_regs[16], - 16 * sizeof env->xmm_regs[16]); - memcpy(&xsave->pkru_state, &env->pkru, sizeof env->pkru); -#endif return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_XSAVE, xsave); } =20 @@ -1868,8 +1824,7 @@ static int kvm_get_xsave(X86CPU *cpu) { CPUX86State *env =3D &cpu->env; X86XSaveArea *xsave =3D env->kvm_xsave_buf; - int ret, i; - uint16_t cwd, swd, twd; + int ret; =20 if (!has_xsave) { return kvm_get_fpu(cpu); @@ -1879,48 +1834,8 @@ static int kvm_get_xsave(X86CPU *cpu) if (ret < 0) { return ret; } + x86_cpu_xrstor_all_areas(cpu, xsave); =20 - cwd =3D xsave->legacy.fcw; - swd =3D xsave->legacy.fsw; - twd =3D xsave->legacy.ftw; - env->fpop =3D xsave->legacy.fpop; - env->fpstt =3D (swd >> 11) & 7; - env->fpus =3D swd; - env->fpuc =3D cwd; - for (i =3D 0; i < 8; ++i) { - env->fptags[i] =3D !((twd >> i) & 1); - } - env->fpip =3D xsave->legacy.fpip; - env->fpdp =3D xsave->legacy.fpdp; - env->mxcsr =3D xsave->legacy.mxcsr; - memcpy(env->fpregs, &xsave->legacy.fpregs, - sizeof env->fpregs); - env->xstate_bv =3D xsave->header.xstate_bv; - memcpy(env->bnd_regs, &xsave->bndreg_state.bnd_regs, - sizeof env->bnd_regs); - env->bndcs_regs =3D xsave->bndcsr_state.bndcsr; - memcpy(env->opmask_regs, &xsave->opmask_state.opmask_regs, - sizeof env->opmask_regs); - - for (i =3D 0; i < CPU_NB_REGS; i++) { - uint8_t *xmm =3D xsave->legacy.xmm_regs[i]; - uint8_t *ymmh =3D xsave->avx_state.ymmh[i]; - uint8_t *zmmh =3D xsave->zmm_hi256_state.zmm_hi256[i]; - env->xmm_regs[i].ZMM_Q(0) =3D ldq_p(xmm); - env->xmm_regs[i].ZMM_Q(1) =3D ldq_p(xmm+8); - env->xmm_regs[i].ZMM_Q(2) =3D ldq_p(ymmh); - env->xmm_regs[i].ZMM_Q(3) =3D ldq_p(ymmh+8); - env->xmm_regs[i].ZMM_Q(4) =3D ldq_p(zmmh); - env->xmm_regs[i].ZMM_Q(5) =3D ldq_p(zmmh+8); - env->xmm_regs[i].ZMM_Q(6) =3D ldq_p(zmmh+16); - env->xmm_regs[i].ZMM_Q(7) =3D ldq_p(zmmh+24); - } - -#ifdef TARGET_X86_64 - memcpy(&env->xmm_regs[16], &xsave->hi16_zmm_state.hi16_zmm, - 16 * sizeof env->xmm_regs[16]); - memcpy(&env->pkru, &xsave->pkru_state, sizeof env->pkru); -#endif return 0; } =20 diff --git a/target/i386/xsave_helper.c b/target/i386/xsave_helper.c new file mode 100644 index 0000000000..ca735eee77 --- /dev/null +++ b/target/i386/xsave_helper.c @@ -0,0 +1,114 @@ +/* + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ +#include "qemu/osdep.h" +#include "qapi/error.h" + +#include "qemu-common.h" +#include "cpu.h" + +void x86_cpu_xsave_all_areas(X86CPU *cpu, X86XSaveArea *buf) +{ + CPUX86State *env =3D &cpu->env; + X86XSaveArea *xsave =3D buf; + + uint16_t cwd, swd, twd; + int i; + memset(xsave, 0, sizeof(X86XSaveArea)); + twd =3D 0; + swd =3D env->fpus & ~(7 << 11); + swd |=3D (env->fpstt & 7) << 11; + cwd =3D env->fpuc; + for (i =3D 0; i < 8; ++i) { + twd |=3D (!env->fptags[i]) << i; + } + xsave->legacy.fcw =3D cwd; + xsave->legacy.fsw =3D swd; + xsave->legacy.ftw =3D twd; + xsave->legacy.fpop =3D env->fpop; + xsave->legacy.fpip =3D env->fpip; + xsave->legacy.fpdp =3D env->fpdp; + memcpy(&xsave->legacy.fpregs, env->fpregs, + sizeof env->fpregs); + xsave->legacy.mxcsr =3D env->mxcsr; + xsave->header.xstate_bv =3D env->xstate_bv; + memcpy(&xsave->bndreg_state.bnd_regs, env->bnd_regs, + sizeof env->bnd_regs); + xsave->bndcsr_state.bndcsr =3D env->bndcs_regs; + memcpy(&xsave->opmask_state.opmask_regs, env->opmask_regs, + sizeof env->opmask_regs); + + for (i =3D 0; i < CPU_NB_REGS; i++) { + uint8_t *xmm =3D xsave->legacy.xmm_regs[i]; + uint8_t *ymmh =3D xsave->avx_state.ymmh[i]; + uint8_t *zmmh =3D xsave->zmm_hi256_state.zmm_hi256[i]; + stq_p(xmm, env->xmm_regs[i].ZMM_Q(0)); + stq_p(xmm+8, env->xmm_regs[i].ZMM_Q(1)); + stq_p(ymmh, env->xmm_regs[i].ZMM_Q(2)); + stq_p(ymmh+8, env->xmm_regs[i].ZMM_Q(3)); + stq_p(zmmh, env->xmm_regs[i].ZMM_Q(4)); + stq_p(zmmh+8, env->xmm_regs[i].ZMM_Q(5)); + stq_p(zmmh+16, env->xmm_regs[i].ZMM_Q(6)); + stq_p(zmmh+24, env->xmm_regs[i].ZMM_Q(7)); + } + +#ifdef TARGET_X86_64 + memcpy(&xsave->hi16_zmm_state.hi16_zmm, &env->xmm_regs[16], + 16 * sizeof env->xmm_regs[16]); + memcpy(&xsave->pkru_state, &env->pkru, sizeof env->pkru); +#endif + +} + +void x86_cpu_xrstor_all_areas(X86CPU *cpu, const X86XSaveArea *buf) +{ + + CPUX86State *env =3D &cpu->env; + const X86XSaveArea *xsave =3D buf; + + int i; + uint16_t cwd, swd, twd; + cwd =3D xsave->legacy.fcw; + swd =3D xsave->legacy.fsw; + twd =3D xsave->legacy.ftw; + env->fpop =3D xsave->legacy.fpop; + env->fpstt =3D (swd >> 11) & 7; + env->fpus =3D swd; + env->fpuc =3D cwd; + for (i =3D 0; i < 8; ++i) { + env->fptags[i] =3D !((twd >> i) & 1); + } + env->fpip =3D xsave->legacy.fpip; + env->fpdp =3D xsave->legacy.fpdp; + env->mxcsr =3D xsave->legacy.mxcsr; + memcpy(env->fpregs, &xsave->legacy.fpregs, + sizeof env->fpregs); + env->xstate_bv =3D xsave->header.xstate_bv; + memcpy(env->bnd_regs, &xsave->bndreg_state.bnd_regs, + sizeof env->bnd_regs); + env->bndcs_regs =3D xsave->bndcsr_state.bndcsr; + memcpy(env->opmask_regs, &xsave->opmask_state.opmask_regs, + sizeof env->opmask_regs); + + for (i =3D 0; i < CPU_NB_REGS; i++) { + const uint8_t *xmm =3D xsave->legacy.xmm_regs[i]; + const uint8_t *ymmh =3D xsave->avx_state.ymmh[i]; + const uint8_t *zmmh =3D xsave->zmm_hi256_state.zmm_hi256[i]; + env->xmm_regs[i].ZMM_Q(0) =3D ldq_p(xmm); + env->xmm_regs[i].ZMM_Q(1) =3D ldq_p(xmm+8); + env->xmm_regs[i].ZMM_Q(2) =3D ldq_p(ymmh); + env->xmm_regs[i].ZMM_Q(3) =3D ldq_p(ymmh+8); + env->xmm_regs[i].ZMM_Q(4) =3D ldq_p(zmmh); + env->xmm_regs[i].ZMM_Q(5) =3D ldq_p(zmmh+8); + env->xmm_regs[i].ZMM_Q(6) =3D ldq_p(zmmh+16); + env->xmm_regs[i].ZMM_Q(7) =3D ldq_p(zmmh+24); + } + +#ifdef TARGET_X86_64 + memcpy(&env->xmm_regs[16], &xsave->hi16_zmm_state.hi16_zmm, + 16 * sizeof env->xmm_regs[16]); + memcpy(&env->pkru, &xsave->pkru_state, sizeof env->pkru); +#endif + +} --=20 2.13.0