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[97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=IViwNHcf/zEo7ApaAZ235h4liHsQUxWd5M0SeDhfg9o=; b=LBlHLSX3INykmGfELSkkW3nkKRWbbM96xUqu7s0dF54/LBnc9U+trUVzKE20b5SdMN LvV8IsWuFbOaUdj441mRX1h7yrbyexfateqxvokvNtY5O0UyGoMQp+3dlDgrh1Sh0w8J HEG0PuwnFQe0zT1PPDe75FGGjiYhubNrkQkbvMe7t34/pBC4FgiEvdAJu7lKkB2hGHxF /l1MoiIvv/vAjMgRCOrIgFINPYAXmPgswDcbvvdM5xDTunVf1u9f6f6ImS/NXVGWsADE UpKtzri0kWW2cBgfyT7HmqjfAWTpaN4M3lt5mc3+hy1yKPD6alsDfddTYVnQLWM22jqR vrbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=IViwNHcf/zEo7ApaAZ235h4liHsQUxWd5M0SeDhfg9o=; b=bIWlZbRBVLdD+nus6Dh5gmEuRIfWVa0sfkdUKxPkEdzNVbHKG318T+7adNNw0fkV1F Rxx+12PO4J3S65z0X7UViXfpW/NY0jsEse2eVj80DL1pJeSFgkt3XfDVRaG1lUKPu6Jx bgaOH+9ERl/FpfUwYryq7cVz6BD0AcXx18Q7PKlgzzmQs2+v0cZQbB3KkdSKL4XhxDtI QihiPp4dBmhZWJebjokBwtUpYKcHhUU/5DJN5wYcyoEMavLcFb7rNaGGzWHOykBJwH3e O4sjASZaV3ezxPqOsM7Zqcm/UhpKOffJ6ZaYJ9gzDR39s4qKcQtOXjmoMFaMpJgdRtu2 KEiw== X-Gm-Message-State: AKS2vOycfwxwk52SUMr0YNzx5B1HbKXZVinK8XNh/3JHvGqUjU8qUBMN H/k6VmgSBJUA0H9mytI= X-Received: by 10.237.32.68 with SMTP id 62mr39615860qta.218.1498013317927; Tue, 20 Jun 2017 19:48:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:16 -0700 Message-Id: <20170621024831.26019-2-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::244 Subject: [Qemu-devel] [PATCH 01/16] tcg: Merge opcode arguments into TCGOp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Rather than have a separate buffer of 10*max_ops entries, give each opcode 10 entries. The result is actually a bit smaller and should have slightly more cache locality. Signed-off-by: Richard Henderson --- tcg/optimize.c | 6 ++-- tcg/tcg-op.c | 99 +++++++++++++++++++++---------------------------------= ---- tcg/tcg.c | 98 ++++++++++++++++++++++++++----------------------------= --- tcg/tcg.h | 33 +++++++------------- 4 files changed, 94 insertions(+), 142 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index adfc56c..002aad6 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -576,7 +576,7 @@ void tcg_optimize(TCGContext *s) TCGArg tmp; =20 TCGOp * const op =3D &s->gen_op_buf[oi]; - TCGArg * const args =3D &s->gen_opparam_buf[op->args]; + TCGArg * const args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; =20 @@ -1184,7 +1184,7 @@ void tcg_optimize(TCGContext *s) uint64_t b =3D ((uint64_t)bh << 32) | bl; TCGArg rl, rh; TCGOp *op2 =3D tcg_op_insert_before(s, op, INDEX_op_movi_i= 32, 2); - TCGArg *args2 =3D &s->gen_opparam_buf[op2->args]; + TCGArg *args2 =3D op2->args; =20 if (opc =3D=3D INDEX_op_add2_i32) { a +=3D b; @@ -1210,7 +1210,7 @@ void tcg_optimize(TCGContext *s) uint64_t r =3D (uint64_t)a * b; TCGArg rl, rh; TCGOp *op2 =3D tcg_op_insert_before(s, op, INDEX_op_movi_i= 32, 2); - TCGArg *args2 =3D &s->gen_opparam_buf[op2->args]; + TCGArg *args2 =3D op2->args; =20 rl =3D args[0]; rh =3D args[1]; diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 87f673e..3a627c1 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -45,107 +45,78 @@ extern TCGv_i32 TCGV_HIGH_link_error(TCGv_i64); Up to and including filling in the forward link immediately. We'll do proper termination of the end of the list after we finish translation. = */ =20 -static void tcg_emit_op(TCGContext *ctx, TCGOpcode opc, int args) +static inline TCGOp *tcg_emit_op(TCGContext *ctx, TCGOpcode opc) { int oi =3D ctx->gen_next_op_idx; int ni =3D oi + 1; int pi =3D oi - 1; + TCGOp *op =3D &ctx->gen_op_buf[oi]; =20 tcg_debug_assert(oi < OPC_BUF_SIZE); ctx->gen_op_buf[0].prev =3D oi; ctx->gen_next_op_idx =3D ni; =20 - ctx->gen_op_buf[oi] =3D (TCGOp){ - .opc =3D opc, - .args =3D args, - .prev =3D pi, - .next =3D ni - }; + memset(op, 0, offsetof(TCGOp, args)); + op->opc =3D opc; + op->prev =3D pi; + op->next =3D ni; + + return op; } =20 void tcg_gen_op1(TCGContext *ctx, TCGOpcode opc, TCGArg a1) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 1 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 1; - ctx->gen_opparam_buf[pi] =3D a1; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; } =20 void tcg_gen_op2(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 2 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 2; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; } =20 void tcg_gen_op3(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 3 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 3; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - ctx->gen_opparam_buf[pi + 2] =3D a3; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; + op->args[2] =3D a3; } =20 void tcg_gen_op4(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 4 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 4; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - ctx->gen_opparam_buf[pi + 2] =3D a3; - ctx->gen_opparam_buf[pi + 3] =3D a4; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; + op->args[2] =3D a3; + op->args[3] =3D a4; } =20 void tcg_gen_op5(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4, TCGArg a5) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 5 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 5; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - ctx->gen_opparam_buf[pi + 2] =3D a3; - ctx->gen_opparam_buf[pi + 3] =3D a4; - ctx->gen_opparam_buf[pi + 4] =3D a5; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; + op->args[2] =3D a3; + op->args[3] =3D a4; + op->args[4] =3D a5; } =20 void tcg_gen_op6(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4, TCGArg a5, TCGArg a6) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 6 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 6; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - ctx->gen_opparam_buf[pi + 2] =3D a3; - ctx->gen_opparam_buf[pi + 3] =3D a4; - ctx->gen_opparam_buf[pi + 4] =3D a5; - ctx->gen_opparam_buf[pi + 5] =3D a6; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; + op->args[2] =3D a3; + op->args[3] =3D a4; + op->args[4] =3D a5; + op->args[5] =3D a6; } =20 void tcg_gen_mb(TCGBar mb_type) diff --git a/tcg/tcg.c b/tcg/tcg.c index 3559829..298aa0c 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -469,7 +469,6 @@ void tcg_func_start(TCGContext *s) s->gen_op_buf[0].next =3D 1; s->gen_op_buf[0].prev =3D 0; s->gen_next_op_idx =3D 1; - s->gen_next_parm_idx =3D 0; =20 s->be =3D tcg_malloc(sizeof(TCGBackendData)); } @@ -757,9 +756,10 @@ int tcg_check_temp_count(void) void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret, int nargs, TCGArg *args) { - int i, real_args, nb_rets, pi, pi_first; + int i, real_args, nb_rets, pi; unsigned sizemask, flags; TCGHelperInfo *info; + TCGOp *op; =20 info =3D g_hash_table_lookup(s->helpers, (gpointer)func); flags =3D info->flags; @@ -772,11 +772,11 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg = ret, int orig_sizemask =3D sizemask; int orig_nargs =3D nargs; TCGv_i64 retl, reth; + TCGArg split_args[MAX_OPC_PARAM]; =20 TCGV_UNUSED_I64(retl); TCGV_UNUSED_I64(reth); if (sizemask !=3D 0) { - TCGArg *split_args =3D __builtin_alloca(sizeof(TCGArg) * nargs * 2= ); for (i =3D real_args =3D 0; i < nargs; ++i) { int is_64bit =3D sizemask & (1 << (i+1)*2); if (is_64bit) { @@ -811,7 +811,19 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg r= et, } #endif /* TCG_TARGET_EXTEND_ARGS */ =20 - pi_first =3D pi =3D s->gen_next_parm_idx; + i =3D s->gen_next_op_idx; + tcg_debug_assert(i < OPC_BUF_SIZE); + s->gen_op_buf[0].prev =3D i; + s->gen_next_op_idx =3D i + 1; + op =3D &s->gen_op_buf[i]; + + /* Set links for sequential allocation during translation. */ + memset(op, 0, offsetof(TCGOp, args)); + op->opc =3D INDEX_op_call; + op->prev =3D i - 1; + op->next =3D i + 1; + + pi =3D 0; if (ret !=3D TCG_CALL_DUMMY_ARG) { #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) @@ -821,31 +833,33 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg = ret, two return temporaries, and reassemble below. */ retl =3D tcg_temp_new_i64(); reth =3D tcg_temp_new_i64(); - s->gen_opparam_buf[pi++] =3D GET_TCGV_I64(reth); - s->gen_opparam_buf[pi++] =3D GET_TCGV_I64(retl); + op->args[pi++] =3D GET_TCGV_I64(reth); + op->args[pi++] =3D GET_TCGV_I64(retl); nb_rets =3D 2; } else { - s->gen_opparam_buf[pi++] =3D ret; + op->args[pi++] =3D ret; nb_rets =3D 1; } #else if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { #ifdef HOST_WORDS_BIGENDIAN - s->gen_opparam_buf[pi++] =3D ret + 1; - s->gen_opparam_buf[pi++] =3D ret; + op->args[pi++] =3D ret + 1; + op->args[pi++] =3D ret; #else - s->gen_opparam_buf[pi++] =3D ret; - s->gen_opparam_buf[pi++] =3D ret + 1; + op->args[pi++] =3D ret; + op->args[pi++] =3D ret + 1; #endif nb_rets =3D 2; } else { - s->gen_opparam_buf[pi++] =3D ret; + op->args[pi++] =3D ret; nb_rets =3D 1; } #endif } else { nb_rets =3D 0; } + op->callo =3D nb_rets; + real_args =3D 0; for (i =3D 0; i < nargs; i++) { int is_64bit =3D sizemask & (1 << (i+1)*2); @@ -853,7 +867,7 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg re= t, #ifdef TCG_TARGET_CALL_ALIGN_ARGS /* some targets want aligned 64 bit args */ if (real_args & 1) { - s->gen_opparam_buf[pi++] =3D TCG_CALL_DUMMY_ARG; + op->args[pi++] =3D TCG_CALL_DUMMY_ARG; real_args++; } #endif @@ -868,42 +882,26 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg = ret, have to get more complicated to differentiate between stack arguments and register arguments. */ #if defined(HOST_WORDS_BIGENDIAN) !=3D defined(TCG_TARGET_STACK_GROWSUP) - s->gen_opparam_buf[pi++] =3D args[i] + 1; - s->gen_opparam_buf[pi++] =3D args[i]; + op->args[pi++] =3D args[i] + 1; + op->args[pi++] =3D args[i]; #else - s->gen_opparam_buf[pi++] =3D args[i]; - s->gen_opparam_buf[pi++] =3D args[i] + 1; + op->args[pi++] =3D args[i]; + op->args[pi++] =3D args[i] + 1; #endif real_args +=3D 2; continue; } =20 - s->gen_opparam_buf[pi++] =3D args[i]; + op->args[pi++] =3D args[i]; real_args++; } - s->gen_opparam_buf[pi++] =3D (uintptr_t)func; - s->gen_opparam_buf[pi++] =3D flags; + op->args[pi++] =3D (uintptr_t)func; + op->args[pi++] =3D flags; + op->calli =3D real_args; =20 - i =3D s->gen_next_op_idx; - tcg_debug_assert(i < OPC_BUF_SIZE); - tcg_debug_assert(pi <=3D OPPARAM_BUF_SIZE); - - /* Set links for sequential allocation during translation. */ - s->gen_op_buf[i] =3D (TCGOp){ - .opc =3D INDEX_op_call, - .callo =3D nb_rets, - .calli =3D real_args, - .args =3D pi_first, - .prev =3D i - 1, - .next =3D i + 1 - }; - - /* Make sure the calli field didn't overflow. */ - tcg_debug_assert(s->gen_op_buf[i].calli =3D=3D real_args); - - s->gen_op_buf[0].prev =3D i; - s->gen_next_op_idx =3D i + 1; - s->gen_next_parm_idx =3D pi; + /* Make sure the fields didn't overflow. */ + tcg_debug_assert(op->calli =3D=3D real_args); + tcg_debug_assert(pi <=3D ARRAY_SIZE(op->args)); =20 #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) @@ -1063,7 +1061,7 @@ void tcg_dump_ops(TCGContext *s) op =3D &s->gen_op_buf[oi]; c =3D op->opc; def =3D &tcg_op_defs[c]; - args =3D &s->gen_opparam_buf[op->args]; + args =3D op->args; =20 if (c =3D=3D INDEX_op_insn_start) { col +=3D qemu_log("%s ----", oi !=3D s->gen_op_buf[0].next ? "= \n" : ""); @@ -1347,20 +1345,16 @@ TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *o= ld_op, TCGOpcode opc, int nargs) { int oi =3D s->gen_next_op_idx; - int pi =3D s->gen_next_parm_idx; int prev =3D old_op->prev; int next =3D old_op - s->gen_op_buf; TCGOp *new_op; =20 tcg_debug_assert(oi < OPC_BUF_SIZE); - tcg_debug_assert(pi + nargs <=3D OPPARAM_BUF_SIZE); s->gen_next_op_idx =3D oi + 1; - s->gen_next_parm_idx =3D pi + nargs; =20 new_op =3D &s->gen_op_buf[oi]; *new_op =3D (TCGOp){ .opc =3D opc, - .args =3D pi, .prev =3D prev, .next =3D next }; @@ -1374,20 +1368,16 @@ TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *ol= d_op, TCGOpcode opc, int nargs) { int oi =3D s->gen_next_op_idx; - int pi =3D s->gen_next_parm_idx; int prev =3D old_op - s->gen_op_buf; int next =3D old_op->next; TCGOp *new_op; =20 tcg_debug_assert(oi < OPC_BUF_SIZE); - tcg_debug_assert(pi + nargs <=3D OPPARAM_BUF_SIZE); s->gen_next_op_idx =3D oi + 1; - s->gen_next_parm_idx =3D pi + nargs; =20 new_op =3D &s->gen_op_buf[oi]; *new_op =3D (TCGOp){ .opc =3D opc, - .args =3D pi, .prev =3D prev, .next =3D next }; @@ -1443,7 +1433,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) TCGArg arg; =20 TCGOp * const op =3D &s->gen_op_buf[oi]; - TCGArg * const args =3D &s->gen_opparam_buf[op->args]; + TCGArg * const args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; =20 @@ -1681,7 +1671,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) =20 for (oi =3D s->gen_op_buf[0].next; oi !=3D 0; oi =3D oi_next) { TCGOp *op =3D &s->gen_op_buf[oi]; - TCGArg *args =3D &s->gen_opparam_buf[op->args]; + TCGArg *args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; TCGLifeData arg_life =3D op->life; @@ -1724,7 +1714,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) ? INDEX_op_ld_i32 : INDEX_op_ld_i64); TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); - TCGArg *largs =3D &s->gen_opparam_buf[lop->args]; + TCGArg *largs =3D lop->args; =20 largs[0] =3D dir; largs[1] =3D temp_idx(s, its->mem_base); @@ -1796,7 +1786,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) ? INDEX_op_st_i32 : INDEX_op_st_i64); TCGOp *sop =3D tcg_op_insert_after(s, op, sopc, 3); - TCGArg *sargs =3D &s->gen_opparam_buf[sop->args]; + TCGArg *sargs =3D sop->args; =20 sargs[0] =3D dir; sargs[1] =3D temp_idx(s, its->mem_base); @@ -2624,7 +2614,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) num_insns =3D -1; for (oi =3D s->gen_op_buf[0].next; oi !=3D 0; oi =3D oi_next) { TCGOp * const op =3D &s->gen_op_buf[oi]; - TCGArg * const args =3D &s->gen_opparam_buf[op->args]; + TCGArg * const args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; TCGLifeData arg_life =3D op->life; diff --git a/tcg/tcg.h b/tcg/tcg.h index 9e37722..720e04e 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -51,8 +51,6 @@ #define OPC_BUF_SIZE 640 #define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR) =20 -#define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * MAX_OPC_PARAM) - #define CPU_TEMP_BUF_NLONGS 128 =20 /* Default target word size to pointer size. */ @@ -613,33 +611,29 @@ typedef struct TCGTempSet { #define SYNC_ARG 1 typedef uint16_t TCGLifeData; =20 -/* The layout here is designed to avoid crossing of a 32-bit boundary. - If we do so, gcc adds padding, expanding the size to 12. */ +/* The layout here is designed to avoid crossing of a 32-bit boundary. */ typedef struct TCGOp { TCGOpcode opc : 8; /* 8 */ =20 - /* Index of the prev/next op, or 0 for the end of the list. */ - unsigned prev : 10; /* 18 */ - unsigned next : 10; /* 28 */ - /* The number of out and in parameter for a call. */ - unsigned calli : 4; /* 32 */ - unsigned callo : 2; /* 34 */ + unsigned calli : 4; /* 12 */ + unsigned callo : 2; /* 14 */ + unsigned : 2; /* 16 */ =20 - /* Index of the arguments for this op, or 0 for zero-operand ops. */ - unsigned args : 14; /* 48 */ + /* Index of the prev/next op, or 0 for the end of the list. */ + unsigned prev : 16; /* 32 */ + unsigned next : 16; /* 48 */ =20 /* Lifetime data of the operands. */ unsigned life : 16; /* 64 */ + + /* Arguments for the opcode. */ + TCGArg args[MAX_OPC_PARAM]; } TCGOp; =20 /* Make sure operands fit in the bitfields above. */ QEMU_BUILD_BUG_ON(NB_OPS > (1 << 8)); -QEMU_BUILD_BUG_ON(OPC_BUF_SIZE > (1 << 10)); -QEMU_BUILD_BUG_ON(OPPARAM_BUF_SIZE > (1 << 14)); - -/* Make sure that we don't overflow 64 bits without noticing. */ -QEMU_BUILD_BUG_ON(sizeof(TCGOp) > 8); +QEMU_BUILD_BUG_ON(OPC_BUF_SIZE > (1 << 16)); =20 struct TCGContext { uint8_t *pool_cur, *pool_end; @@ -691,7 +685,6 @@ struct TCGContext { #endif =20 int gen_next_op_idx; - int gen_next_parm_idx; =20 /* Code generation. Note that we specifically do not use tcg_insn_unit here, because there's too much arithmetic throughout that relies @@ -723,7 +716,6 @@ struct TCGContext { TCGTemp *reg_to_temp[TCG_TARGET_NB_REGS]; =20 TCGOp gen_op_buf[OPC_BUF_SIZE]; - TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE]; =20 uint16_t gen_insn_end_off[TCG_MAX_INSNS]; target_ulong gen_insn_data[TCG_MAX_INSNS][TARGET_INSN_START_WORDS]; @@ -734,8 +726,7 @@ extern bool parallel_cpus; =20 static inline void tcg_set_insn_param(int op_idx, int arg, TCGArg v) { - int op_argi =3D tcg_ctx.gen_op_buf[op_idx].args; - tcg_ctx.gen_opparam_buf[op_argi + arg] =3D v; + tcg_ctx.gen_op_buf[op_idx].args[arg] =3D v; } =20 /* The number of opcodes emitted so far. */ --=20 2.9.4