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[71.217.91.69]) by smtp.gmail.com with ESMTPSA id m47sm29286qtc.36.2017.06.06.17.32.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Jun 2017 17:32:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=XLzXfbq9XGeIxZtBvSC8qQbLBeGNZAXU2a8vbNUJaUk=; b=d/jYf90CtNPiucKfFvBzLBYmt+av3izuLAJ0gsyA9363cokd4+9YTq2q4LoJL1jfMr 0jXdJO+49mo4neBphC8QcEcnxJy1ojLalFgDMvAbKTbMT1YHPf30CahrX0VrrA3UEEZP g7SDfvZAY7wyZxdcWaObibkC8JNShjpuZYcBd+e9sHVfrzn40KDXsoweL+wSmcCd22CD xD4aBa6rZE54DHzNWVuItMjRwfy0WWQQzcXyxblGO4PvBzsgpX+JNcscUygIYN1UrOCh CZlKXYsGiM52Tyf5YUb5g20o/rlm1Icvo9J5MM9PgUTvUX9TUTgO3rC1N6AAOXwadMJo BAIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=XLzXfbq9XGeIxZtBvSC8qQbLBeGNZAXU2a8vbNUJaUk=; b=tFe9dlP7dMkurWbpWrhxnKfVrLxPru+O4YFTAUH+lUGh829ndzc1RIMA+5fWz2gg5U jrRsoe4lMjQyZlzrJcJUx5PJTOljBU32Ru7iMORVblC1YPRX0DZXH49QdjTkLy+QH2aQ RzzzY6epqnevY47q/Fq3e86Fa5/P1cRKtWGKZQdh75TTnK5UiM79+Zi0/4aur+UDqqIC pK7q05hWwCMDiDCxDf8vKrOOEoqBHATYAOQ8XjOOY1FfUsI1/tD5zP7gnKmmRCyQsi/q H7PRlMWvxjFqm833o05M1+0dVsJQUDB1YbttDZ7ZkP/X2RIP4LwHi2HwaY8emSdjLyT1 mdRw== X-Gm-Message-State: AKS2vOwp2pmX+tqPhRIJzN4+xnu76oLKYj7bYvpY8QaX4zupJQPDlqkd JGKvQ4fDRdmu/4uq+3U= X-Received: by 10.55.170.15 with SMTP id t15mr8277347qke.186.1496795572812; Tue, 06 Jun 2017 17:32:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 6 Jun 2017 17:31:16 -0700 Message-Id: <20170607003119.14778-68-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170607003119.14778-1-rth@twiddle.net> References: <20170607003119.14778-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::244 Subject: [Qemu-devel] [PULL v2 67/70] target/s390x: implement STORE PAIR TO QUADWORD X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aurelien Jarno Signed-off-by: Aurelien Jarno Message-Id: <20170604202034.16615-3-aurelien@aurel32.net> Signed-off-by: Richard Henderson --- target/s390x/helper.h | 1 + target/s390x/insn-data.def | 2 ++ target/s390x/mem_helper.c | 24 ++++++++++++++++++++++++ target/s390x/translate.c | 6 ++++++ 4 files changed, 33 insertions(+) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 054ccd6..69249a5 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -104,6 +104,7 @@ DEF_HELPER_FLAGS_1(popcnt, TCG_CALL_NO_RWG_SE, i64, i64) DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env) DEF_HELPER_2(stfle, i32, env, i64) DEF_HELPER_FLAGS_2(lpq, TCG_CALL_NO_WG, i64, env, i64) +DEF_HELPER_FLAGS_4(stpq, TCG_CALL_NO_WG, void, env, i64, i64, i64) =20 #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 32dee40..73dd05d 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -796,6 +796,8 @@ /* STORE ACCESS MULTIPLE */ C(0x9b00, STAM, RS_a, Z, 0, a2, 0, 0, stam, 0) C(0xeb9b, STAMY, RSY_a, LD, 0, a2, 0, 0, stam, 0) +/* STORE PAIR TO QUADWORD */ + C(0xe38e, STPQ, RXY_a, Z, 0, a2, r1_P, 0, stpq, 0) =20 /* SUBTRACT */ C(0x1b00, SR, RR_a, Z, r1, r2, new, r1_32, sub, subs32) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index f48908c..a8988e0 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1692,6 +1692,30 @@ uint64_t HELPER(lpq)(CPUS390XState *env, uint64_t ad= dr) return hi; } =20 +/* store pair to quadword */ +void HELPER(stpq)(CPUS390XState *env, uint64_t addr, + uint64_t low, uint64_t high) +{ + uintptr_t ra =3D GETPC(); + + if (parallel_cpus) { +#ifndef CONFIG_ATOMIC128 + cpu_loop_exit_atomic(ENV_GET_CPU(env), ra); +#else + int mem_idx =3D cpu_mmu_index(env, false); + TCGMemOpIdx oi =3D make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx); + + Int128 v =3D int128_make128(low, high); + helper_atomic_sto_be_mmu(env, addr, v, oi, ra); +#endif + } else { + check_alignment(env, addr, 16, ra); + + cpu_stq_data_ra(env, addr + 0, high, ra); + cpu_stq_data_ra(env, addr + 8, low, ra); + } +} + /* Execute instruction. This instruction executes an insn modified with the contents of r1. It does not change the executed instruction in mem= ory; it does not change the program counter. diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 10019ed..95f91d4 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -4203,6 +4203,12 @@ static ExitStatus op_stmh(DisasContext *s, DisasOps = *o) return NO_EXIT; } =20 +static ExitStatus op_stpq(DisasContext *s, DisasOps *o) +{ + gen_helper_stpq(cpu_env, o->in2, o->out2, o->out); + return NO_EXIT; +} + static ExitStatus op_srst(DisasContext *s, DisasOps *o) { gen_helper_srst(o->in1, cpu_env, regs[0], o->in1, o->in2); --=20 2.9.4