From nobody Mon Feb 9 12:42:37 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1496268689254430.7424018948233; Wed, 31 May 2017 15:11:29 -0700 (PDT) Received: from localhost ([::1]:34073 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGBpv-0000wP-Jj for importer@patchew.org; Wed, 31 May 2017 18:11:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39400) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGBge-00018A-Kt for qemu-devel@nongnu.org; Wed, 31 May 2017 18:01:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dGBgb-0005Uf-Nz for qemu-devel@nongnu.org; Wed, 31 May 2017 18:01:52 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:34974) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dGBgb-0005Lg-9J for qemu-devel@nongnu.org; Wed, 31 May 2017 18:01:49 -0400 Received: from [2001:bc8:30d7:120:9bb5:8936:7e6a:9e36] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1dGBgN-0004Q7-Fi; Thu, 01 Jun 2017 00:01:35 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.89) (envelope-from ) id 1dGBgK-0000wg-N3; Thu, 01 Jun 2017 00:01:32 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Thu, 1 Jun 2017 00:01:01 +0200 Message-Id: <20170531220129.27724-3-aurelien@aurel32.net> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170531220129.27724-1-aurelien@aurel32.net> References: <20170531220129.27724-1-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:bc8:30d7:100::1 Subject: [Qemu-devel] [PATCH v3 02/30] target/s390x: remove some Linux assumptions from IPTE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Graf , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Aurelien Jarno --- target/s390x/cpu.h | 2 ++ target/s390x/mem_helper.c | 17 ++++++++++------- target/s390x/mmu_helper.c | 2 -- 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 79235cfa45..ba3d50b8e0 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -1033,6 +1033,8 @@ struct sysib_322 { #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit = */ #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry = */ =20 +#define VADDR_PX 0xff000 /* page index bits = */ + #define _PAGE_RO 0x200 /* HW read-only bit */ #define _PAGE_INVALID 0x400 /* HW invalid bit */ #define _PAGE_RES0 0x800 /* bit must be zero */ diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index e35571e342..0ebd65d9ab 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1073,19 +1073,22 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t = l, uint64_t a1, uint64_t a2) } =20 /* invalidate pte */ -void HELPER(ipte)(CPUS390XState *env, uint64_t pte_addr, uint64_t vaddr) +void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr) { CPUState *cs =3D CPU(s390_env_get_cpu(env)); uint64_t page =3D vaddr & TARGET_PAGE_MASK; - uint64_t pte =3D 0; + uint64_t pte_addr, pte; =20 /* XXX broadcast to other CPUs */ =20 - /* XXX Linux is nice enough to give us the exact pte address. - According to spec we'd have to find it out ourselves */ - /* XXX Linux is fine with overwriting the pte, the spec requires - us to only set the invalid bit */ - stq_phys(cs->as, pte_addr, pte | _PAGE_INVALID); + /* Compute the page table entry address */ + pte_addr =3D (pto & _SEGMENT_ENTRY_ORIGIN); + pte_addr +=3D (vaddr & _VADDR_PX) >> 9; + + /* Mark the page table entry as invalid */ + pte =3D ldq_phys(cs->as, pte_addr); + pte |=3D _PAGE_INVALID; + stq_phys(cs->as, pte_addr, pte); =20 /* XXX we exploit the fact that Linux passes the exact virtual address here - it's not obliged to! */ diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 31eb9efa9b..501e39010d 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -143,8 +143,6 @@ static int mmu_translate_pte(CPUS390XState *env, target= _ulong vaddr, return 0; } =20 -#define VADDR_PX 0xff000 /* Page index bits */ - /* Decode segment table entry */ static int mmu_translate_segment(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t st_entry, --=20 2.11.0