From nobody Mon Feb 9 12:43:38 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14962683865461012.0259432299848; Wed, 31 May 2017 15:06:26 -0700 (PDT) Received: from localhost ([::1]:34052 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGBl2-0004kq-3a for importer@patchew.org; Wed, 31 May 2017 18:06:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39311) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dGBgc-000163-SW for qemu-devel@nongnu.org; Wed, 31 May 2017 18:01:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dGBgb-0005Th-Kz for qemu-devel@nongnu.org; Wed, 31 May 2017 18:01:50 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:100::1]:34996) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dGBgb-0005M0-9m for qemu-devel@nongnu.org; Wed, 31 May 2017 18:01:49 -0400 Received: from [2001:bc8:30d7:120:9bb5:8936:7e6a:9e36] (helo=ohm.rr44.fr) by hall.aurel32.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1dGBgO-0004QM-2a; Thu, 01 Jun 2017 00:01:36 +0200 Received: from aurel32 by ohm.rr44.fr with local (Exim 4.89) (envelope-from ) id 1dGBgM-0000zx-LB; Thu, 01 Jun 2017 00:01:34 +0200 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Thu, 1 Jun 2017 00:01:14 +0200 Message-Id: <20170531220129.27724-16-aurelien@aurel32.net> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170531220129.27724-1-aurelien@aurel32.net> References: <20170531220129.27724-1-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:bc8:30d7:100::1 Subject: [Qemu-devel] [PATCH v3 15/30] target/s390x: improve 24-bit and 31-bit addresses write X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexander Graf , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target/s390x/mem_helper.c | 37 ++++++++++++++++++++++++++++++------- 1 file changed, 30 insertions(+), 7 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 2425bfc984..2113494983 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -384,6 +384,29 @@ static inline uint64_t get_address(CPUS390XState *env,= int reg) return wrap_address(env, env->regs[reg]); } =20 +static inline void set_address(CPUS390XState *env, int reg, uint64_t addre= ss) +{ + if (env->psw.mask & PSW_MASK_64) { + /* 64-Bit mode */ + env->regs[reg] =3D address; + } else { + if (!(env->psw.mask & PSW_MASK_32)) { + /* 24-Bit mode. According to the PoO it is implementation + dependent if bits 32-39 remain unchanged or are set to + zeros. Choose the former so that the function can also be + used for TRT. */ + env->regs[reg] =3D deposit64(env->regs[reg], 0, 24, address); + } else { + /* 31-Bit mode. According to the PoO it is implementation + dependent if bit 32 remains unchanged or is set to zero. + Choose the latter so that the function can also be used for + TRT. */ + address &=3D 0x7fffffff; + env->regs[reg] =3D deposit64(env->regs[reg], 0, 32, address); + } + } +} + /* search string (c is byte to search, r2 is string, r1 end of string) */ uint64_t HELPER(srst)(CPUS390XState *env, uint64_t r0, uint64_t end, uint64_t str) @@ -564,8 +587,8 @@ uint32_t HELPER(mvcl)(CPUS390XState *env, uint32_t r1, = uint32_t r2) env->regs[r1 + 1] =3D destlen; /* can't use srclen here, we trunc'ed it */ env->regs[r2 + 1] -=3D src - env->regs[r2]; - env->regs[r1] =3D dest; - env->regs[r2] =3D src; + set_address(env, r1, dest); + set_address(env, r2, src); =20 return cc; } @@ -613,8 +636,8 @@ uint32_t HELPER(mvcle)(CPUS390XState *env, uint32_t r1,= uint64_t a2, /* can't use srclen here, we trunc'ed it */ /* FIXME: 31-bit mode! */ env->regs[r3 + 1] -=3D src - env->regs[r3]; - env->regs[r1] =3D dest; - env->regs[r3] =3D src; + set_address(env, r1, dest); + set_address(env, r3, src); =20 return cc; } @@ -651,8 +674,8 @@ uint32_t HELPER(clcle)(CPUS390XState *env, uint32_t r1,= uint64_t a2, env->regs[r1 + 1] =3D destlen; /* can't use srclen here, we trunc'ed it */ env->regs[r3 + 1] -=3D src - env->regs[r3]; - env->regs[r1] =3D dest; - env->regs[r3] =3D src; + set_address(env, r1, dest); + set_address(env, r3, src); =20 return cc; } @@ -858,7 +881,7 @@ static uint32_t do_helper_trt(CPUS390XState *env, uint3= 2_t len, uint64_t array, uint8_t sbyte =3D cpu_ldub_data_ra(env, trans + byte, ra); =20 if (sbyte !=3D 0) { - env->regs[1] =3D array + i; + set_address(env, 1, array + i); env->regs[2] =3D deposit64(env->regs[2], 0, 8, sbyte); return (i =3D=3D len) ? 2 : 1; } --=20 2.11.0